mediatek: fix DTS defining mt7530 switch phys but not referencing them
authorDaniel Golle <daniel@makrotopia.org>
Fri, 12 Apr 2024 12:24:38 +0000 (13:24 +0100)
committerDaniel Golle <daniel@makrotopia.org>
Sat, 13 Apr 2024 17:49:30 +0000 (18:49 +0100)
The upstream solution to define the MDIO bus in DT is a bit
more strict than our previous downstream solution doing the same thing
and now requires switch PHYs to be referenced in DT as well.

Arınç Ünal told us in #15141:
"With [the now upstream patch written by him which we backported], the
switch MDIO bus won't be assigned to ds->user_mii_bus when the switch
MDIO bus is defined on the device tree anymore. This was not the case
with the downstream patch.

When ds->user_mii_bus is populated, DSA will 1:1 map the port with
PHY. Meaning port with address 1 will be mapped to PHY with address 1.
Because that ds->user_mii_bus is not populated when the switch MDIO
bus is defined on the device tree, on every port node, the PHY address
must be supplied by the phy-handle property."

Add those phy-handles to affected devices' DT.

Fixes: 4354b34f6f ("generic: 6.6: sync mt7530 DSA driver with upstream")
Fixes: 401a6ccfaf ("generic: 6.1: sync mt7530 DSA driver with upstream")
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
target/linux/mediatek/dts/mt7986a-acer-predator-w6.dts
target/linux/mediatek/dts/mt7986a-asus-tuf-ax4200.dts
target/linux/mediatek/dts/mt7986a-asus-tuf-ax6000.dts

index 6bff786558be9ec2fd2218b30f8c019dc92a406e..612f3c73342b21989c42a33951df2b2ddeba1019 100644 (file)
                port@0 {
                        reg = <0>;
                        label = "game";
+                       phy-handle = <&swphy0>;
                };
 
                port@1 {
                        reg = <1>;
                        label = "lan1";
+                       phy-handle = <&swphy1>;
                };
 
                port@2 {
                        reg = <2>;
                        label = "lan2";
+                       phy-handle = <&swphy2>;
                };
 
                port@3 {
                        reg = <3>;
                        label = "lan3";
+                       phy-handle = <&swphy3>;
                };
 
                port@6 {
                #address-cells = <1>;
                #size-cells = <0>;
 
-               phy@0 {
+               swphy0: phy@0 {
                        reg = <0>;
 
                        mediatek,led-config = <
                        >;
                };
 
-               phy@1 {
+               swphy1: phy@1 {
                        reg = <1>;
 
                        mediatek,led-config = <
                        >;
                };
 
-               phy@2 {
+               swphy2: phy@2 {
                        reg = <2>;
 
                        mediatek,led-config = <
                        >;
                };
 
-               phy@3 {
+               swphy3: phy@3 {
                        reg = <3>;
 
                        mediatek,led-config = <
index 22530df9bb9d0574cb0d0b9b6183cda8f89408a5..e40602fa215e1a677b534c85b767e824af041518 100644 (file)
                port@1 {
                        reg = <1>;
                        label = "lan1";
+                       phy-handle = <&swphy1>;
                };
 
                port@2 {
                        reg = <2>;
                        label = "lan2";
+                       phy-handle = <&swphy2>;
                };
 
                port@3 {
                        reg = <3>;
                        label = "lan3";
+                       phy-handle = <&swphy3>;
                };
 
                port@4 {
                        reg = <4>;
                        label = "lan4";
+                       phy-handle = <&swphy4>;
                };
 
                port@6 {
                #address-cells = <1>;
                #size-cells = <0>;
 
-               phy@1 {
+               swphy1: phy@1 {
                        reg = <1>;
 
                        mediatek,led-config = <
                        >;
                };
 
-               phy@2 {
+               swphy2: phy@2 {
                        reg = <2>;
 
                        mediatek,led-config = <
                        >;
                };
 
-               phy@3 {
+               swphy3: phy@3 {
                        reg = <3>;
 
                        mediatek,led-config = <
                        >;
                };
 
-               phy@4 {
+               swphy4: phy@4 {
                        reg = <4>;
 
                        mediatek,led-config = <
index bde2525cd7557ed9391b3f29c97ee0e79b0ce0ea..1cdfb5f1550f040223c96941008c328481eb8b80 100644 (file)
                port@1 {
                        reg = <4>;
                        label = "lan1";
+                       phy-handle = <&swphy1>;
                };
 
                port@2 {
                        reg = <3>;
                        label = "lan2";
+                       phy-handle = <&swphy2>;
                };
 
                port@3 {
                        reg = <2>;
                        label = "lan3";
+                       phy-handle = <&swphy3>;
                };
 
                port@4 {
                        reg = <1>;
                        label = "lan4";
+                       phy-handle = <&swphy4>;
                };
 
                port@5 {
                #address-cells = <1>;
                #size-cells = <0>;
 
-               phy@1 {
+               swphy1: phy@1 {
                        reg = <1>;
 
                        mediatek,led-config = <
                        >;
                };
 
-               phy@2 {
+               swphy2: phy@2 {
                        reg = <2>;
 
                        mediatek,led-config = <
                        >;
                };
 
-               phy@3 {
+               swphy3: phy@3 {
                        reg = <3>;
 
                        mediatek,led-config = <
                        >;
                };
 
-               phy@4 {
+               swphy4: phy@4 {
                        reg = <4>;
 
                        mediatek,led-config = <