target/linux/qualcommax/patches-6.6/0113-remoteproc-qcom-Add-secure-PIL-support.patch

   1 From 7358d42dfbdfdb5d4f1d0d4c2e5c2bb4143a29b0 Mon Sep 17 00:00:00 2001
   2 From: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
   3 Date: Sat, 30 Jan 2021 10:50:06 +0530
   4 Subject: [PATCH] remoteproc: qcom: Add secure PIL support
   5
   6 IPQ8074 uses secure PIL. Hence, adding the support for the same.
   7
   8 Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
   9 Signed-off-by: Sricharan R <sricharan@codeaurora.org>
  10 Signed-off-by: Nikhil Prakash V <nprakash@codeaurora.org>
  11 ---
  12  drivers/remoteproc/qcom_q6v5_wcss.c | 43 +++++++++++++++++++++++++++--
  13  1 file changed, 40 insertions(+), 3 deletions(-)
  14
  15 --- a/drivers/remoteproc/qcom_q6v5_wcss.c
  16 +++ b/drivers/remoteproc/qcom_q6v5_wcss.c
  17 @@ -18,6 +18,7 @@
  18  #include <linux/regulator/consumer.h>
  19  #include <linux/reset.h>
  20  #include <linux/soc/qcom/mdt_loader.h>
  21 +#include <linux/qcom_scm.h>
  22  #include "qcom_common.h"
  23  #include "qcom_pil_info.h"
  24  #include "qcom_q6v5.h"
  25 @@ -86,6 +87,9 @@
  26  #define TCSR_WCSS_CLK_ENABLE   0x14
  27
  28  #define MAX_HALT_REG           3
  29 +
  30 +#define WCNSS_PAS_ID           6
  31 +
  32  enum {
  33         WCSS_IPQ8074,
  34         WCSS_QCS404,
  35 @@ -134,6 +138,7 @@ struct q6v5_wcss {
  36         unsigned int crash_reason_smem;
  37         u32 version;
  38         bool requires_force_stop;
  39 +       bool need_mem_protection;
  40
  41         struct qcom_rproc_glink glink_subdev;
  42         struct qcom_rproc_ssr ssr_subdev;
  43 @@ -152,6 +157,7 @@ struct wcss_data {
  44         int ssctl_id;
  45         const struct rproc_ops *ops;
  46         bool requires_force_stop;
  47 +       bool need_mem_protection;
  48  };
  49
  50  static int q6v5_wcss_reset(struct q6v5_wcss *wcss)
  51 @@ -251,6 +257,15 @@ static int q6v5_wcss_start(struct rproc
  52
  53         qcom_q6v5_prepare(&wcss->q6v5);
  54
  55 +       if (wcss->need_mem_protection) {
  56 +               ret = qcom_scm_pas_auth_and_reset(WCNSS_PAS_ID);
  57 +               if (ret) {
  58 +                       dev_err(wcss->dev, "wcss_reset failed\n");
  59 +                       return ret;
  60 +               }
  61 +               goto wait_for_reset;
  62 +       }
  63 +
  64         /* Release Q6 and WCSS reset */
  65         ret = reset_control_deassert(wcss->wcss_reset);
  66         if (ret) {
  67 @@ -285,6 +300,7 @@ static int q6v5_wcss_start(struct rproc
  68         if (ret)
  69                 goto wcss_q6_reset;
  70
  71 +wait_for_reset:
  72         ret = qcom_q6v5_wait_for_start(&wcss->q6v5, 5 * HZ);
  73         if (ret == -ETIMEDOUT)
  74                 dev_err(wcss->dev, "start timed out\n");
  75 @@ -718,6 +734,15 @@ static int q6v5_wcss_stop(struct rproc *
  76         struct q6v5_wcss *wcss = rproc->priv;
  77         int ret;
  78
  79 +       if (wcss->need_mem_protection) {
  80 +               ret = qcom_scm_pas_shutdown(WCNSS_PAS_ID);
  81 +               if (ret) {
  82 +                       dev_err(wcss->dev, "not able to shutdown\n");
  83 +                       return ret;
  84 +               }
  85 +               goto pas_done;
  86 +       }
  87 +
  88         /* WCSS powerdown */
  89         if (wcss->requires_force_stop) {
  90                 ret = qcom_q6v5_request_stop(&wcss->q6v5, NULL);
  91 @@ -742,6 +767,7 @@ static int q6v5_wcss_stop(struct rproc *
  92                         return ret;
  93         }
  94
  95 +pas_done:
  96         clk_disable_unprepare(wcss->prng_clk);
  97         qcom_q6v5_unprepare(&wcss->q6v5);
  98
  99 @@ -765,9 +791,15 @@ static int q6v5_wcss_load(struct rproc *
 100         struct q6v5_wcss *wcss = rproc->priv;
 101         int ret;
 102
 103 -       ret = qcom_mdt_load_no_init(wcss->dev, fw, rproc->firmware,
 104 -                                   0, wcss->mem_region, wcss->mem_phys,
 105 -                                   wcss->mem_size, &wcss->mem_reloc);
 106 +       if (wcss->need_mem_protection)
 107 +               ret = qcom_mdt_load(wcss->dev, fw, rproc->firmware,
 108 +                                   WCNSS_PAS_ID, wcss->mem_region,
 109 +                                   wcss->mem_phys, wcss->mem_size,
 110 +                                   &wcss->mem_reloc);
 111 +       else
 112 +               ret = qcom_mdt_load_no_init(wcss->dev, fw, rproc->firmware,
 113 +                                           0, wcss->mem_region, wcss->mem_phys,
 114 +                                           wcss->mem_size, &wcss->mem_reloc);
 115         if (ret)
 116                 return ret;
 117
 118 @@ -1035,6 +1067,9 @@ static int q6v5_wcss_probe(struct platfo
 119         if (!desc)
 120                 return -EINVAL;
 121
 122 +       if (desc->need_mem_protection && !qcom_scm_is_available())
 123 +               return -EPROBE_DEFER;
 124 +
 125         rproc = rproc_alloc(&pdev->dev, pdev->name, desc->ops,
 126                             desc->firmware_name, sizeof(*wcss));
 127         if (!rproc) {
 128 @@ -1048,6 +1083,7 @@ static int q6v5_wcss_probe(struct platfo
 129
 130         wcss->version = desc->version;
 131         wcss->requires_force_stop = desc->requires_force_stop;
 132 +       wcss->need_mem_protection = desc->need_mem_protection;
 133
 134         ret = q6v5_wcss_init_mmio(wcss, pdev);
 135         if (ret)
 136 @@ -1117,6 +1153,7 @@ static const struct wcss_data wcss_ipq80
 137         .wcss_q6_reset_required = true,
 138         .ops = &q6v5_wcss_ipq8074_ops,
 139         .requires_force_stop = true,
 140 +       .need_mem_protection = true,
 141  };
 142
 143  static const struct wcss_data wcss_qcs404_res_init = {