target/linux/mediatek/dts/mt7981a-edgecore-eap111.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 /dts-v1/;
   4
   5 #include <dt-bindings/leds/common.h>
   6 #include "mt7981.dtsi"
   7
   8 / {
   9         model = "Edgecore EAP111";
  10         compatible = "edgecore,eap111", "mediatek,mt7981";
  11
  12         aliases {
  13                 serial0 = &uart0;
  14                 led-boot = &led_green;
  15                 led-failsafe = &led_green;
  16                 led-running = &led_green;
  17                 led-upgrade = &led_green;
  18         };
  19
  20         chosen {
  21                 bootargs-override = "console=ttyS0,115200n8";
  22                 stdout-path = "serial0:115200n8";
  23         };
  24
  25         gpio-keys {
  26                 compatible = "gpio-keys";
  27
  28                 reset {
  29                         label = "reset";
  30                         linux,code = <KEY_RESTART>;
  31                         gpios = <&pio 1 GPIO_ACTIVE_LOW>;
  32                 };
  33         };
  34
  35         leds {
  36                 compatible = "gpio-leds";
  37
  38                 led_green: led-green {
  39                         gpios = <&pio 9 GPIO_ACTIVE_HIGH>;
  40                         color = <LED_COLOR_ID_GREEN>;
  41                         function = LED_FUNCTION_INDICATOR;
  42                 };
  43
  44                 led_orange: led-orange {
  45                         gpios = <&pio 34 GPIO_ACTIVE_HIGH>;
  46                         color = <LED_COLOR_ID_ORANGE>;
  47                         function = LED_FUNCTION_INDICATOR;
  48                 };
  49
  50                 led_blue: led-blue {
  51                         gpios = <&pio 35 GPIO_ACTIVE_HIGH>;
  52                         color = <LED_COLOR_ID_BLUE>;
  53                         function = LED_FUNCTION_INDICATOR;
  54                 };
  55         };
  56 };
  57
  58 &uart0 {
  59         status = "okay";
  60 };
  61
  62 &watchdog {
  63         status = "okay";
  64 };
  65
  66 &pio {
  67         spi0_flash_pins: spi0-pins {
  68                 mux {
  69                         function = "spi";
  70                         groups = "spi0", "spi0_wp_hold";
  71                 };
  72         };
  73 };
  74
  75 &spi0 {
  76         pinctrl-names = "default";
  77         pinctrl-0 = <&spi0_flash_pins>;
  78         cs-gpios = <0>, <0>;
  79         #address-cells = <1>;
  80         #size-cells = <0>;
  81         status = "okay";
  82         #address-cells = <1>;
  83         #size-cells = <0>;
  84
  85         flash@0 {
  86                 #address-cells = <1>;
  87                 #size-cells = <1>;
  88                 compatible = "spi-nand";
  89                 reg = <0>;
  90                 spi-max-frequency = <52000000>;
  91
  92                 spi-cal-enable;
  93                 spi-cal-mode = "read-data";
  94                 spi-cal-datalen = <7>;
  95                 spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4E 0x41 0x4E 0x44>;
  96                 spi-cal-addrlen = <5>;
  97                 spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>;
  98
  99                 spi-tx-bus-width = <4>;
 100                 spi-rx-bus-width = <4>;
 101                 mediatek,nmbm;
 102                 mediatek,bmt-max-ratio = <1>;
 103                 mediatek,bmt-max-reserved-blocks = <64>;
 104
 105                 partitions {
 106                         compatible = "fixed-partitions";
 107                         #address-cells = <1>;
 108                         #size-cells = <1>;
 109
 110                         partition@0 {
 111                                 label = "BL2";
 112                                 reg = <0x00000 0x100000>;
 113                                 read-only;
 114                         };
 115
 116                         partition@100000 {
 117                                 label = "u-boot-env";
 118                                 reg = <0x100000 0x80000>;
 119                         };
 120
 121                         partition@180000 {
 122                                 label = "Factory";
 123                                 reg = <0x180000 0x200000>;
 124                                 read-only;
 125
 126                                 nvmem-layout {
 127                                         compatible = "fixed-layout";
 128                                         #address-cells = <1>;
 129                                         #size-cells = <1>;
 130
 131                                         eeprom_factory: eeprom@0 {
 132                                                 reg = <0x0 0x1000>;
 133                                         };
 134
 135                                         macaddr_wan: macaddr@2a {
 136                                                 reg = <0x2a 0x6>;
 137                                         };
 138
 139                                         macaddr_lan: macaddr@24 {
 140                                                 reg = <0x24 0x6>;
 141                                         };
 142                                 };
 143                         };
 144
 145                         partition@380000 {
 146                                 label = "FIP";
 147                                 reg = <0x380000 0x200000>;
 148                                 read-only;
 149                         };
 150
 151                         partition@580000 {
 152                                 label = "ubi";
 153                                 reg = <0x580000 0x4000000>;
 154                                 compatible = "linux,ubi";
 155                         };
 156                 };
 157         };
 158 };
 159
 160 &mdio_bus {
 161         reset-gpios = <&pio 39 GPIO_ACTIVE_LOW>;
 162         reset-delay-us = <10000>;
 163         reset-post-delay-us = <10000>;
 164
 165         en8801sc: ethernet-phy@24 {
 166                 reg = <24>;
 167                 compatible = "ethernet-phy-id03a2.9471";
 168                 phy-mode = "sgmii";
 169         };
 170 };
 171
 172 &eth {
 173         pinctrl-names = "default";
 174         pinctrl-0 = <&mdio_pins>;
 175         status = "okay";
 176
 177         gmac0: mac@0 {
 178                 compatible = "mediatek,eth-mac";
 179                 reg = <0>;
 180                 phy-mode = "sgmii";
 181                 phy-handle = <&en8801sc>;
 182                 managed = "in-band-status";
 183                 nvmem-cells = <&macaddr_lan>;
 184                 nvmem-cell-names = "mac-address";
 185         };
 186
 187         gmac1: mac@1 {
 188                 compatible = "mediatek,eth-mac";
 189                 reg = <1>;
 190                 phy-mode = "gmii";
 191                 phy-handle = <&int_gbe_phy>;
 192                 nvmem-cells = <&macaddr_wan>;
 193                 nvmem-cell-names = "mac-address";
 194         };
 195 };
 196
 197 &wifi {
 198         nvmem-cells = <&eeprom_factory>;
 199         nvmem-cell-names = "eeprom";
 200         status = "okay";
 201 };