ipq806x: 5.10: refresh patches
authorChristian Marangi <ansuelsmth@gmail.com>
Fri, 17 Feb 2023 03:25:59 +0000 (04:25 +0100)
committerChristian Marangi <ansuelsmth@gmail.com>
Fri, 17 Feb 2023 03:27:15 +0000 (04:27 +0100)
Refresh patches for kernel 5.10

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
target/linux/ipq806x/patches-5.10/082-ipq8064-dtsi-tweaks.patch
target/linux/ipq806x/patches-5.10/083-ipq8064-dtsi-additions.patch
target/linux/ipq806x/patches-5.10/103-ARM-dts-qcom-reduce-pci-IO-size-to-64K.patch
target/linux/ipq806x/patches-5.10/109-v5.15-arm-dts-qcom-add-ahb-reset-to-ipq806x-gmac.patch

index 301963f4f9fb3d723a8420f2d3e0083d3b269e54..1046af15d41dc0ee849ab5ec6681816fc2ae27e2 100644 (file)
@@ -35,7 +35,7 @@
                        #interrupt-cells = <2>;
                        interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
  
-@@ -190,6 +192,7 @@
+@@ -190,6 +191,7 @@
                intc: interrupt-controller@2000000 {
                        compatible = "qcom,msm-qgic2";
                        interrupt-controller;
@@ -43,7 +43,7 @@
                        #interrupt-cells = <3>;
                        reg = <0x02000000 0x1000>,
                              <0x02002000 0x1000>;
-@@ -219,21 +222,23 @@
+@@ -219,21 +221,23 @@
                acc0: clock-controller@2088000 {
                        compatible = "qcom,kpss-acc-v1";
                        reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
@@ -69,7 +69,7 @@
                        reg = <0x02099000 0x1000>, <0x02009000 0x1000>;
                        regulator;
                };
-@@ -251,7 +256,7 @@
+@@ -251,7 +255,7 @@
  
                        syscon-tcsr = <&tcsr>;
  
@@ -78,7 +78,7 @@
                                compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
                                reg = <0x12490000 0x1000>,
                                      <0x12480000 0x1000>;
-@@ -261,7 +266,7 @@
+@@ -261,7 +265,7 @@
                                status = "disabled";
                        };
  
@@ -87,7 +87,7 @@
                                compatible = "qcom,i2c-qup-v1.1.1";
                                reg = <0x124a0000 0x1000>;
                                interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>;
-@@ -326,7 +331,7 @@
+@@ -326,7 +330,7 @@
  
                        syscon-tcsr = <&tcsr>;
  
@@ -96,7 +96,7 @@
                                compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
                                reg = <0x1a240000 0x1000>,
                                      <0x1a200000 0x1000>;
-@@ -397,7 +402,7 @@
+@@ -397,7 +401,7 @@
                        status = "disabled";
                };
  
                        compatible = "qcom,ipq806x-ahci", "generic-ahci";
                        reg = <0x29000000 0x180>;
  
-@@ -430,13 +435,35 @@
+@@ -430,13 +434,35 @@
                        reg = <0x00700000 0x1000>;
                        #address-cells = <1>;
                        #size-cells = <1>;
                };
  
                tcsr: syscon@1a400000 {
-@@ -622,7 +649,7 @@
+@@ -622,7 +648,7 @@
  
                gmac0: ethernet@37000000 {
                        device_type = "network";
                        reg = <0x37000000 0x200000>;
                        interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "macirq";
-@@ -645,7 +672,7 @@
+@@ -645,7 +671,7 @@
  
                gmac1: ethernet@37200000 {
                        device_type = "network";
                        reg = <0x37200000 0x200000>;
                        interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "macirq";
-@@ -668,7 +695,7 @@
+@@ -668,7 +694,7 @@
  
                gmac2: ethernet@37400000 {
                        device_type = "network";
                        reg = <0x37400000 0x200000>;
                        interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "macirq";
-@@ -691,7 +718,7 @@
+@@ -691,7 +717,7 @@
  
                gmac3: ethernet@37600000 {
                        device_type = "network";
                        reg = <0x37600000 0x200000>;
                        interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "macirq";
-@@ -740,13 +767,13 @@
+@@ -740,13 +766,13 @@
                        qcom,ee = <0>;
                };
  
                                status          = "disabled";
                                compatible      = "arm,pl18x", "arm,primecell";
                                arm,primecell-periphid = <0x00051180>;
-@@ -760,13 +787,12 @@
+@@ -760,13 +786,12 @@
                                non-removable;
                                cap-sd-highspeed;
                                cap-mmc-highspeed;
index a1a97ae941b10a51d0a1176a923750cdab71f7f3..82d91e12421a42b41166238136bedb57058b868c 100644 (file)
                qcom_pinmux: pinmux@800000 {
                        compatible = "qcom,ipq8064-pinctrl";
                        reg = <0x800000 0x4000>;
-@@ -160,6 +589,15 @@
+@@ -159,6 +588,15 @@
                                };
                        };
  
                        spi_pins: spi_pins {
                                mux {
                                        pins = "gpio18", "gpio19", "gpio21";
-@@ -169,6 +607,53 @@
+@@ -168,6 +606,53 @@
                                };
                        };
  
                        leds_pins: leds_pins {
                                mux {
                                        pins = "gpio7", "gpio8", "gpio9",
-@@ -231,6 +716,17 @@
+@@ -230,6 +715,17 @@
                        clock-output-names = "acpu1_aux";
                };
  
                saw0: regulator@2089000 {
                        compatible = "qcom,saw2", "qcom,apq8064-saw2-v1.1-cpu", "syscon";
                        reg = <0x02089000 0x1000>, <0x02009000 0x1000>;
-@@ -243,6 +739,52 @@
+@@ -242,6 +738,52 @@
                        regulator;
                };
  
                gsbi2: gsbi@12480000 {
                        compatible = "qcom,gsbi-v1.0.0";
                        cell-index = <2>;
-@@ -368,6 +910,33 @@
+@@ -367,6 +909,33 @@
                        };
                };
  
                gsbi7: gsbi@16600000 {
                        status = "disabled";
                        compatible = "qcom,gsbi-v1.0.0";
-@@ -389,6 +958,19 @@
+@@ -388,6 +957,19 @@
                                clock-names = "core", "iface";
                                status = "disabled";
                        };
                };
  
                sata_phy: sata-phy@1b400000 {
-@@ -478,6 +1060,95 @@
+@@ -477,6 +1059,95 @@
                        #reset-cells = <1>;
                };
  
                pcie0: pci@1b500000 {
                        compatible = "qcom,pcie-ipq8064";
                        reg = <0x1b500000 0x1000
-@@ -739,6 +1410,59 @@
+@@ -738,6 +1409,59 @@
                        status = "disabled";
                };
  
                vsdcc_fixed: vsdcc-regulator {
                        compatible = "regulator-fixed";
                        regulator-name = "SDCC Power";
-@@ -814,4 +1538,17 @@
+@@ -813,4 +1537,17 @@
                        };
                };
        };
index 75b53234ab1e0fd4ce9047eb2ddfcfc6f976897f..2a6d4007fa6625a4676b5b3286a0fbd01ef2fa6f 100644 (file)
@@ -17,7 +17,7 @@ Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
 
 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
 +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
-@@ -1163,7 +1163,7 @@
+@@ -1162,7 +1162,7 @@
                        #address-cells = <3>;
                        #size-cells = <2>;
  
@@ -26,7 +26,7 @@ Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
                                  0x82000000 0 0x08000000 0x08000000 0 0x07e00000>; /* non-prefetchable memory */
  
                        interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
-@@ -1214,7 +1214,7 @@
+@@ -1213,7 +1213,7 @@
                        #address-cells = <3>;
                        #size-cells = <2>;
  
@@ -35,7 +35,7 @@ Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
                                  0x82000000 0 0x2e000000 0x2e000000 0 0x03e00000>; /* non-prefetchable memory */
  
                        interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
-@@ -1265,7 +1265,7 @@
+@@ -1264,7 +1264,7 @@
                        #address-cells = <3>;
                        #size-cells = <2>;
  
index 4a047ed6eb332e0097c28f123de8bfe44362df65..d94d8982330a76b41063fdba32bbae061b5097b7 100644 (file)
@@ -14,7 +14,7 @@ Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 
 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
 +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
-@@ -1335,8 +1335,9 @@
+@@ -1334,8 +1334,9 @@
                        clocks = <&gcc GMAC_CORE1_CLK>;
                        clock-names = "stmmaceth";
  
@@ -26,7 +26,7 @@ Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
  
                        status = "disabled";
                };
-@@ -1358,8 +1359,9 @@
+@@ -1357,8 +1358,9 @@
                        clocks = <&gcc GMAC_CORE2_CLK>;
                        clock-names = "stmmaceth";
  
@@ -38,7 +38,7 @@ Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
  
                        status = "disabled";
                };
-@@ -1381,8 +1383,9 @@
+@@ -1380,8 +1382,9 @@
                        clocks = <&gcc GMAC_CORE3_CLK>;
                        clock-names = "stmmaceth";
  
@@ -50,7 +50,7 @@ Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
  
                        status = "disabled";
                };
-@@ -1404,8 +1407,9 @@
+@@ -1403,8 +1406,9 @@
                        clocks = <&gcc GMAC_CORE4_CLK>;
                        clock-names = "stmmaceth";