ARM: imx: m53menlo: Enable DM GPIO
authorMarek Vasut <marex@denx.de>
Sun, 9 Jun 2019 16:46:43 +0000 (18:46 +0200)
committerStefano Babic <sbabic@denx.de>
Thu, 27 Jun 2019 12:14:37 +0000 (14:14 +0200)
Enable DM GPIO support on iMX53 M53Menlo and fix up board code where
applicable. Enable MALLOC_F to let the GPIO controllers bind early on.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
board/menlo/m53menlo/m53menlo.c
configs/m53menlo_defconfig

index 6bdd6d5b234dd0474b8288abda32b8099a570348..a46041868ca11353068f45b416b995537c9d53c1 100644 (file)
@@ -88,6 +88,7 @@ int board_ehci_hcd_init(int port)
                imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX53_PAD_GPIO_4__GPIO1_4,
                                                    PAD_CTL_PKE |
                                                    PAD_CTL_DSE_HIGH));
+               gpio_request(IMX_GPIO_NR(1, 4), "USB_OTG_PWRON");
                gpio_direction_output(IMX_GPIO_NR(1, 4), 0);
 
                /* USB OTG Over Current */
@@ -97,6 +98,7 @@ int board_ehci_hcd_init(int port)
                imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX53_PAD_GPIO_2__GPIO1_2,
                                                    PAD_CTL_PKE |
                                                    PAD_CTL_DSE_HIGH));
+               gpio_request(IMX_GPIO_NR(1, 2), "USB_HOST_PWRON");
                gpio_direction_output(IMX_GPIO_NR(1, 2), 0);
 
                /* USB Host Over Current */
@@ -215,6 +217,8 @@ static void enable_lvds_clock(struct display_info_t const *dev, const u8 hclk)
 
 static void enable_lvds_etm0430g0dh6(struct display_info_t const *dev)
 {
+       gpio_request(IMX_GPIO_NR(6, 0), "LCD");
+
        /* For ETM0430G0DH6 model, this must be enabled before the clock. */
        gpio_direction_output(IMX_GPIO_NR(6, 0), 1);
 
@@ -227,6 +231,8 @@ static void enable_lvds_etm0430g0dh6(struct display_info_t const *dev)
 
 static void enable_lvds_etm0700g0dh6(struct display_info_t const *dev)
 {
+       gpio_request(IMX_GPIO_NR(6, 0), "LCD");
+
        /*
         * Set LVDS clock to 33.28 MHz for the display. The PLL4 is set to
         * 233 MHz, divided by 7 by setting CCM_CSCMR2 LDB_DI0_IPU_DIV=1 .
@@ -424,6 +430,8 @@ static void m53_set_clock(void)
        const u32 dramclk = 400;
        u32 cpuclk;
 
+       gpio_request(IMX_GPIO_NR(4, 0), "CPUCLK");
+
        imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX53_PAD_GPIO_10__GPIO4_0,
                                            PAD_CTL_DSE_HIGH | PAD_CTL_PKE));
        gpio_direction_input(IMX_GPIO_NR(4, 0));
index ef57fbea917523f2c6c7e1f2b6c96cb0d32b070b..3b527b9fdcb28197b908829c9bb35b260b24036d 100644 (file)
@@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x71000000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x8000
 CONFIG_TARGET_M53MENLO=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=2
@@ -29,6 +30,7 @@ CONFIG_CMD_ASKENV=y
 CONFIG_CMD_GREPENV=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_FUSE=y
+CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_NAND_TRIMFFS=y
@@ -51,9 +53,11 @@ CONFIG_CMD_UBI=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="imx53-m53menlo"
 CONFIG_ENV_IS_IN_NAND=y
+CONFIG_DM=y
 CONFIG_BOOTCOUNT_LIMIT=y
 CONFIG_BOOTCOUNT_BOOTLIMIT=3
 CONFIG_SYS_BOOTCOUNT_MAGIC=0x0B01C041
+CONFIG_DM_GPIO=y
 CONFIG_FSL_ESDHC=y
 CONFIG_NAND=y
 CONFIG_NAND_MXC=y