kernel: bump 6.6 to 6.6.28
[openwrt/staging/blocktrron.git] / target / linux / generic / backport-6.6 / 790-17-v6.9-net-dsa-mt7530-correct-port-capabilities-of-MT7988.patch
1 From 9716e3e2c21547c97a9d79119da8fdce5659c2cc Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com>
3 Date: Tue, 6 Feb 2024 01:08:07 +0300
4 Subject: [PATCH 17/30] net: dsa: mt7530: correct port capabilities of MT7988
5 MIME-Version: 1.0
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
8
9 On the switch on the MT7988 SoC, as shown in Block Diagram 8.1.1.3 on page
10 125 of "MT7988A Wi-Fi 7 Generation Router Platform: Datasheet (Open
11 Version) v0.1", there are only 4 PHYs. That's port 0 to 3. Set the case for
12 ports which connect to switch PHYs to '0 ... 3'.
13
14 Port 4 and 5 are not used at all in this design.
15
16 Link: https://wiki.banana-pi.org/Banana_Pi_BPI-R4#Documents [1]
17 Acked-by: Daniel Golle <daniel@makrotopia.org>
18 Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
19 Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
20 Link: https://lore.kernel.org/r/20240206-for-netnext-mt7530-improvements-2-v5-6-d7d92a185cb1@arinc9.com
21 Signed-off-by: Jakub Kicinski <kuba@kernel.org>
22 ---
23 drivers/net/dsa/mt7530.c | 2 +-
24 1 file changed, 1 insertion(+), 1 deletion(-)
25
26 --- a/drivers/net/dsa/mt7530.c
27 +++ b/drivers/net/dsa/mt7530.c
28 @@ -2774,7 +2774,7 @@ static void mt7988_mac_port_get_caps(str
29
30 switch (port) {
31 /* Ports which are connected to switch PHYs. There is no MII pinout. */
32 - case 0 ... 4:
33 + case 0 ... 3:
34 __set_bit(PHY_INTERFACE_MODE_INTERNAL,
35 config->supported_interfaces);
36 break;