target/linux/mediatek/dts/mt7981b-zbtlink-zbt-z8102ax.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 /dts-v1/;
   4
   5 #include "mt7981.dtsi"
   6
   7 / {
   8         model = "Zbtlink ZBT-Z8102AX";
   9         compatible = "zbtlink,zbt-z8102ax", "mediatek,mt7981";
  10
  11         aliases {
  12                 serial0 = &uart0;
  13                 led-boot = &led_status_green;
  14                 led-failsafe = &led_status_red;
  15                 led-running = &led_status_green;
  16                 led-upgrade = &led_status_green;
  17                 label-mac-device = &gmac0;
  18         };
  19
  20         chosen {
  21                 stdout-path = "serial0:115200n8";
  22                 bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8 loglevel=8";
  23         };
  24
  25         memory {
  26                 reg = <0 0x40000000 0 0x40000000>;
  27         };
  28
  29         gpio-keys {
  30                 compatible = "gpio-keys";
  31
  32                 button-reset {
  33                         label = "reset";
  34                         linux,code = <KEY_RESTART>;
  35                         gpios = <&pio 1 GPIO_ACTIVE_LOW>;
  36                 };
  37
  38                 button-mesh {
  39                         label = "mesh";
  40                         linux,code = <BTN_0>;
  41                         gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
  42                 };
  43
  44                 button-hub {
  45                         label = "hub";
  46                         linux,code = <BTN_1>;
  47                         gpios = <&pio 12 GPIO_ACTIVE_HIGH>;
  48                 };
  49         };
  50
  51         leds {
  52                 compatible = "gpio-leds";
  53
  54                 led_status_red: red {
  55                         gpios = <&pio 9 GPIO_ACTIVE_HIGH>;
  56                         color = <LED_COLOR_ID_RED>;
  57                         function = LED_FUNCTION_STATUS;
  58                 };
  59
  60                 led_status_green: green {
  61                         gpios = <&pio 10 GPIO_ACTIVE_LOW>;
  62                         color = <LED_COLOR_ID_GREEN>;
  63                         function = LED_FUNCTION_STATUS;
  64                 };
  65
  66                 blue {
  67                         gpios = <&pio 11 GPIO_ACTIVE_LOW>;
  68                         color = <LED_COLOR_ID_BLUE>;
  69                         function = LED_FUNCTION_STATUS;
  70                 };
  71
  72                 4g {
  73                         gpios = <&pio 8 GPIO_ACTIVE_LOW>;
  74                         color = <LED_COLOR_ID_BLUE>;
  75                         function = LED_FUNCTION_USB;
  76                         function-enumerator = <0>;
  77                 };
  78
  79                 4g2 {
  80                         gpios = <&pio 14 GPIO_ACTIVE_LOW>;
  81                         color = <LED_COLOR_ID_BLUE>;
  82                         function = LED_FUNCTION_USB;
  83                         function-enumerator = <1>;
  84                 };
  85         };
  86
  87         watchdog {
  88                 compatible = "linux,wdt-gpio";
  89                 gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
  90                 hw_algo = "toggle";
  91                 hw_margin_ms = <1000>;
  92         };
  93
  94         gpio-export {
  95                 compatible = "gpio-export";
  96                 #size-cells = <0>;
  97
  98                 pcie {
  99                         gpio-export,name = "pcie_power";
 100                         gpio-export,output = <1>;
 101                         gpios = <&pio 3 GPIO_ACTIVE_HIGH>;
 102                 };
 103
 104                 5g1 {
 105                         gpio-export,name = "5g1";
 106                         gpio-export,output = <1>;
 107                         gpios = <&pio 4 GPIO_ACTIVE_HIGH>;
 108                 };
 109
 110                 5g2 {
 111                         gpio-export,name = "5g2";
 112                         gpio-export,output = <1>;
 113                         gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
 114                 };
 115
 116                 sim1 {
 117                         gpio-export,name = "sim1";
 118                         gpio-export,output = <1>;
 119                         gpios = <&pio 6 GPIO_ACTIVE_HIGH>;
 120                 };
 121
 122                 sim2 {
 123                         gpio-export,name = "sim2";
 124                         gpio-export,output = <1>;
 125                         gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
 126                 };
 127         };
 128 };
 129
 130 &eth {
 131         status = "okay";
 132
 133         gmac0: mac@0 {
 134                 /* LAN */
 135                 compatible = "mediatek,eth-mac";
 136                 reg = <0>;
 137                 phy-mode = "2500base-x";
 138
 139                 nvmem-cell-names = "mac-address";
 140                 nvmem-cells = <&macaddr_factory_4 2>;
 141
 142                 fixed-link {
 143                         speed = <2500>;
 144                         full-duplex;
 145                         pause;
 146                 };
 147         };
 148
 149         gmac1: mac@1 {
 150                 /* WAN */
 151                 compatible = "mediatek,eth-mac";
 152                 reg = <1>;
 153                 phy-mode = "gmii";
 154                 phy-handle = <&int_gbe_phy>;
 155
 156                 nvmem-cell-names = "mac-address";
 157                 nvmem-cells = <&macaddr_factory_4 3>;
 158         };
 159 };
 160
 161 &mdio_bus {
 162         switch: switch@1f {
 163                 compatible = "mediatek,mt7531";
 164                 reg = <31>;
 165                 reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
 166                 interrupt-controller;
 167                 #interrupt-cells = <1>;
 168                 interrupt-parent = <&pio>;
 169                 interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
 170         };
 171 };
 172
 173 &spi0 {
 174         pinctrl-names = "default";
 175         pinctrl-0 = <&spi0_flash_pins>;
 176         status = "okay";
 177
 178         spi_nand@0 {
 179                 compatible = "spi-nand";
 180                 #address-cells = <1>;
 181                 #size-cells = <1>;
 182                 reg = <0>;
 183
 184                 spi-max-frequency = <52000000>;
 185                 spi-tx-bus-width = <4>;
 186                 spi-rx-bus-width = <4>;
 187
 188                 mediatek,nmbm;
 189                 mediatek,bmt-max-ratio = <1>;
 190                 mediatek,bmt-max-reserved-blocks = <64>;
 191
 192                 partitions {
 193                         compatible = "fixed-partitions";
 194                         #address-cells = <1>;
 195                         #size-cells = <1>;
 196
 197                         partition@0 {
 198                                 label = "bl2";
 199                                 reg = <0x0000000 0x0100000>;
 200                                 read-only;
 201                         };
 202
 203                         partition@100000 {
 204                                 label = "u-boot-env";
 205                                 reg = <0x100000 0x80000>;
 206                         };
 207
 208                         partition@180000 {
 209                                 label = "Factory";
 210                                 reg = <0x180000 0x200000>;
 211                                 read-only;
 212
 213                                 nvmem-layout {
 214                                         compatible = "fixed-layout";
 215                                         #address-cells = <1>;
 216                                         #size-cells = <1>;
 217
 218                                         eeprom_factory: eeprom@0 {
 219                                                 reg = <0x0 0x1000>;
 220                                         };
 221
 222                                         macaddr_factory_4: macaddr@4 {
 223                                                 compatible = "mac-base";
 224                                                 reg = <0x4 0x6>;
 225                                                 #nvmem-cell-cells = <1>;
 226                                         };
 227                                 };
 228                         };
 229
 230                         partition@380000 {
 231                                 label = "FIP";
 232                                 reg = <0x380000 0x200000>;
 233                                 read-only;
 234                         };
 235
 236                         partition@580000 {
 237                                 label = "ubi";
 238                                 reg = <0x580000 0x4000000>;
 239                         };
 240                 };
 241         };
 242 };
 243
 244 &switch {
 245         ports {
 246                 #address-cells = <1>;
 247                 #size-cells = <0>;
 248
 249                 port@0 {
 250                         reg = <0>;
 251                         label = "lan1";
 252                 };
 253
 254                 port@1 {
 255                         reg = <1>;
 256                         label = "lan2";
 257                 };
 258
 259                 port@2 {
 260                         reg = <2>;
 261                         label = "lan3";
 262                 };
 263
 264                 port@3 {
 265                         reg = <3>;
 266                         label = "lan4";
 267                 };
 268
 269                 port@6 {
 270                         reg = <6>;
 271                         label = "cpu";
 272                         ethernet = <&gmac0>;
 273                         phy-mode = "2500base-x";
 274
 275                         fixed-link {
 276                                 speed = <2500>;
 277                                 full-duplex;
 278                                 pause;
 279                         };
 280                 };
 281         };
 282 };
 283
 284 &pio {
 285         spi0_flash_pins: spi0-pins {
 286                 mux {
 287                         function = "spi";
 288                         groups = "spi0", "spi0_wp_hold";
 289                 };
 290
 291                 conf-pu {
 292                         pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
 293                         drive-strength = <8>;
 294                         bias-pull-up = <103>;
 295                 };
 296
 297                 conf-pd {
 298                         pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
 299                         drive-strength = <8>;
 300                         bias-pull-down = <103>;
 301                 };
 302         };
 303 };
 304
 305 &uart0 {
 306         status = "okay";
 307 };
 308
 309 &watchdog {
 310         status = "okay";
 311 };
 312
 313 &usb_phy {
 314         status = "okay";
 315 };
 316
 317 &xhci {
 318         status = "okay";
 319 };
 320
 321 &wifi {
 322         status = "okay";
 323
 324         nvmem-cells = <&eeprom_factory>;
 325         nvmem-cell-names = "eeprom";
 326 };