target/linux/sunxi/patches-6.1/006-v6.6-arm64-dts-allwinner-h616-Add-OrangePi-Zero-3-board.patch

   1 From f1b3ddb3ecc2eec1f912383e01156c226daacfab Mon Sep 17 00:00:00 2001
   2 From: Andre Przywara <andre.przywara@arm.com>
   3 Date: Fri, 4 Aug 2023 18:08:56 +0100
   4 Subject: [PATCH] arm64: dts: allwinner: h616: Add OrangePi Zero 3 board
   5  support
   6
   7 The OrangePi Zero 3 is a development board based on the Allwinner H618 SoC,
   8 which seems to be just an H616 with more L2 cache. The board itself is a
   9 slightly updated version of the Orange Pi Zero 2. It features:
  10 - Four ARM Cortex-A53 cores, Mali-G31 MP2 GPU
  11 - 1/1.5/2/4 GiB LPDDR4 DRAM SKUs (only up to 1GB on the Zero2)
  12 - AXP313a PMIC (more capable AXP305 on the Zero2)
  13 - Raspberry-Pi-1 compatible GPIO header
  14 - extra 13 pin expansion header, exposing pins for 2x USB 2.0 ports
  15 - 1 USB 2.0 host port
  16 - 1 USB 2.0 type C port (power supply + OTG)
  17 - MicroSD slot
  18 - on-board 16MiB bootable SPI NOR flash (only 2MB on the Zero2)
  19 - 1Gbps Ethernet port (via Motorcomm YT8531 PHY) (RTL8211 on the Zero2)
  20 - micro-HDMI port
  21 - (yet) unsupported Allwinner WiFi/BT chip
  22
  23 Add the devicetree file describing the currently supported features,
  24 namely LEDs, SD card, PMIC, SPI flash, USB. Ethernet seems unstable at
  25 the moment, though the basic functionality works.
  26
  27 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
  28 Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
  29 Link: https://lore.kernel.org/r/20230804170856.1237202-4-andre.przywara@arm.com
  30 Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
  31 ---
  32  arch/arm64/boot/dts/allwinner/Makefile        |  1 +
  33  .../allwinner/sun50i-h618-orangepi-zero3.dts  | 94 +++++++++++++++++++
  34  2 files changed, 95 insertions(+)
  35  create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts
  36
  37 --- a/arch/arm64/boot/dts/allwinner/Makefile
  38 +++ b/arch/arm64/boot/dts/allwinner/Makefile
  39 @@ -40,3 +40,4 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-ta
  40  dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6-mini.dtb
  41  dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-orangepi-zero2.dtb
  42  dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-x96-mate.dtb
  43 +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-orangepi-zero3.dtb
  44 --- /dev/null
  45 +++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts
  46 @@ -0,0 +1,94 @@
  47 +// SPDX-License-Identifier: (GPL-2.0+ or MIT)
  48 +/*
  49 + * Copyright (C) 2023 Arm Ltd.
  50 + */
  51 +
  52 +/dts-v1/;
  53 +
  54 +#include "sun50i-h616-orangepi-zero.dtsi"
  55 +
  56 +/ {
  57 +       model = "OrangePi Zero3";
  58 +       compatible = "xunlong,orangepi-zero3", "allwinner,sun50i-h618";
  59 +};
  60 +
  61 +&emac0 {
  62 +       phy-supply = <&reg_dldo1>;
  63 +};
  64 +
  65 +&ext_rgmii_phy {
  66 +       motorcomm,clk-out-frequency-hz = <125000000>;
  67 +};
  68 +
  69 +&mmc0 {
  70 +       /*
  71 +        * The schematic shows the card detect pin wired up to PF6, via an
  72 +        * inverter, but it just doesn't work.
  73 +        */
  74 +       broken-cd;
  75 +       vmmc-supply = <&reg_dldo1>;
  76 +};
  77 +
  78 +&r_i2c {
  79 +       status = "okay";
  80 +
  81 +       axp313: pmic@36 {
  82 +               compatible = "x-powers,axp313a";
  83 +               reg = <0x36>;
  84 +               #interrupt-cells = <1>;
  85 +               interrupt-controller;
  86 +               interrupt-parent = <&pio>;
  87 +               interrupts = <2 9 IRQ_TYPE_LEVEL_LOW>;  /* PC9 */
  88 +
  89 +               vin1-supply = <&reg_vcc5v>;
  90 +               vin2-supply = <&reg_vcc5v>;
  91 +               vin3-supply = <&reg_vcc5v>;
  92 +
  93 +               regulators {
  94 +                       /* Supplies VCC-PLL, so needs to be always on. */
  95 +                       reg_aldo1: aldo1 {
  96 +                               regulator-always-on;
  97 +                               regulator-min-microvolt = <1800000>;
  98 +                               regulator-max-microvolt = <1800000>;
  99 +                               regulator-name = "vcc1v8";
 100 +                       };
 101 +
 102 +                       /* Supplies VCC-IO, so needs to be always on. */
 103 +                       reg_dldo1: dldo1 {
 104 +                               regulator-always-on;
 105 +                               regulator-min-microvolt = <3300000>;
 106 +                               regulator-max-microvolt = <3300000>;
 107 +                               regulator-name = "vcc3v3";
 108 +                       };
 109 +
 110 +                       reg_dcdc1: dcdc1 {
 111 +                               regulator-always-on;
 112 +                               regulator-min-microvolt = <810000>;
 113 +                               regulator-max-microvolt = <990000>;
 114 +                               regulator-name = "vdd-gpu-sys";
 115 +                       };
 116 +
 117 +                       reg_dcdc2: dcdc2 {
 118 +                               regulator-always-on;
 119 +                               regulator-min-microvolt = <810000>;
 120 +                               regulator-max-microvolt = <1100000>;
 121 +                               regulator-name = "vdd-cpu";
 122 +                       };
 123 +
 124 +                       reg_dcdc3: dcdc3 {
 125 +                               regulator-always-on;
 126 +                               regulator-min-microvolt = <1100000>;
 127 +                               regulator-max-microvolt = <1100000>;
 128 +                               regulator-name = "vdd-dram";
 129 +                       };
 130 +               };
 131 +       };
 132 +};
 133 +
 134 +&pio {
 135 +       vcc-pc-supply = <&reg_dldo1>;
 136 +       vcc-pf-supply = <&reg_dldo1>;
 137 +       vcc-pg-supply = <&reg_aldo1>;
 138 +       vcc-ph-supply = <&reg_dldo1>;
 139 +       vcc-pi-supply = <&reg_dldo1>;
 140 +};