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18ad298065f2d088c80c0ca7583a9cfa22798cf6
[openwrt/staging/stintel.git] / target / linux / starfive / patches-6.1 / 0117-driver-mfd-axp20x-Add-support-for-AXP15060.patch
1 From e62161318f2fe3e396fc31c50d210e99bec83021 Mon Sep 17 00:00:00 2001
2 From: "ziv.xu" <ziv.xu@starfive.com>
3 Date: Fri, 4 Aug 2023 13:53:10 +0800
4 Subject: [PATCH 117/122] driver: mfd: axp20x: Add support for AXP15060
5
6 axp20x add support for AXP15060
7
8 Signed-off-by: ziv.xu <ziv.xu@starfive.com>
9 ---
10 drivers/mfd/axp20x-i2c.c | 2 +
11 drivers/mfd/axp20x.c | 373 ++++++++++++++++++++++++++++++++++---
12 include/linux/mfd/axp20x.h | 218 +++++++++++++++++++++-
13 3 files changed, 557 insertions(+), 36 deletions(-)
14
15 --- a/drivers/mfd/axp20x-i2c.c
16 +++ b/drivers/mfd/axp20x-i2c.c
17 @@ -66,6 +66,7 @@ static const struct of_device_id axp20x_
18 { .compatible = "x-powers,axp223", .data = (void *)AXP223_ID },
19 { .compatible = "x-powers,axp803", .data = (void *)AXP803_ID },
20 { .compatible = "x-powers,axp806", .data = (void *)AXP806_ID },
21 + { .compatible = "x-powers,axp15060", .data = (void *)AXP15060_ID },
22 { },
23 };
24 MODULE_DEVICE_TABLE(of, axp20x_i2c_of_match);
25 @@ -79,6 +80,7 @@ static const struct i2c_device_id axp20x
26 { "axp223", 0 },
27 { "axp803", 0 },
28 { "axp806", 0 },
29 + { "axp15060", 0 },
30 { },
31 };
32 MODULE_DEVICE_TABLE(i2c, axp20x_i2c_id);
33 --- a/drivers/mfd/axp20x.c
34 +++ b/drivers/mfd/axp20x.c
35 @@ -23,7 +23,7 @@
36 #include <linux/mfd/core.h>
37 #include <linux/module.h>
38 #include <linux/of_device.h>
39 -#include <linux/pm_runtime.h>
40 +#include <linux/reboot.h>
41 #include <linux/regmap.h>
42 #include <linux/regulator/consumer.h>
43
44 @@ -34,15 +34,18 @@
45
46 static const char * const axp20x_model_names[] = {
47 "AXP152",
48 + "AXP192",
49 "AXP202",
50 "AXP209",
51 "AXP221",
52 "AXP223",
53 "AXP288",
54 + "AXP313a",
55 "AXP803",
56 "AXP806",
57 "AXP809",
58 "AXP813",
59 + "AXP15060",
60 };
61
62 static const struct regmap_range axp152_writeable_ranges[] = {
63 @@ -92,6 +95,35 @@ static const struct regmap_access_table
64 .n_yes_ranges = ARRAY_SIZE(axp20x_volatile_ranges),
65 };
66
67 +static const struct regmap_range axp192_writeable_ranges[] = {
68 + regmap_reg_range(AXP192_DATACACHE(0), AXP192_DATACACHE(5)),
69 + regmap_reg_range(AXP192_PWR_OUT_CTRL, AXP192_IRQ5_STATE),
70 + regmap_reg_range(AXP20X_DCDC_MODE, AXP192_N_RSTO_CTRL),
71 + regmap_reg_range(AXP20X_CC_CTRL, AXP20X_CC_CTRL),
72 +};
73 +
74 +static const struct regmap_range axp192_volatile_ranges[] = {
75 + regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP192_USB_OTG_STATUS),
76 + regmap_reg_range(AXP192_IRQ1_STATE, AXP192_IRQ4_STATE),
77 + regmap_reg_range(AXP192_IRQ5_STATE, AXP192_IRQ5_STATE),
78 + regmap_reg_range(AXP20X_ACIN_V_ADC_H, AXP20X_IPSOUT_V_HIGH_L),
79 + regmap_reg_range(AXP20X_TIMER_CTRL, AXP20X_TIMER_CTRL),
80 + regmap_reg_range(AXP192_GPIO2_0_STATE, AXP192_GPIO2_0_STATE),
81 + regmap_reg_range(AXP192_GPIO4_3_STATE, AXP192_GPIO4_3_STATE),
82 + regmap_reg_range(AXP192_N_RSTO_CTRL, AXP192_N_RSTO_CTRL),
83 + regmap_reg_range(AXP20X_CHRG_CC_31_24, AXP20X_CC_CTRL),
84 +};
85 +
86 +static const struct regmap_access_table axp192_writeable_table = {
87 + .yes_ranges = axp192_writeable_ranges,
88 + .n_yes_ranges = ARRAY_SIZE(axp192_writeable_ranges),
89 +};
90 +
91 +static const struct regmap_access_table axp192_volatile_table = {
92 + .yes_ranges = axp192_volatile_ranges,
93 + .n_yes_ranges = ARRAY_SIZE(axp192_volatile_ranges),
94 +};
95 +
96 /* AXP22x ranges are shared with the AXP809, as they cover the same range */
97 static const struct regmap_range axp22x_writeable_ranges[] = {
98 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE),
99 @@ -119,6 +151,7 @@ static const struct regmap_access_table
100
101 /* AXP288 ranges are shared with the AXP803, as they cover the same range */
102 static const struct regmap_range axp288_writeable_ranges[] = {
103 + regmap_reg_range(AXP288_POWER_REASON, AXP288_POWER_REASON),
104 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ6_STATE),
105 regmap_reg_range(AXP20X_DCDC_MODE, AXP288_FG_TUNE5),
106 };
107 @@ -154,6 +187,25 @@ static const struct regmap_range axp806_
108 regmap_reg_range(AXP806_REG_ADDR_EXT, AXP806_REG_ADDR_EXT),
109 };
110
111 +static const struct regmap_range axp313a_writeable_ranges[] = {
112 + regmap_reg_range(AXP313A_ON_INDICATE, AXP313A_IRQ_STATE),
113 +};
114 +
115 +static const struct regmap_range axp313a_volatile_ranges[] = {
116 + regmap_reg_range(AXP313A_SHUTDOWN_CTRL, AXP313A_SHUTDOWN_CTRL),
117 + regmap_reg_range(AXP313A_IRQ_STATE, AXP313A_IRQ_STATE),
118 +};
119 +
120 +static const struct regmap_access_table axp313a_writeable_table = {
121 + .yes_ranges = axp313a_writeable_ranges,
122 + .n_yes_ranges = ARRAY_SIZE(axp313a_writeable_ranges),
123 +};
124 +
125 +static const struct regmap_access_table axp313a_volatile_table = {
126 + .yes_ranges = axp313a_volatile_ranges,
127 + .n_yes_ranges = ARRAY_SIZE(axp313a_volatile_ranges),
128 +};
129 +
130 static const struct regmap_range axp806_volatile_ranges[] = {
131 regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE),
132 };
133 @@ -168,11 +220,49 @@ static const struct regmap_access_table
134 .n_yes_ranges = ARRAY_SIZE(axp806_volatile_ranges),
135 };
136
137 +static const struct regmap_range axp15060_writeable_ranges[] = {
138 + regmap_reg_range(AXP15060_PWR_OUT_CTRL1, AXP15060_DCDC_MODE_CTRL2),
139 + regmap_reg_range(AXP15060_OUTPUT_MONITOR_DISCHARGE, AXP15060_CPUSLDO_V_CTRL),
140 + regmap_reg_range(AXP15060_PWR_WAKEUP_CTRL, AXP15060_PWR_DISABLE_DOWN_SEQ),
141 + regmap_reg_range(AXP15060_PEK_KEY, AXP15060_PEK_KEY),
142 + regmap_reg_range(AXP15060_IRQ1_EN, AXP15060_IRQ2_EN),
143 + regmap_reg_range(AXP15060_IRQ1_STATE, AXP15060_IRQ2_STATE),
144 +};
145 +
146 +static const struct regmap_range axp15060_volatile_ranges[] = {
147 + regmap_reg_range(AXP15060_STARTUP_SRC, AXP15060_STARTUP_SRC),
148 + regmap_reg_range(AXP15060_PWR_WAKEUP_CTRL, AXP15060_PWR_DISABLE_DOWN_SEQ),
149 + regmap_reg_range(AXP15060_IRQ1_STATE, AXP15060_IRQ2_STATE),
150 +};
151 +
152 +static const struct regmap_access_table axp15060_writeable_table = {
153 + .yes_ranges = axp15060_writeable_ranges,
154 + .n_yes_ranges = ARRAY_SIZE(axp15060_writeable_ranges),
155 +};
156 +
157 +static const struct regmap_access_table axp15060_volatile_table = {
158 + .yes_ranges = axp15060_volatile_ranges,
159 + .n_yes_ranges = ARRAY_SIZE(axp15060_volatile_ranges),
160 +};
161 +
162 static const struct resource axp152_pek_resources[] = {
163 DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
164 DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
165 };
166
167 +static const struct resource axp192_ac_power_supply_resources[] = {
168 + DEFINE_RES_IRQ_NAMED(AXP192_IRQ_ACIN_PLUGIN, "ACIN_PLUGIN"),
169 + DEFINE_RES_IRQ_NAMED(AXP192_IRQ_ACIN_REMOVAL, "ACIN_REMOVAL"),
170 + DEFINE_RES_IRQ_NAMED(AXP192_IRQ_ACIN_OVER_V, "ACIN_OVER_V"),
171 +};
172 +
173 +static const struct resource axp192_usb_power_supply_resources[] = {
174 + DEFINE_RES_IRQ_NAMED(AXP192_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
175 + DEFINE_RES_IRQ_NAMED(AXP192_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
176 + DEFINE_RES_IRQ_NAMED(AXP192_IRQ_VBUS_VALID, "VBUS_VALID"),
177 + DEFINE_RES_IRQ_NAMED(AXP192_IRQ_VBUS_NOT_VALID, "VBUS_NOT_VALID"),
178 +};
179 +
180 static const struct resource axp20x_ac_power_supply_resources[] = {
181 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_PLUGIN, "ACIN_PLUGIN"),
182 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_REMOVAL, "ACIN_REMOVAL"),
183 @@ -221,6 +311,11 @@ static const struct resource axp288_fuel
184 DEFINE_RES_IRQ(AXP288_IRQ_WL1),
185 };
186
187 +static const struct resource axp313a_pek_resources[] = {
188 + DEFINE_RES_IRQ_NAMED(AXP313A_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
189 + DEFINE_RES_IRQ_NAMED(AXP313A_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
190 +};
191 +
192 static const struct resource axp803_pek_resources[] = {
193 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
194 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
195 @@ -236,6 +331,11 @@ static const struct resource axp809_pek_
196 DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
197 };
198
199 +static const struct resource axp15060_pek_resources[] = {
200 + DEFINE_RES_IRQ_NAMED(AXP15060_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
201 + DEFINE_RES_IRQ_NAMED(AXP15060_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
202 +};
203 +
204 static const struct regmap_config axp152_regmap_config = {
205 .reg_bits = 8,
206 .val_bits = 8,
207 @@ -245,6 +345,15 @@ static const struct regmap_config axp152
208 .cache_type = REGCACHE_RBTREE,
209 };
210
211 +static const struct regmap_config axp192_regmap_config = {
212 + .reg_bits = 8,
213 + .val_bits = 8,
214 + .wr_table = &axp192_writeable_table,
215 + .volatile_table = &axp192_volatile_table,
216 + .max_register = AXP20X_CC_CTRL,
217 + .cache_type = REGCACHE_RBTREE,
218 +};
219 +
220 static const struct regmap_config axp20x_regmap_config = {
221 .reg_bits = 8,
222 .val_bits = 8,
223 @@ -272,6 +381,15 @@ static const struct regmap_config axp288
224 .cache_type = REGCACHE_RBTREE,
225 };
226
227 +static const struct regmap_config axp313a_regmap_config = {
228 + .reg_bits = 8,
229 + .val_bits = 8,
230 + .wr_table = &axp313a_writeable_table,
231 + .volatile_table = &axp313a_volatile_table,
232 + .max_register = AXP313A_IRQ_STATE,
233 + .cache_type = REGCACHE_RBTREE,
234 +};
235 +
236 static const struct regmap_config axp806_regmap_config = {
237 .reg_bits = 8,
238 .val_bits = 8,
239 @@ -281,6 +399,15 @@ static const struct regmap_config axp806
240 .cache_type = REGCACHE_RBTREE,
241 };
242
243 +static const struct regmap_config axp15060_regmap_config = {
244 + .reg_bits = 8,
245 + .val_bits = 8,
246 + .wr_table = &axp15060_writeable_table,
247 + .volatile_table = &axp15060_volatile_table,
248 + .max_register = AXP15060_IRQ2_STATE,
249 + .cache_type = REGCACHE_RBTREE,
250 +};
251 +
252 #define INIT_REGMAP_IRQ(_variant, _irq, _off, _mask) \
253 [_variant##_IRQ_##_irq] = { .reg_offset = (_off), .mask = BIT(_mask) }
254
255 @@ -304,6 +431,42 @@ static const struct regmap_irq axp152_re
256 INIT_REGMAP_IRQ(AXP152, GPIO0_INPUT, 2, 0),
257 };
258
259 +static const struct regmap_irq axp192_regmap_irqs[] = {
260 + INIT_REGMAP_IRQ(AXP192, ACIN_OVER_V, 0, 7),
261 + INIT_REGMAP_IRQ(AXP192, ACIN_PLUGIN, 0, 6),
262 + INIT_REGMAP_IRQ(AXP192, ACIN_REMOVAL, 0, 5),
263 + INIT_REGMAP_IRQ(AXP192, VBUS_OVER_V, 0, 4),
264 + INIT_REGMAP_IRQ(AXP192, VBUS_PLUGIN, 0, 3),
265 + INIT_REGMAP_IRQ(AXP192, VBUS_REMOVAL, 0, 2),
266 + INIT_REGMAP_IRQ(AXP192, VBUS_V_LOW, 0, 1),
267 + INIT_REGMAP_IRQ(AXP192, BATT_PLUGIN, 1, 7),
268 + INIT_REGMAP_IRQ(AXP192, BATT_REMOVAL, 1, 6),
269 + INIT_REGMAP_IRQ(AXP192, BATT_ENT_ACT_MODE, 1, 5),
270 + INIT_REGMAP_IRQ(AXP192, BATT_EXIT_ACT_MODE, 1, 4),
271 + INIT_REGMAP_IRQ(AXP192, CHARG, 1, 3),
272 + INIT_REGMAP_IRQ(AXP192, CHARG_DONE, 1, 2),
273 + INIT_REGMAP_IRQ(AXP192, BATT_TEMP_HIGH, 1, 1),
274 + INIT_REGMAP_IRQ(AXP192, BATT_TEMP_LOW, 1, 0),
275 + INIT_REGMAP_IRQ(AXP192, DIE_TEMP_HIGH, 2, 7),
276 + INIT_REGMAP_IRQ(AXP192, CHARG_I_LOW, 2, 6),
277 + INIT_REGMAP_IRQ(AXP192, DCDC1_V_LONG, 2, 5),
278 + INIT_REGMAP_IRQ(AXP192, DCDC2_V_LONG, 2, 4),
279 + INIT_REGMAP_IRQ(AXP192, DCDC3_V_LONG, 2, 3),
280 + INIT_REGMAP_IRQ(AXP192, PEK_SHORT, 2, 1),
281 + INIT_REGMAP_IRQ(AXP192, PEK_LONG, 2, 0),
282 + INIT_REGMAP_IRQ(AXP192, N_OE_PWR_ON, 3, 7),
283 + INIT_REGMAP_IRQ(AXP192, N_OE_PWR_OFF, 3, 6),
284 + INIT_REGMAP_IRQ(AXP192, VBUS_VALID, 3, 5),
285 + INIT_REGMAP_IRQ(AXP192, VBUS_NOT_VALID, 3, 4),
286 + INIT_REGMAP_IRQ(AXP192, VBUS_SESS_VALID, 3, 3),
287 + INIT_REGMAP_IRQ(AXP192, VBUS_SESS_END, 3, 2),
288 + INIT_REGMAP_IRQ(AXP192, LOW_PWR_LVL, 3, 0),
289 + INIT_REGMAP_IRQ(AXP192, TIMER, 4, 7),
290 + INIT_REGMAP_IRQ(AXP192, GPIO2_INPUT, 4, 2),
291 + INIT_REGMAP_IRQ(AXP192, GPIO1_INPUT, 4, 1),
292 + INIT_REGMAP_IRQ(AXP192, GPIO0_INPUT, 4, 0),
293 +};
294 +
295 static const struct regmap_irq axp20x_regmap_irqs[] = {
296 INIT_REGMAP_IRQ(AXP20X, ACIN_OVER_V, 0, 7),
297 INIT_REGMAP_IRQ(AXP20X, ACIN_PLUGIN, 0, 6),
298 @@ -415,6 +578,16 @@ static const struct regmap_irq axp288_re
299 INIT_REGMAP_IRQ(AXP288, BC_USB_CHNG, 5, 1),
300 };
301
302 +static const struct regmap_irq axp313a_regmap_irqs[] = {
303 + INIT_REGMAP_IRQ(AXP313A, PEK_RIS_EDGE, 0, 7),
304 + INIT_REGMAP_IRQ(AXP313A, PEK_FAL_EDGE, 0, 6),
305 + INIT_REGMAP_IRQ(AXP313A, PEK_SHORT, 0, 5),
306 + INIT_REGMAP_IRQ(AXP313A, PEK_LONG, 0, 4),
307 + INIT_REGMAP_IRQ(AXP313A, DCDC3_V_LOW, 0, 3),
308 + INIT_REGMAP_IRQ(AXP313A, DCDC2_V_LOW, 0, 2),
309 + INIT_REGMAP_IRQ(AXP313A, DIE_TEMP_HIGH, 0, 0),
310 +};
311 +
312 static const struct regmap_irq axp803_regmap_irqs[] = {
313 INIT_REGMAP_IRQ(AXP803, ACIN_OVER_V, 0, 7),
314 INIT_REGMAP_IRQ(AXP803, ACIN_PLUGIN, 0, 6),
315 @@ -502,24 +675,65 @@ static const struct regmap_irq axp809_re
316 INIT_REGMAP_IRQ(AXP809, GPIO0_INPUT, 4, 0),
317 };
318
319 +static const struct regmap_irq axp15060_regmap_irqs[] = {
320 + INIT_REGMAP_IRQ(AXP15060, DIE_TEMP_HIGH_LV1, 0, 0),
321 + INIT_REGMAP_IRQ(AXP15060, DIE_TEMP_HIGH_LV2, 0, 1),
322 + INIT_REGMAP_IRQ(AXP15060, DCDC1_V_LOW, 0, 2),
323 + INIT_REGMAP_IRQ(AXP15060, DCDC2_V_LOW, 0, 3),
324 + INIT_REGMAP_IRQ(AXP15060, DCDC3_V_LOW, 0, 4),
325 + INIT_REGMAP_IRQ(AXP15060, DCDC4_V_LOW, 0, 5),
326 + INIT_REGMAP_IRQ(AXP15060, DCDC5_V_LOW, 0, 6),
327 + INIT_REGMAP_IRQ(AXP15060, DCDC6_V_LOW, 0, 7),
328 + INIT_REGMAP_IRQ(AXP15060, PEK_LONG, 1, 0),
329 + INIT_REGMAP_IRQ(AXP15060, PEK_SHORT, 1, 1),
330 + INIT_REGMAP_IRQ(AXP15060, GPIO1_INPUT, 1, 2),
331 + INIT_REGMAP_IRQ(AXP15060, PEK_FAL_EDGE, 1, 3),
332 + INIT_REGMAP_IRQ(AXP15060, PEK_RIS_EDGE, 1, 4),
333 + INIT_REGMAP_IRQ(AXP15060, GPIO2_INPUT, 1, 5),
334 +};
335 +
336 static const struct regmap_irq_chip axp152_regmap_irq_chip = {
337 .name = "axp152_irq_chip",
338 .status_base = AXP152_IRQ1_STATE,
339 .ack_base = AXP152_IRQ1_STATE,
340 - .mask_base = AXP152_IRQ1_EN,
341 - .mask_invert = true,
342 + .unmask_base = AXP152_IRQ1_EN,
343 .init_ack_masked = true,
344 .irqs = axp152_regmap_irqs,
345 .num_irqs = ARRAY_SIZE(axp152_regmap_irqs),
346 .num_regs = 3,
347 };
348
349 +static unsigned int axp192_get_irq_reg(struct regmap_irq_chip_data *data,
350 + unsigned int base, int index)
351 +{
352 + /* linear mapping for IRQ1 to IRQ4 */
353 + if (index < 4)
354 + return base + index;
355 +
356 + /* handle IRQ5 separately */
357 + if (base == AXP192_IRQ1_EN)
358 + return AXP192_IRQ5_EN;
359 +
360 + return AXP192_IRQ5_STATE;
361 +}
362 +
363 +static const struct regmap_irq_chip axp192_regmap_irq_chip = {
364 + .name = "axp192_irq_chip",
365 + .status_base = AXP192_IRQ1_STATE,
366 + .ack_base = AXP192_IRQ1_STATE,
367 + .unmask_base = AXP192_IRQ1_EN,
368 + .init_ack_masked = true,
369 + .irqs = axp192_regmap_irqs,
370 + .num_irqs = ARRAY_SIZE(axp192_regmap_irqs),
371 + .num_regs = 5,
372 + .get_irq_reg = axp192_get_irq_reg,
373 +};
374 +
375 static const struct regmap_irq_chip axp20x_regmap_irq_chip = {
376 .name = "axp20x_irq_chip",
377 .status_base = AXP20X_IRQ1_STATE,
378 .ack_base = AXP20X_IRQ1_STATE,
379 - .mask_base = AXP20X_IRQ1_EN,
380 - .mask_invert = true,
381 + .unmask_base = AXP20X_IRQ1_EN,
382 .init_ack_masked = true,
383 .irqs = axp20x_regmap_irqs,
384 .num_irqs = ARRAY_SIZE(axp20x_regmap_irqs),
385 @@ -531,8 +745,7 @@ static const struct regmap_irq_chip axp2
386 .name = "axp22x_irq_chip",
387 .status_base = AXP20X_IRQ1_STATE,
388 .ack_base = AXP20X_IRQ1_STATE,
389 - .mask_base = AXP20X_IRQ1_EN,
390 - .mask_invert = true,
391 + .unmask_base = AXP20X_IRQ1_EN,
392 .init_ack_masked = true,
393 .irqs = axp22x_regmap_irqs,
394 .num_irqs = ARRAY_SIZE(axp22x_regmap_irqs),
395 @@ -543,8 +756,7 @@ static const struct regmap_irq_chip axp2
396 .name = "axp288_irq_chip",
397 .status_base = AXP20X_IRQ1_STATE,
398 .ack_base = AXP20X_IRQ1_STATE,
399 - .mask_base = AXP20X_IRQ1_EN,
400 - .mask_invert = true,
401 + .unmask_base = AXP20X_IRQ1_EN,
402 .init_ack_masked = true,
403 .irqs = axp288_regmap_irqs,
404 .num_irqs = ARRAY_SIZE(axp288_regmap_irqs),
405 @@ -552,12 +764,22 @@ static const struct regmap_irq_chip axp2
406
407 };
408
409 +static const struct regmap_irq_chip axp313a_regmap_irq_chip = {
410 + .name = "axp313a_irq_chip",
411 + .status_base = AXP313A_IRQ_STATE,
412 + .ack_base = AXP313A_IRQ_STATE,
413 + .unmask_base = AXP313A_IRQ_EN,
414 + .init_ack_masked = true,
415 + .irqs = axp313a_regmap_irqs,
416 + .num_irqs = ARRAY_SIZE(axp313a_regmap_irqs),
417 + .num_regs = 1,
418 +};
419 +
420 static const struct regmap_irq_chip axp803_regmap_irq_chip = {
421 .name = "axp803",
422 .status_base = AXP20X_IRQ1_STATE,
423 .ack_base = AXP20X_IRQ1_STATE,
424 - .mask_base = AXP20X_IRQ1_EN,
425 - .mask_invert = true,
426 + .unmask_base = AXP20X_IRQ1_EN,
427 .init_ack_masked = true,
428 .irqs = axp803_regmap_irqs,
429 .num_irqs = ARRAY_SIZE(axp803_regmap_irqs),
430 @@ -568,8 +790,7 @@ static const struct regmap_irq_chip axp8
431 .name = "axp806",
432 .status_base = AXP20X_IRQ1_STATE,
433 .ack_base = AXP20X_IRQ1_STATE,
434 - .mask_base = AXP20X_IRQ1_EN,
435 - .mask_invert = true,
436 + .unmask_base = AXP20X_IRQ1_EN,
437 .init_ack_masked = true,
438 .irqs = axp806_regmap_irqs,
439 .num_irqs = ARRAY_SIZE(axp806_regmap_irqs),
440 @@ -580,14 +801,45 @@ static const struct regmap_irq_chip axp8
441 .name = "axp809",
442 .status_base = AXP20X_IRQ1_STATE,
443 .ack_base = AXP20X_IRQ1_STATE,
444 - .mask_base = AXP20X_IRQ1_EN,
445 - .mask_invert = true,
446 + .unmask_base = AXP20X_IRQ1_EN,
447 .init_ack_masked = true,
448 .irqs = axp809_regmap_irqs,
449 .num_irqs = ARRAY_SIZE(axp809_regmap_irqs),
450 .num_regs = 5,
451 };
452
453 +static const struct regmap_irq_chip axp15060_regmap_irq_chip = {
454 + .name = "axp15060",
455 + .status_base = AXP15060_IRQ1_STATE,
456 + .ack_base = AXP15060_IRQ1_STATE,
457 + .unmask_base = AXP15060_IRQ1_EN,
458 + .init_ack_masked = true,
459 + .irqs = axp15060_regmap_irqs,
460 + .num_irqs = ARRAY_SIZE(axp15060_regmap_irqs),
461 + .num_regs = 2,
462 +};
463 +
464 +static const struct mfd_cell axp192_cells[] = {
465 + {
466 + .name = "axp192-adc",
467 + .of_compatible = "x-powers,axp192-adc",
468 + }, {
469 + .name = "axp20x-battery-power-supply",
470 + .of_compatible = "x-powers,axp192-battery-power-supply",
471 + }, {
472 + .name = "axp20x-ac-power-supply",
473 + .of_compatible = "x-powers,axp202-ac-power-supply",
474 + .num_resources = ARRAY_SIZE(axp192_ac_power_supply_resources),
475 + .resources = axp192_ac_power_supply_resources,
476 + }, {
477 + .name = "axp20x-usb-power-supply",
478 + .of_compatible = "x-powers,axp192-usb-power-supply",
479 + .num_resources = ARRAY_SIZE(axp192_usb_power_supply_resources),
480 + .resources = axp192_usb_power_supply_resources,
481 + },
482 + { .name = "axp20x-regulator" },
483 +};
484 +
485 static const struct mfd_cell axp20x_cells[] = {
486 {
487 .name = "axp20x-gpio",
488 @@ -683,6 +935,11 @@ static const struct mfd_cell axp152_cell
489 },
490 };
491
492 +static struct mfd_cell axp313a_cells[] = {
493 + MFD_CELL_NAME("axp20x-regulator"),
494 + MFD_CELL_RES("axp313a-pek", axp313a_pek_resources),
495 +};
496 +
497 static const struct resource axp288_adc_resources[] = {
498 DEFINE_RES_IRQ_NAMED(AXP288_IRQ_GPADC, "GPADC"),
499 };
500 @@ -832,17 +1089,43 @@ static const struct mfd_cell axp813_cell
501 },
502 };
503
504 -static struct axp20x_dev *axp20x_pm_power_off;
505 -static void axp20x_power_off(void)
506 +static const struct mfd_cell axp15060_cells[] = {
507 + {
508 + .name = "axp221-pek",
509 + .num_resources = ARRAY_SIZE(axp15060_pek_resources),
510 + .resources = axp15060_pek_resources,
511 + }, {
512 + .name = "axp20x-regulator",
513 + },
514 +};
515 +
516 +/* For boards that don't have IRQ line connected to SOC. */
517 +static const struct mfd_cell axp_regulator_only_cells[] = {
518 + {
519 + .name = "axp20x-regulator",
520 + },
521 +};
522 +
523 +static int axp20x_power_off(struct sys_off_data *data)
524 {
525 - if (axp20x_pm_power_off->variant == AXP288_ID)
526 - return;
527 + struct axp20x_dev *axp20x = data->cb_data;
528 + unsigned int shutdown_reg;
529
530 - regmap_write(axp20x_pm_power_off->regmap, AXP20X_OFF_CTRL,
531 - AXP20X_OFF);
532 + switch (axp20x->variant) {
533 + case AXP313A_ID:
534 + shutdown_reg = AXP313A_SHUTDOWN_CTRL;
535 + break;
536 + default:
537 + shutdown_reg = AXP20X_OFF_CTRL;
538 + break;
539 + }
540 +
541 + regmap_write(axp20x->regmap, shutdown_reg, AXP20X_OFF);
542
543 /* Give capacitors etc. time to drain to avoid kernel panic msg. */
544 mdelay(500);
545 +
546 + return NOTIFY_DONE;
547 }
548
549 int axp20x_match_device(struct axp20x_dev *axp20x)
550 @@ -874,6 +1157,12 @@ int axp20x_match_device(struct axp20x_de
551 axp20x->regmap_cfg = &axp152_regmap_config;
552 axp20x->regmap_irq_chip = &axp152_regmap_irq_chip;
553 break;
554 + case AXP192_ID:
555 + axp20x->nr_cells = ARRAY_SIZE(axp192_cells);
556 + axp20x->cells = axp192_cells;
557 + axp20x->regmap_cfg = &axp192_regmap_config;
558 + axp20x->regmap_irq_chip = &axp192_regmap_irq_chip;
559 + break;
560 case AXP202_ID:
561 case AXP209_ID:
562 axp20x->nr_cells = ARRAY_SIZE(axp20x_cells);
563 @@ -900,6 +1189,12 @@ int axp20x_match_device(struct axp20x_de
564 axp20x->regmap_irq_chip = &axp288_regmap_irq_chip;
565 axp20x->irq_flags = IRQF_TRIGGER_LOW;
566 break;
567 + case AXP313A_ID:
568 + axp20x->nr_cells = ARRAY_SIZE(axp313a_cells);
569 + axp20x->cells = axp313a_cells;
570 + axp20x->regmap_cfg = &axp313a_regmap_config;
571 + axp20x->regmap_irq_chip = &axp313a_regmap_irq_chip;
572 + break;
573 case AXP803_ID:
574 axp20x->nr_cells = ARRAY_SIZE(axp803_cells);
575 axp20x->cells = axp803_cells;
576 @@ -942,6 +1237,28 @@ int axp20x_match_device(struct axp20x_de
577 */
578 axp20x->regmap_irq_chip = &axp803_regmap_irq_chip;
579 break;
580 + case AXP15060_ID:
581 + /*
582 + * Don't register the power key part if there is no interrupt
583 + * line.
584 + *
585 + * Since most use cases of AXP PMICs are Allwinner SOCs, board
586 + * designers follow Allwinner's reference design and connects
587 + * IRQ line to SOC, there's no need for those variants to deal
588 + * with cases that IRQ isn't connected. However, AXP15660 is
589 + * used by some other vendors' SOCs that didn't connect IRQ
590 + * line, we need to deal with this case.
591 + */
592 + if (axp20x->irq > 0) {
593 + axp20x->nr_cells = ARRAY_SIZE(axp15060_cells);
594 + axp20x->cells = axp15060_cells;
595 + } else {
596 + axp20x->nr_cells = ARRAY_SIZE(axp_regulator_only_cells);
597 + axp20x->cells = axp_regulator_only_cells;
598 + }
599 + axp20x->regmap_cfg = &axp15060_regmap_config;
600 + axp20x->regmap_irq_chip = &axp15060_regmap_irq_chip;
601 + break;
602 default:
603 dev_err(dev, "unsupported AXP20X ID %lu\n", axp20x->variant);
604 return -EINVAL;
605 @@ -1009,10 +1326,11 @@ int axp20x_device_probe(struct axp20x_de
606 return ret;
607 }
608
609 - if (!pm_power_off) {
610 - axp20x_pm_power_off = axp20x;
611 - pm_power_off = axp20x_power_off;
612 - }
613 + if (axp20x->variant != AXP288_ID)
614 + devm_register_sys_off_handler(axp20x->dev,
615 + SYS_OFF_MODE_POWER_OFF,
616 + SYS_OFF_PRIO_DEFAULT,
617 + axp20x_power_off, axp20x);
618
619 dev_info(axp20x->dev, "AXP20X driver loaded\n");
620
621 @@ -1022,11 +1340,6 @@ EXPORT_SYMBOL(axp20x_device_probe);
622
623 void axp20x_device_remove(struct axp20x_dev *axp20x)
624 {
625 - if (axp20x == axp20x_pm_power_off) {
626 - axp20x_pm_power_off = NULL;
627 - pm_power_off = NULL;
628 - }
629 -
630 mfd_remove_devices(axp20x->dev);
631 regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc);
632 }
633 --- a/include/linux/mfd/axp20x.h
634 +++ b/include/linux/mfd/axp20x.h
635 @@ -12,18 +12,22 @@
636
637 enum axp20x_variants {
638 AXP152_ID = 0,
639 + AXP192_ID,
640 AXP202_ID,
641 AXP209_ID,
642 AXP221_ID,
643 AXP223_ID,
644 AXP288_ID,
645 + AXP313A_ID,
646 AXP803_ID,
647 AXP806_ID,
648 AXP809_ID,
649 AXP813_ID,
650 + AXP15060_ID,
651 NR_AXP20X_VARIANTS,
652 };
653
654 +#define AXP192_DATACACHE(m) (0x06 + (m))
655 #define AXP20X_DATACACHE(m) (0x04 + (m))
656
657 /* Power supply */
658 @@ -45,6 +49,13 @@ enum axp20x_variants {
659 #define AXP152_DCDC_FREQ 0x37
660 #define AXP152_DCDC_MODE 0x80
661
662 +#define AXP192_USB_OTG_STATUS 0x04
663 +#define AXP192_PWR_OUT_CTRL 0x12
664 +#define AXP192_DCDC2_V_OUT 0x23
665 +#define AXP192_DCDC1_V_OUT 0x26
666 +#define AXP192_DCDC3_V_OUT 0x27
667 +#define AXP192_LDO2_3_V_OUT 0x28
668 +
669 #define AXP20X_PWR_INPUT_STATUS 0x00
670 #define AXP20X_PWR_OP_MODE 0x01
671 #define AXP20X_USB_OTG_STATUS 0x02
672 @@ -91,6 +102,17 @@ enum axp20x_variants {
673 #define AXP22X_ALDO3_V_OUT 0x2a
674 #define AXP22X_CHRG_CTRL3 0x35
675
676 +#define AXP313A_ON_INDICATE 0x00
677 +#define AXP313A_OUTPUT_CONTROL 0x10
678 +#define AXP313A_DCDC1_CONRTOL 0x13
679 +#define AXP313A_DCDC2_CONRTOL 0x14
680 +#define AXP313A_DCDC3_CONRTOL 0x15
681 +#define AXP313A_ALDO1_CONRTOL 0x16
682 +#define AXP313A_DLDO1_CONRTOL 0x17
683 +#define AXP313A_SHUTDOWN_CTRL 0x1a
684 +#define AXP313A_IRQ_EN 0x20
685 +#define AXP313A_IRQ_STATE 0x21
686 +
687 #define AXP806_STARTUP_SRC 0x00
688 #define AXP806_CHIP_ID 0x03
689 #define AXP806_PWR_OUT_CTRL1 0x10
690 @@ -131,6 +153,39 @@ enum axp20x_variants {
691 /* Other DCDC regulator control registers are the same as AXP803 */
692 #define AXP813_DCDC7_V_OUT 0x26
693
694 +#define AXP15060_STARTUP_SRC 0x00
695 +#define AXP15060_PWR_OUT_CTRL1 0x10
696 +#define AXP15060_PWR_OUT_CTRL2 0x11
697 +#define AXP15060_PWR_OUT_CTRL3 0x12
698 +#define AXP15060_DCDC1_V_CTRL 0x13
699 +#define AXP15060_DCDC2_V_CTRL 0x14
700 +#define AXP15060_DCDC3_V_CTRL 0x15
701 +#define AXP15060_DCDC4_V_CTRL 0x16
702 +#define AXP15060_DCDC5_V_CTRL 0x17
703 +#define AXP15060_DCDC6_V_CTRL 0x18
704 +#define AXP15060_ALDO1_V_CTRL 0x19
705 +#define AXP15060_DCDC_MODE_CTRL1 0x1a
706 +#define AXP15060_DCDC_MODE_CTRL2 0x1b
707 +#define AXP15060_OUTPUT_MONITOR_DISCHARGE 0x1e
708 +#define AXP15060_IRQ_PWROK_VOFF 0x1f
709 +#define AXP15060_ALDO2_V_CTRL 0x20
710 +#define AXP15060_ALDO3_V_CTRL 0x21
711 +#define AXP15060_ALDO4_V_CTRL 0x22
712 +#define AXP15060_ALDO5_V_CTRL 0x23
713 +#define AXP15060_BLDO1_V_CTRL 0x24
714 +#define AXP15060_BLDO2_V_CTRL 0x25
715 +#define AXP15060_BLDO3_V_CTRL 0x26
716 +#define AXP15060_BLDO4_V_CTRL 0x27
717 +#define AXP15060_BLDO5_V_CTRL 0x28
718 +#define AXP15060_CLDO1_V_CTRL 0x29
719 +#define AXP15060_CLDO2_V_CTRL 0x2a
720 +#define AXP15060_CLDO3_V_CTRL 0x2b
721 +#define AXP15060_CLDO4_V_CTRL 0x2d
722 +#define AXP15060_CPUSLDO_V_CTRL 0x2e
723 +#define AXP15060_PWR_WAKEUP_CTRL 0x31
724 +#define AXP15060_PWR_DISABLE_DOWN_SEQ 0x32
725 +#define AXP15060_PEK_KEY 0x36
726 +
727 /* Interrupt */
728 #define AXP152_IRQ1_EN 0x40
729 #define AXP152_IRQ2_EN 0x41
730 @@ -139,6 +194,17 @@ enum axp20x_variants {
731 #define AXP152_IRQ2_STATE 0x49
732 #define AXP152_IRQ3_STATE 0x4a
733
734 +#define AXP192_IRQ1_EN 0x40
735 +#define AXP192_IRQ2_EN 0x41
736 +#define AXP192_IRQ3_EN 0x42
737 +#define AXP192_IRQ4_EN 0x43
738 +#define AXP192_IRQ1_STATE 0x44
739 +#define AXP192_IRQ2_STATE 0x45
740 +#define AXP192_IRQ3_STATE 0x46
741 +#define AXP192_IRQ4_STATE 0x47
742 +#define AXP192_IRQ5_EN 0x4a
743 +#define AXP192_IRQ5_STATE 0x4d
744 +
745 #define AXP20X_IRQ1_EN 0x40
746 #define AXP20X_IRQ2_EN 0x41
747 #define AXP20X_IRQ3_EN 0x42
748 @@ -152,7 +218,17 @@ enum axp20x_variants {
749 #define AXP20X_IRQ5_STATE 0x4c
750 #define AXP20X_IRQ6_STATE 0x4d
751
752 +#define AXP15060_IRQ1_EN 0x40
753 +#define AXP15060_IRQ2_EN 0x41
754 +#define AXP15060_IRQ1_STATE 0x48
755 +#define AXP15060_IRQ2_STATE 0x49
756 +
757 /* ADC */
758 +#define AXP192_GPIO2_V_ADC_H 0x68
759 +#define AXP192_GPIO2_V_ADC_L 0x69
760 +#define AXP192_GPIO3_V_ADC_H 0x6a
761 +#define AXP192_GPIO3_V_ADC_L 0x6b
762 +
763 #define AXP20X_ACIN_V_ADC_H 0x56
764 #define AXP20X_ACIN_V_ADC_L 0x57
765 #define AXP20X_ACIN_I_ADC_H 0x58
766 @@ -182,6 +258,8 @@ enum axp20x_variants {
767 #define AXP20X_IPSOUT_V_HIGH_L 0x7f
768
769 /* Power supply */
770 +#define AXP192_GPIO30_IN_RANGE 0x85
771 +
772 #define AXP20X_DCDC_MODE 0x80
773 #define AXP20X_ADC_EN1 0x82
774 #define AXP20X_ADC_EN2 0x83
775 @@ -210,6 +288,16 @@ enum axp20x_variants {
776 #define AXP152_PWM1_FREQ_Y 0x9c
777 #define AXP152_PWM1_DUTY_CYCLE 0x9d
778
779 +#define AXP192_GPIO0_CTRL 0x90
780 +#define AXP192_LDO_IO0_V_OUT 0x91
781 +#define AXP192_GPIO1_CTRL 0x92
782 +#define AXP192_GPIO2_CTRL 0x93
783 +#define AXP192_GPIO2_0_STATE 0x94
784 +#define AXP192_GPIO4_3_CTRL 0x95
785 +#define AXP192_GPIO4_3_STATE 0x96
786 +#define AXP192_GPIO2_0_PULL 0x97
787 +#define AXP192_N_RSTO_CTRL 0x9e
788 +
789 #define AXP20X_GPIO0_CTRL 0x90
790 #define AXP20X_LDO5_V_OUT 0x91
791 #define AXP20X_GPIO1_CTRL 0x92
792 @@ -222,6 +310,8 @@ enum axp20x_variants {
793 #define AXP22X_GPIO_STATE 0x94
794 #define AXP22X_GPIO_PULL_DOWN 0x95
795
796 +#define AXP15060_CLDO4_GPIO2_MODESET 0x2c
797 +
798 /* Battery */
799 #define AXP20X_CHRG_CC_31_24 0xb0
800 #define AXP20X_CHRG_CC_23_16 0xb1
801 @@ -288,6 +378,17 @@ enum axp20x_variants {
802
803 /* Regulators IDs */
804 enum {
805 + AXP192_DCDC1 = 0,
806 + AXP192_DCDC2,
807 + AXP192_DCDC3,
808 + AXP192_LDO1,
809 + AXP192_LDO2,
810 + AXP192_LDO3,
811 + AXP192_LDO_IO0,
812 + AXP192_REG_ID_MAX
813 +};
814 +
815 +enum {
816 AXP20X_LDO1 = 0,
817 AXP20X_LDO2,
818 AXP20X_LDO3,
819 @@ -323,6 +424,16 @@ enum {
820 };
821
822 enum {
823 + AXP313A_DCDC1 = 0,
824 + AXP313A_DCDC2,
825 + AXP313A_DCDC3,
826 + AXP313A_ALDO1,
827 + AXP313A_DLDO1,
828 + AXP313A_RTC_LDO,
829 + AXP313A_REG_ID_MAX,
830 +};
831 +
832 +enum {
833 AXP806_DCDCA = 0,
834 AXP806_DCDCB,
835 AXP806_DCDCC,
836 @@ -419,6 +530,33 @@ enum {
837 AXP813_REG_ID_MAX,
838 };
839
840 +enum {
841 + AXP15060_DCDC1 = 0,
842 + AXP15060_DCDC2,
843 + AXP15060_DCDC3,
844 + AXP15060_DCDC4,
845 + AXP15060_DCDC5,
846 + AXP15060_DCDC6,
847 + AXP15060_ALDO1,
848 + AXP15060_ALDO2,
849 + AXP15060_ALDO3,
850 + AXP15060_ALDO4,
851 + AXP15060_ALDO5,
852 + AXP15060_BLDO1,
853 + AXP15060_BLDO2,
854 + AXP15060_BLDO3,
855 + AXP15060_BLDO4,
856 + AXP15060_BLDO5,
857 + AXP15060_CLDO1,
858 + AXP15060_CLDO2,
859 + AXP15060_CLDO3,
860 + AXP15060_CLDO4,
861 + AXP15060_CPUSLDO,
862 + AXP15060_SW,
863 + AXP15060_RTC_LDO,
864 + AXP15060_REG_ID_MAX,
865 +};
866 +
867 /* IRQs */
868 enum {
869 AXP152_IRQ_LDO0IN_CONNECT = 1,
870 @@ -432,14 +570,51 @@ enum {
871 AXP152_IRQ_PEK_SHORT,
872 AXP152_IRQ_PEK_LONG,
873 AXP152_IRQ_TIMER,
874 - AXP152_IRQ_PEK_RIS_EDGE,
875 + /* out of bit order to make sure the press event is handled first */
876 AXP152_IRQ_PEK_FAL_EDGE,
877 + AXP152_IRQ_PEK_RIS_EDGE,
878 AXP152_IRQ_GPIO3_INPUT,
879 AXP152_IRQ_GPIO2_INPUT,
880 AXP152_IRQ_GPIO1_INPUT,
881 AXP152_IRQ_GPIO0_INPUT,
882 };
883
884 +enum axp192_irqs {
885 + AXP192_IRQ_ACIN_OVER_V = 1,
886 + AXP192_IRQ_ACIN_PLUGIN,
887 + AXP192_IRQ_ACIN_REMOVAL,
888 + AXP192_IRQ_VBUS_OVER_V,
889 + AXP192_IRQ_VBUS_PLUGIN,
890 + AXP192_IRQ_VBUS_REMOVAL,
891 + AXP192_IRQ_VBUS_V_LOW,
892 + AXP192_IRQ_BATT_PLUGIN,
893 + AXP192_IRQ_BATT_REMOVAL,
894 + AXP192_IRQ_BATT_ENT_ACT_MODE,
895 + AXP192_IRQ_BATT_EXIT_ACT_MODE,
896 + AXP192_IRQ_CHARG,
897 + AXP192_IRQ_CHARG_DONE,
898 + AXP192_IRQ_BATT_TEMP_HIGH,
899 + AXP192_IRQ_BATT_TEMP_LOW,
900 + AXP192_IRQ_DIE_TEMP_HIGH,
901 + AXP192_IRQ_CHARG_I_LOW,
902 + AXP192_IRQ_DCDC1_V_LONG,
903 + AXP192_IRQ_DCDC2_V_LONG,
904 + AXP192_IRQ_DCDC3_V_LONG,
905 + AXP192_IRQ_PEK_SHORT = 22,
906 + AXP192_IRQ_PEK_LONG,
907 + AXP192_IRQ_N_OE_PWR_ON,
908 + AXP192_IRQ_N_OE_PWR_OFF,
909 + AXP192_IRQ_VBUS_VALID,
910 + AXP192_IRQ_VBUS_NOT_VALID,
911 + AXP192_IRQ_VBUS_SESS_VALID,
912 + AXP192_IRQ_VBUS_SESS_END,
913 + AXP192_IRQ_LOW_PWR_LVL = 31,
914 + AXP192_IRQ_TIMER,
915 + AXP192_IRQ_GPIO2_INPUT = 37,
916 + AXP192_IRQ_GPIO1_INPUT,
917 + AXP192_IRQ_GPIO0_INPUT,
918 +};
919 +
920 enum {
921 AXP20X_IRQ_ACIN_OVER_V = 1,
922 AXP20X_IRQ_ACIN_PLUGIN,
923 @@ -472,8 +647,9 @@ enum {
924 AXP20X_IRQ_LOW_PWR_LVL1,
925 AXP20X_IRQ_LOW_PWR_LVL2,
926 AXP20X_IRQ_TIMER,
927 - AXP20X_IRQ_PEK_RIS_EDGE,
928 + /* out of bit order to make sure the press event is handled first */
929 AXP20X_IRQ_PEK_FAL_EDGE,
930 + AXP20X_IRQ_PEK_RIS_EDGE,
931 AXP20X_IRQ_GPIO3_INPUT,
932 AXP20X_IRQ_GPIO2_INPUT,
933 AXP20X_IRQ_GPIO1_INPUT,
934 @@ -502,8 +678,9 @@ enum axp22x_irqs {
935 AXP22X_IRQ_LOW_PWR_LVL1,
936 AXP22X_IRQ_LOW_PWR_LVL2,
937 AXP22X_IRQ_TIMER,
938 - AXP22X_IRQ_PEK_RIS_EDGE,
939 + /* out of bit order to make sure the press event is handled first */
940 AXP22X_IRQ_PEK_FAL_EDGE,
941 + AXP22X_IRQ_PEK_RIS_EDGE,
942 AXP22X_IRQ_GPIO1_INPUT,
943 AXP22X_IRQ_GPIO0_INPUT,
944 };
945 @@ -545,6 +722,16 @@ enum axp288_irqs {
946 AXP288_IRQ_BC_USB_CHNG,
947 };
948
949 +enum axp313a_irqs {
950 + AXP313A_IRQ_DIE_TEMP_HIGH,
951 + AXP313A_IRQ_DCDC2_V_LOW = 2,
952 + AXP313A_IRQ_DCDC3_V_LOW,
953 + AXP313A_IRQ_PEK_LONG,
954 + AXP313A_IRQ_PEK_SHORT,
955 + AXP313A_IRQ_PEK_FAL_EDGE,
956 + AXP313A_IRQ_PEK_RIS_EDGE,
957 +};
958 +
959 enum axp803_irqs {
960 AXP803_IRQ_ACIN_OVER_V = 1,
961 AXP803_IRQ_ACIN_PLUGIN,
962 @@ -571,8 +758,9 @@ enum axp803_irqs {
963 AXP803_IRQ_LOW_PWR_LVL1,
964 AXP803_IRQ_LOW_PWR_LVL2,
965 AXP803_IRQ_TIMER,
966 - AXP803_IRQ_PEK_RIS_EDGE,
967 + /* out of bit order to make sure the press event is handled first */
968 AXP803_IRQ_PEK_FAL_EDGE,
969 + AXP803_IRQ_PEK_RIS_EDGE,
970 AXP803_IRQ_PEK_SHORT,
971 AXP803_IRQ_PEK_LONG,
972 AXP803_IRQ_PEK_OVER_OFF,
973 @@ -623,8 +811,9 @@ enum axp809_irqs {
974 AXP809_IRQ_LOW_PWR_LVL1,
975 AXP809_IRQ_LOW_PWR_LVL2,
976 AXP809_IRQ_TIMER,
977 - AXP809_IRQ_PEK_RIS_EDGE,
978 + /* out of bit order to make sure the press event is handled first */
979 AXP809_IRQ_PEK_FAL_EDGE,
980 + AXP809_IRQ_PEK_RIS_EDGE,
981 AXP809_IRQ_PEK_SHORT,
982 AXP809_IRQ_PEK_LONG,
983 AXP809_IRQ_PEK_OVER_OFF,
984 @@ -632,6 +821,23 @@ enum axp809_irqs {
985 AXP809_IRQ_GPIO0_INPUT,
986 };
987
988 +enum axp15060_irqs {
989 + AXP15060_IRQ_DIE_TEMP_HIGH_LV1 = 1,
990 + AXP15060_IRQ_DIE_TEMP_HIGH_LV2,
991 + AXP15060_IRQ_DCDC1_V_LOW,
992 + AXP15060_IRQ_DCDC2_V_LOW,
993 + AXP15060_IRQ_DCDC3_V_LOW,
994 + AXP15060_IRQ_DCDC4_V_LOW,
995 + AXP15060_IRQ_DCDC5_V_LOW,
996 + AXP15060_IRQ_DCDC6_V_LOW,
997 + AXP15060_IRQ_PEK_LONG,
998 + AXP15060_IRQ_PEK_SHORT,
999 + AXP15060_IRQ_GPIO1_INPUT,
1000 + AXP15060_IRQ_PEK_FAL_EDGE,
1001 + AXP15060_IRQ_PEK_RIS_EDGE,
1002 + AXP15060_IRQ_GPIO2_INPUT,
1003 +};
1004 +
1005 struct axp20x_dev {
1006 struct device *dev;
1007 int irq;
1008 @@ -698,4 +904,4 @@ int axp20x_device_probe(struct axp20x_de
1009 */
1010 void axp20x_device_remove(struct axp20x_dev *axp20x);
1011
1012 -#endif /* __LINUX_MFD_AXP20X_H */
1013 +#endif /* __LINUX_MFD_AXP20X_H */
1014 \ No newline at end of file
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