41fdbdae20b2b482670224aa2b0371e04f345395
[openwrt/staging/stintel.git] / target / linux / realtek / dts-5.10 / rtl838x.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 /dts-v1/;
4
5 #define STRINGIZE(s) #s
6 #define LAN_LABEL(p, s) STRINGIZE(p ## s)
7 #define SWITCH_PORT_LABEL(n) LAN_LABEL(lan, n)
8
9 #define INTERNAL_PHY(n) \
10 phy##n: ethernet-phy@##n { \
11 reg = <##n>; \
12 compatible = "ethernet-phy-ieee802.3-c22"; \
13 phy-is-integrated; \
14 };
15
16 #define EXTERNAL_PHY(n) \
17 phy##n: ethernet-phy@##n { \
18 reg = <##n>; \
19 compatible = "ethernet-phy-ieee802.3-c22"; \
20 };
21
22 #define EXTERNAL_SFP_PHY(n) \
23 phy##n: ethernet-phy@##n { \
24 compatible = "ethernet-phy-ieee802.3-c22"; \
25 sfp; \
26 media = "fibre"; \
27 reg = <##n>; \
28 };
29
30 #define EXTERNAL_SFP_PHY_FULL(n, s) \
31 phy##n: ethernet-phy@##n { \
32 compatible = "ethernet-phy-ieee802.3-c22"; \
33 sfp = <&sfp##s>; \
34 reg = <##n>; \
35 };
36
37 #define SWITCH_PORT(n, s, m) \
38 port@##n { \
39 reg = <##n>; \
40 label = SWITCH_PORT_LABEL(s) ; \
41 phy-handle = <&phy##n>; \
42 phy-mode = #m ; \
43 };
44
45 #define SWITCH_SFP_PORT(n, s, m) \
46 port@##n { \
47 reg = <##n>; \
48 label = SWITCH_PORT_LABEL(s) ; \
49 phy-handle = <&phy##n>; \
50 phy-mode = #m ; \
51 fixed-link { \
52 speed = <1000>; \
53 full-duplex; \
54 }; \
55 };
56
57 / {
58 #address-cells = <1>;
59 #size-cells = <1>;
60
61 compatible = "realtek,rtl838x-soc";
62
63 cpus {
64 #address-cells = <1>;
65 #size-cells = <0>;
66 frequency = <500000000>;
67
68 cpu@0 {
69 compatible = "mips,mips4KEc";
70 reg = <0>;
71 };
72 };
73
74 chosen {
75 bootargs = "console=ttyS0,115200";
76 };
77
78 lx_clk: lx_clk {
79 compatible = "fixed-clock";
80 #clock-cells = <0>;
81 clock-frequency = <200000000>;
82 };
83
84 cpuintc: cpuintc {
85 compatible = "mti,cpu-interrupt-controller";
86 #address-cells = <0>;
87 #interrupt-cells = <1>;
88 interrupt-controller;
89 };
90
91 soc: soc {
92 compatible = "simple-bus";
93 #address-cells = <1>;
94 #size-cells = <1>;
95 ranges = <0x0 0x18000000 0x10000>;
96
97 intc: interrupt-controller@3000 {
98 compatible = "realtek,rtl8380-intc", "realtek,rtl-intc";
99 reg = <0x3000 0x18>;
100 interrupt-controller;
101 #interrupt-cells = <2>;
102
103 interrupt-parent = <&cpuintc>;
104 interrupts = <2>, <3>, <4>, <5>, <6>;
105 };
106
107 spi0: spi@1200 {
108 compatible = "realtek,rtl8380-spi";
109 reg = <0x1200 0x100>;
110
111 #address-cells = <1>;
112 #size-cells = <0>;
113 };
114
115 uart0: uart@2000 {
116 compatible = "ns16550a";
117 reg = <0x2000 0x100>;
118
119 clocks = <&lx_clk>;
120
121 interrupt-parent = <&intc>;
122 interrupts = <31 1>;
123
124 reg-io-width = <1>;
125 reg-shift = <2>;
126 fifo-size = <1>;
127 no-loopback-test;
128 };
129
130 uart1: uart@2100 {
131 pinctrl-names = "default";
132 pinctrl-0 = <&enable_uart1>;
133
134 compatible = "ns16550a";
135 reg = <0x2100 0x100>;
136
137 clocks = <&lx_clk>;
138
139 interrupt-parent = <&intc>;
140 interrupts = <30 0>;
141
142 reg-io-width = <1>;
143 reg-shift = <2>;
144 fifo-size = <1>;
145 no-loopback-test;
146
147 status = "disabled";
148 };
149
150 watchdog0: watchdog@3150 {
151 compatible = "realtek,rtl8380-wdt";
152 reg = <0x3150 0xc>;
153
154 realtek,reset-mode = "soc";
155
156 clocks = <&lx_clk>;
157 timeout-sec = <30>;
158
159 interrupt-parent = <&intc>;
160 interrupt-names = "phase1", "phase2";
161 interrupts = <19 3>, <18 4>;
162 };
163
164 gpio0: gpio-controller@3500 {
165 compatible = "realtek,rtl8380-gpio", "realtek,otto-gpio";
166 reg = <0x3500 0x20>;
167
168 gpio-controller;
169 #gpio-cells = <2>;
170 ngpios = <24>;
171
172 interrupt-controller;
173 #interrupt-cells = <2>;
174 interrupt-parent = <&intc>;
175 interrupts = <23 3>;
176 };
177 };
178
179 pinmux: pinmux@1b001000 {
180 compatible = "pinctrl-single";
181 reg = <0x1b001000 0x4>;
182
183 pinctrl-single,bit-per-mux;
184 pinctrl-single,register-width = <32>;
185 pinctrl-single,function-mask = <0x1>;
186 #pinctrl-cells = <2>;
187
188 enable_uart1: pinmux_enable_uart1 {
189 pinctrl-single,bits = <0x0 0x10 0x10>;
190 };
191 };
192
193 /* LED_GLB_CTRL */
194 pinmux_led: pinmux@1b00a000 {
195 compatible = "pinctrl-single";
196 reg = <0x1b00a000 0x4>;
197
198 pinctrl-single,bit-per-mux;
199 pinctrl-single,register-width = <32>;
200 pinctrl-single,function-mask = <0x1>;
201 #pinctrl-cells = <2>;
202
203 /* enable GPIO 0 */
204 pinmux_disable_sys_led: disable_sys_led {
205 pinctrl-single,bits = <0x0 0x0 0x8000>;
206 };
207 };
208
209 ethernet0: ethernet@1b00a300 {
210 compatible = "realtek,rtl838x-eth";
211 reg = <0x1b00a300 0x100>;
212 interrupt-parent = <&intc>;
213 interrupts = <24 3>;
214 #interrupt-cells = <1>;
215 phy-mode = "internal";
216
217 fixed-link {
218 speed = <1000>;
219 full-duplex;
220 };
221 };
222
223 switch0: switch@1b000000 {
224 compatible = "realtek,rtl83xx-switch";
225
226 interrupt-parent = <&intc>;
227 interrupts = <20 2>;
228 };
229 };