59043b2f6f79948e0a69500243ec45e8e19caf0a
[openwrt/staging/stintel.git] / target / linux / realtek / dts-5.10 / rtl8382_hpe_1920-16g.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "rtl8382_hpe_1920.dtsi"
4
5 / {
6 compatible = "hpe,1920-16g", "realtek,rtl838x-soc";
7 model = "HPE 1920-16G (JG923A)";
8 };
9
10 &switch0 {
11 ports {
12 #address-cells = <1>;
13 #size-cells = <0>;
14
15 SWITCH_PORT(8, 1, internal)
16 SWITCH_PORT(9, 2, internal)
17 SWITCH_PORT(10, 3, internal)
18 SWITCH_PORT(11, 4, internal)
19 SWITCH_PORT(12, 5, internal)
20 SWITCH_PORT(13, 6, internal)
21 SWITCH_PORT(14, 7, internal)
22 SWITCH_PORT(15, 8, internal)
23
24 SWITCH_PORT(16, 9, qsgmii)
25 SWITCH_PORT(17, 10, qsgmii)
26 SWITCH_PORT(18, 11, qsgmii)
27 SWITCH_PORT(19, 12, qsgmii)
28 SWITCH_PORT(20, 13, qsgmii)
29 SWITCH_PORT(21, 14, qsgmii)
30 SWITCH_PORT(22, 15, qsgmii)
31 SWITCH_PORT(23, 16, qsgmii)
32
33 SWITCH_PORT(24, 17, qsgmii)
34 SWITCH_PORT(25, 18, qsgmii)
35 SWITCH_PORT(26, 19, qsgmii)
36 SWITCH_PORT(27, 20, qsgmii)
37
38 port@28 {
39 ethernet = <&ethernet0>;
40 reg = <28>;
41 phy-mode = "internal";
42 fixed-link {
43 speed = <1000>;
44 full-duplex;
45 };
46 };
47 };
48 };