e151f445901574bf65ef6c173d84be7644b90337
[openwrt/staging/stintel.git] / target / linux / ramips / files / drivers / pinctrl / pinctrl-aw9523.c
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Awinic AW9523B i2c pin controller driver
4 * Copyright (c) 2020, AngeloGioacchino Del Regno
5 * <angelogioacchino.delregno@somainline.org>
6 */
7
8 #include <linux/bitfield.h>
9 #include <linux/regmap.h>
10 #include <linux/i2c.h>
11 #include <linux/init.h>
12 #include <linux/interrupt.h>
13 #include <linux/irq.h>
14 #include <linux/mutex.h>
15 #include <linux/module.h>
16 #include <linux/slab.h>
17 #include <linux/of.h>
18 #include <linux/of_device.h>
19 #include <linux/version.h>
20 #include <linux/gpio/consumer.h>
21 #include <linux/gpio/driver.h>
22 #include <linux/pinctrl/pinconf.h>
23 #include <linux/pinctrl/pinctrl.h>
24 #include <linux/pinctrl/pinmux.h>
25 #include <linux/pinctrl/pinconf-generic.h>
26 #include <linux/regulator/consumer.h>
27
28 #include "core.h"
29 #include "pinconf.h"
30 #include "pinctrl-utils.h"
31
32 #define AW9523_MAX_FUNCS 2
33 #define AW9523_NUM_PORTS 2
34 #define AW9523_PINS_PER_PORT 8
35
36 /*
37 * HW needs at least 20uS for reset and at least 1-2uS to recover from
38 * reset, but we have to account for eventual board quirks, if any:
39 * for this reason, keep reset asserted for 50uS and wait for 20uS
40 * to recover from the reset.
41 */
42 #define AW9523_HW_RESET_US 50
43 #define AW9523_HW_RESET_RECOVERY_US 20
44
45 /* Port 0: P0_0...P0_7 - Port 1: P1_0...P1_7 */
46 #define AW9523_PIN_TO_PORT(pin) (pin >> 3)
47 #define AW9523_REG_IN_STATE(pin) (0x00 + AW9523_PIN_TO_PORT(pin))
48 #define AW9523_REG_OUT_STATE(pin) (0x02 + AW9523_PIN_TO_PORT(pin))
49 #define AW9523_REG_CONF_STATE(pin) (0x04 + AW9523_PIN_TO_PORT(pin))
50 #define AW9523_REG_INTR_DIS(pin) (0x06 + AW9523_PIN_TO_PORT(pin))
51 #define AW9523_REG_CHIPID 0x10
52 #define AW9523_VAL_EXPECTED_CHIPID 0x23
53
54 #define AW9523_REG_GCR 0x11
55 #define AW9523_GCR_ISEL_MASK GENMASK(0, 1)
56 #define AW9523_GCR_GPOMD_MASK BIT(4)
57
58 #define AW9523_REG_PORT_MODE(pin) (0x12 + AW9523_PIN_TO_PORT(pin))
59 #define AW9523_REG_SOFT_RESET 0x7f
60 #define AW9523_VAL_RESET 0x00
61
62 /*
63 * struct aw9523_irq - Interrupt controller structure
64 * @lock: mutex locking for the irq bus
65 * @irqchip: structure holding irqchip params
66 * @cached_gpio: stores the previous gpio status for bit comparison
67 */
68 struct aw9523_irq {
69 struct mutex lock;
70 struct irq_chip *irqchip;
71 u16 cached_gpio;
72 };
73
74 /*
75 * struct aw9523_pinmux - Pin mux params
76 * @name: Name of the mux
77 * @grps: Groups of the mux
78 * @num_grps: Number of groups (sizeof array grps)
79 */
80 struct aw9523_pinmux {
81 const char *name;
82 const char * const *grps;
83 const u8 num_grps;
84 };
85
86 /*
87 * struct aw9523 - Main driver structure
88 * @dev: device handle
89 * @regmap: regmap handle for current device
90 * @i2c_lock: Mutex lock for i2c operations
91 * @reset_gpio: Hardware reset (RSTN) signal GPIO
92 * @vio_vreg: VCC regulator (Optional)
93 * @pctl: pinctrl handle for current device
94 * @gpio: structure holding gpiochip params
95 * @irq: Interrupt controller structure
96 */
97 struct aw9523 {
98 struct device *dev;
99 struct regmap *regmap;
100 struct mutex i2c_lock;
101 struct gpio_desc *reset_gpio;
102 struct regulator *vio_vreg;
103 struct pinctrl_dev *pctl;
104 struct gpio_chip gpio;
105 struct aw9523_irq *irq;
106 };
107
108 static const struct pinctrl_pin_desc aw9523_pins[] = {
109 /* Port 0 */
110 PINCTRL_PIN(0, "gpio0"),
111 PINCTRL_PIN(1, "gpio1"),
112 PINCTRL_PIN(2, "gpio2"),
113 PINCTRL_PIN(3, "gpio3"),
114 PINCTRL_PIN(4, "gpio4"),
115 PINCTRL_PIN(5, "gpio5"),
116 PINCTRL_PIN(6, "gpio6"),
117 PINCTRL_PIN(7, "gpio7"),
118
119 /* Port 1 */
120 PINCTRL_PIN(8, "gpio8"),
121 PINCTRL_PIN(9, "gpio9"),
122 PINCTRL_PIN(10, "gpio10"),
123 PINCTRL_PIN(11, "gpio11"),
124 PINCTRL_PIN(12, "gpio12"),
125 PINCTRL_PIN(13, "gpio13"),
126 PINCTRL_PIN(14, "gpio14"),
127 PINCTRL_PIN(15, "gpio15"),
128 };
129
130 static int aw9523_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
131 {
132 return ARRAY_SIZE(aw9523_pins);
133 }
134
135 static const char *aw9523_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
136 unsigned int selector)
137 {
138 return aw9523_pins[selector].name;
139 }
140
141 static int aw9523_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
142 unsigned int selector,
143 const unsigned int **pins,
144 unsigned int *num_pins)
145 {
146 *pins = &aw9523_pins[selector].number;
147 *num_pins = 1;
148 return 0;
149 }
150
151 static const struct pinctrl_ops aw9523_pinctrl_ops = {
152 .get_groups_count = aw9523_pinctrl_get_groups_count,
153 .get_group_pins = aw9523_pinctrl_get_group_pins,
154 .get_group_name = aw9523_pinctrl_get_group_name,
155 .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
156 .dt_free_map = pinconf_generic_dt_free_map,
157 };
158
159 static const char * const gpio_pwm_groups[] = {
160 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5",
161 "gpio6", "gpio7", "gpio8", "gpio9", "gpio10", "gpio11",
162 "gpio12", "gpio13", "gpio14", "gpio15"
163 };
164
165 /* Warning: Do NOT reorder this array */
166 static const struct aw9523_pinmux aw9523_pmx[] = {
167 {
168 .name = "pwm",
169 .grps = gpio_pwm_groups,
170 .num_grps = ARRAY_SIZE(gpio_pwm_groups),
171 },
172 {
173 .name = "gpio",
174 .grps = gpio_pwm_groups,
175 .num_grps = ARRAY_SIZE(gpio_pwm_groups),
176 },
177 };
178
179 static int aw9523_pmx_get_funcs_count(struct pinctrl_dev *pctl)
180 {
181 return ARRAY_SIZE(aw9523_pmx);
182 }
183
184 static const char *aw9523_pmx_get_fname(struct pinctrl_dev *pctl,
185 unsigned int sel)
186 {
187 return aw9523_pmx[sel].name;
188 }
189
190 static int aw9523_pmx_get_groups(struct pinctrl_dev *pctl, unsigned int sel,
191 const char * const **groups,
192 unsigned int * const num_groups)
193 {
194 *groups = aw9523_pmx[sel].grps;
195 *num_groups = aw9523_pmx[sel].num_grps;
196 return 0;
197 }
198
199 static int aw9523_pmx_set_mux(struct pinctrl_dev *pctl, unsigned int fsel,
200 unsigned int grp)
201 {
202 struct aw9523 *awi = pinctrl_dev_get_drvdata(pctl);
203 int ret, pin = aw9523_pins[grp].number % AW9523_PINS_PER_PORT;
204
205 if (fsel >= ARRAY_SIZE(aw9523_pmx))
206 return -EINVAL;
207
208 /*
209 * This maps directly to the aw9523_pmx array: programming a
210 * high bit means "gpio" and a low bit means "pwm".
211 */
212 mutex_lock(&awi->i2c_lock);
213 ret = regmap_update_bits(awi->regmap, AW9523_REG_PORT_MODE(pin),
214 BIT(pin), (fsel ? BIT(pin) : 0));
215 mutex_unlock(&awi->i2c_lock);
216 return ret;
217 }
218
219 static const struct pinmux_ops aw9523_pinmux_ops = {
220 .get_functions_count = aw9523_pmx_get_funcs_count,
221 .get_function_name = aw9523_pmx_get_fname,
222 .get_function_groups = aw9523_pmx_get_groups,
223 .set_mux = aw9523_pmx_set_mux,
224 };
225
226 static int aw9523_pcfg_param_to_reg(enum pin_config_param pcp, int pin, u8 *r)
227 {
228 u8 reg;
229
230 switch (pcp) {
231 case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT:
232 case PIN_CONFIG_BIAS_PULL_DOWN:
233 case PIN_CONFIG_BIAS_PULL_UP:
234 reg = AW9523_REG_IN_STATE(pin);
235 break;
236 case PIN_CONFIG_DRIVE_OPEN_DRAIN:
237 case PIN_CONFIG_DRIVE_PUSH_PULL:
238 reg = AW9523_REG_GCR;
239 break;
240 case PIN_CONFIG_INPUT_ENABLE:
241 case PIN_CONFIG_OUTPUT_ENABLE:
242 reg = AW9523_REG_CONF_STATE(pin);
243 break;
244 case PIN_CONFIG_OUTPUT:
245 reg = AW9523_REG_OUT_STATE(pin);
246 break;
247 default:
248 return -ENOTSUPP;
249 }
250 *r = reg;
251
252 return 0;
253 }
254
255 static int aw9523_pconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
256 unsigned long *config)
257 {
258 struct aw9523 *awi = pinctrl_dev_get_drvdata(pctldev);
259 enum pin_config_param param = pinconf_to_config_param(*config);
260 int regbit = pin % AW9523_PINS_PER_PORT;
261 unsigned int val;
262 u8 reg;
263 int rc;
264
265 rc = aw9523_pcfg_param_to_reg(param, pin, &reg);
266 if (rc)
267 return rc;
268
269 mutex_lock(&awi->i2c_lock);
270 rc = regmap_read(awi->regmap, reg, &val);
271 mutex_unlock(&awi->i2c_lock);
272 if (rc)
273 return rc;
274
275 switch (param) {
276 case PIN_CONFIG_BIAS_PULL_UP:
277 case PIN_CONFIG_INPUT_ENABLE:
278 case PIN_CONFIG_OUTPUT:
279 val &= BIT(regbit);
280 break;
281 case PIN_CONFIG_BIAS_PULL_DOWN:
282 case PIN_CONFIG_OUTPUT_ENABLE:
283 val &= BIT(regbit);
284 val = !val;
285 break;
286 case PIN_CONFIG_DRIVE_OPEN_DRAIN:
287 if (pin >= AW9523_PINS_PER_PORT)
288 val = 0;
289 else
290 val = !FIELD_GET(AW9523_GCR_GPOMD_MASK, val);
291 break;
292 case PIN_CONFIG_DRIVE_PUSH_PULL:
293 if (pin >= AW9523_PINS_PER_PORT)
294 val = 1;
295 else
296 val = FIELD_GET(AW9523_GCR_GPOMD_MASK, val);
297 break;
298 default:
299 return -ENOTSUPP;
300 }
301 if (val < 1)
302 return -EINVAL;
303
304 *config = pinconf_to_config_packed(param, !!val);
305
306 return rc;
307 }
308
309 static int aw9523_pconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
310 unsigned long *configs, unsigned int num_configs)
311 {
312 struct aw9523 *awi = pinctrl_dev_get_drvdata(pctldev);
313 enum pin_config_param param;
314 int regbit = pin % AW9523_PINS_PER_PORT;
315 u32 arg;
316 u8 reg;
317 unsigned int mask, val;
318 int i, rc;
319
320 mutex_lock(&awi->i2c_lock);
321 for (i = 0; i < num_configs; i++) {
322 param = pinconf_to_config_param(configs[i]);
323 arg = pinconf_to_config_argument(configs[i]);
324
325 rc = aw9523_pcfg_param_to_reg(param, pin, &reg);
326 if (rc)
327 goto end;
328
329 switch (param) {
330 case PIN_CONFIG_OUTPUT:
331 /* First, enable pin output */
332 rc = regmap_update_bits(awi->regmap,
333 AW9523_REG_CONF_STATE(pin),
334 BIT(regbit), 0);
335 if (rc)
336 goto end;
337
338 /* Then, fall through to config output level */
339 fallthrough;
340 case PIN_CONFIG_OUTPUT_ENABLE:
341 arg = !arg;
342 fallthrough;
343 case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT:
344 case PIN_CONFIG_BIAS_PULL_DOWN:
345 case PIN_CONFIG_BIAS_PULL_UP:
346 case PIN_CONFIG_INPUT_ENABLE:
347 mask = BIT(regbit);
348 val = arg ? BIT(regbit) : 0;
349 break;
350 case PIN_CONFIG_DRIVE_OPEN_DRAIN:
351 /* Open-Drain is supported only on port 0 */
352 if (pin >= AW9523_PINS_PER_PORT) {
353 rc = -ENOTSUPP;
354 goto end;
355 }
356 mask = AW9523_GCR_GPOMD_MASK;
357 val = 0;
358 break;
359 case PIN_CONFIG_DRIVE_PUSH_PULL:
360 /* Port 1 is always Push-Pull */
361 if (pin >= AW9523_PINS_PER_PORT) {
362 mask = 0;
363 val = 0;
364 continue;
365 }
366 mask = AW9523_GCR_GPOMD_MASK;
367 val = AW9523_GCR_GPOMD_MASK;
368 break;
369 default:
370 rc = -ENOTSUPP;
371 goto end;
372 }
373
374 rc = regmap_update_bits(awi->regmap, reg, mask, val);
375 if (rc)
376 goto end;
377 }
378 end:
379 mutex_unlock(&awi->i2c_lock);
380 return rc;
381 }
382
383 static const struct pinconf_ops aw9523_pinconf_ops = {
384 .pin_config_get = aw9523_pconf_get,
385 .pin_config_set = aw9523_pconf_set,
386 .is_generic = true,
387 };
388
389 /*
390 * aw9523_get_pin_direction - Get pin direction
391 * @regmap: Regmap structure
392 * @pin: gpiolib pin number
393 * @n: pin index in port register
394 *
395 * Return: Pin direction for success or negative number for error
396 */
397 static int aw9523_get_pin_direction(struct regmap *regmap, u8 pin, u8 n)
398 {
399 int val, ret;
400
401 ret = regmap_read(regmap, AW9523_REG_CONF_STATE(pin), &val);
402 if (ret < 0)
403 return ret;
404
405 return (val & BIT(n)) == BIT(n);
406 }
407
408 /*
409 * aw9523_get_port_state - Get input or output state for entire port
410 * @regmap: Regmap structure
411 * @pin: gpiolib pin number
412 * @regbit: hw pin index, used to retrieve port number
413 * @state: returned port state
414 *
415 * Return: Zero for success or negative number for error
416 */
417 static int aw9523_get_port_state(struct regmap *regmap, u8 pin,
418 u8 regbit, unsigned int *state)
419 {
420 u8 reg;
421 int dir;
422
423 dir = aw9523_get_pin_direction(regmap, pin, regbit);
424 if (dir < 0)
425 return dir;
426
427 if (dir == GPIO_LINE_DIRECTION_IN)
428 reg = AW9523_REG_IN_STATE(pin);
429 else
430 reg = AW9523_REG_OUT_STATE(pin);
431
432 return regmap_read(regmap, reg, state);
433 }
434
435 static int aw9523_gpio_irq_type(struct irq_data *d, unsigned int type)
436 {
437 switch (type) {
438 case IRQ_TYPE_NONE:
439 case IRQ_TYPE_EDGE_BOTH:
440 return 0;
441 default:
442 return -EINVAL;
443 };
444 }
445
446 /*
447 * aw9523_irq_mask - Mask interrupt
448 * @d: irq data
449 *
450 * Sets which interrupt to mask in the bitmap;
451 * The interrupt will be masked when unlocking the irq bus.
452 */
453 static void aw9523_irq_mask(struct irq_data *d)
454 {
455 struct aw9523 *awi = gpiochip_get_data(irq_data_get_irq_chip_data(d));
456 unsigned int n = d->hwirq % AW9523_PINS_PER_PORT;
457
458 regmap_update_bits(awi->regmap,
459 AW9523_REG_INTR_DIS(d->hwirq),
460 BIT(n), BIT(n));
461 }
462
463 /*
464 * aw9523_irq_unmask - Unmask interrupt
465 * @d: irq data
466 *
467 * Sets which interrupt to unmask in the bitmap;
468 * The interrupt will be masked when unlocking the irq bus.
469 */
470 static void aw9523_irq_unmask(struct irq_data *d)
471 {
472 struct aw9523 *awi = gpiochip_get_data(irq_data_get_irq_chip_data(d));
473 unsigned int n = d->hwirq % AW9523_PINS_PER_PORT;
474
475 regmap_update_bits(awi->regmap,
476 AW9523_REG_INTR_DIS(d->hwirq),
477 BIT(n), 0);
478 }
479
480 static irqreturn_t aw9523_irq_thread_func(int irq, void *dev_id)
481 {
482 struct aw9523 *awi = (struct aw9523 *)dev_id;
483 unsigned long n, val = 0;
484 unsigned long changed_gpio;
485 unsigned int tmp, port_pin, i, ret;
486
487 for (i = 0; i < AW9523_NUM_PORTS; i++) {
488 port_pin = i * AW9523_PINS_PER_PORT;
489 ret = regmap_read(awi->regmap,
490 AW9523_REG_IN_STATE(port_pin),
491 &tmp);
492 if (ret)
493 return ret;
494 val |= (u8)tmp << (i * 8);
495 }
496
497 /* Handle GPIO input release interrupt as well */
498 changed_gpio = awi->irq->cached_gpio ^ val;
499 awi->irq->cached_gpio = val;
500
501 /*
502 * To avoid up to four *slow* i2c reads from any driver hooked
503 * up to our interrupts, just check for the irq_find_mapping
504 * result: if the interrupt is not mapped, then we don't want
505 * to care about it.
506 */
507 for_each_set_bit(n, &changed_gpio, awi->gpio.ngpio) {
508 tmp = irq_find_mapping(awi->gpio.irq.domain, n);
509 if (tmp <= 0)
510 continue;
511 handle_nested_irq(tmp);
512 }
513
514 return IRQ_HANDLED;
515 }
516
517 /*
518 * aw9523_irq_bus_lock - Grab lock for interrupt operation
519 * @d: irq data
520 */
521 static void aw9523_irq_bus_lock(struct irq_data *d)
522 {
523 struct aw9523 *awi = gpiochip_get_data(irq_data_get_irq_chip_data(d));
524
525 mutex_lock(&awi->irq->lock);
526 regcache_cache_only(awi->regmap, true);
527 }
528
529 /*
530 * aw9523_irq_bus_sync_unlock - Synchronize state and unlock
531 * @d: irq data
532 *
533 * Writes the interrupt mask bits (found in the bit map) to the
534 * hardware, then unlocks the bus.
535 */
536 static void aw9523_irq_bus_sync_unlock(struct irq_data *d)
537 {
538 struct aw9523 *awi = gpiochip_get_data(irq_data_get_irq_chip_data(d));
539
540 regcache_cache_only(awi->regmap, false);
541 regcache_sync(awi->regmap);
542 mutex_unlock(&awi->irq->lock);
543 }
544
545 static int aw9523_gpio_get_direction(struct gpio_chip *chip,
546 unsigned int offset)
547 {
548 struct aw9523 *awi = gpiochip_get_data(chip);
549 u8 regbit = offset % AW9523_PINS_PER_PORT;
550 int ret;
551
552 mutex_lock(&awi->i2c_lock);
553 ret = aw9523_get_pin_direction(awi->regmap, offset, regbit);
554 mutex_unlock(&awi->i2c_lock);
555
556 return ret;
557 }
558
559 static int aw9523_gpio_get(struct gpio_chip *chip, unsigned int offset)
560 {
561 struct aw9523 *awi = gpiochip_get_data(chip);
562 u8 regbit = offset % AW9523_PINS_PER_PORT;
563 unsigned int val;
564 int ret;
565
566 mutex_lock(&awi->i2c_lock);
567 ret = aw9523_get_port_state(awi->regmap, offset, regbit, &val);
568 mutex_unlock(&awi->i2c_lock);
569 if (ret)
570 return ret;
571
572 return !!(val & BIT(regbit));
573 }
574
575 /**
576 * _aw9523_gpio_get_multiple - Get I/O state for an entire port
577 * @regmap: Regmap structure
578 * @pin: gpiolib pin number
579 * @regbit: hw pin index, used to retrieve port number
580 * @state: returned port I/O state
581 *
582 * Return: Zero for success or negative number for error
583 */
584 static int _aw9523_gpio_get_multiple(struct aw9523 *awi, u8 regbit,
585 u8 *state, u8 mask)
586 {
587 u32 dir_in, val;
588 u8 m;
589 int ret;
590
591 /* Registers are 8-bits wide */
592 ret = regmap_read(awi->regmap, AW9523_REG_CONF_STATE(regbit), &dir_in);
593 if (ret)
594 return ret;
595 *state = 0;
596
597 m = mask & dir_in;
598 if (m) {
599 ret = regmap_read(awi->regmap, AW9523_REG_IN_STATE(regbit),
600 &val);
601 if (ret)
602 return ret;
603 *state |= (u8)val & m;
604 }
605
606 m = mask & ~dir_in;
607 if (m) {
608 ret = regmap_read(awi->regmap, AW9523_REG_OUT_STATE(regbit),
609 &val);
610 if (ret)
611 return ret;
612 *state |= (u8)val & m;
613 }
614
615 return 0;
616 }
617
618 static int aw9523_gpio_get_multiple(struct gpio_chip *chip,
619 unsigned long *mask,
620 unsigned long *bits)
621 {
622 struct aw9523 *awi = gpiochip_get_data(chip);
623 u8 m, state = 0;
624 int ret;
625
626 mutex_lock(&awi->i2c_lock);
627
628 /* Port 0 (gpio 0-7) */
629 m = *mask & U8_MAX;
630 if (m) {
631 ret = _aw9523_gpio_get_multiple(awi, 0, &state, m);
632 if (ret)
633 goto out;
634 }
635 *bits = state;
636
637 /* Port 1 (gpio 8-15) */
638 m = (*mask >> 8) & U8_MAX;
639 if (m) {
640 ret = _aw9523_gpio_get_multiple(awi, AW9523_PINS_PER_PORT,
641 &state, m);
642 if (ret)
643 goto out;
644
645 *bits |= (state << 8);
646 }
647 out:
648 mutex_unlock(&awi->i2c_lock);
649 return ret;
650 }
651
652 static void aw9523_gpio_set_multiple(struct gpio_chip *chip,
653 unsigned long *mask,
654 unsigned long *bits)
655 {
656 struct aw9523 *awi = gpiochip_get_data(chip);
657 u8 mask_lo, mask_hi, bits_lo, bits_hi;
658 unsigned int reg;
659 int ret = 0;
660
661 mask_lo = *mask & U8_MAX;
662 mask_hi = (*mask >> 8) & U8_MAX;
663 mutex_lock(&awi->i2c_lock);
664 if (mask_hi) {
665 reg = AW9523_REG_OUT_STATE(AW9523_PINS_PER_PORT);
666 bits_hi = (*bits >> 8) & U8_MAX;
667
668 ret = regmap_write_bits(awi->regmap, reg, mask_hi, bits_hi);
669 if (ret) {
670 dev_warn(awi->dev, "Cannot write port1 out level\n");
671 goto out;
672 }
673 }
674 if (mask_lo) {
675 reg = AW9523_REG_OUT_STATE(0);
676 bits_lo = *bits & U8_MAX;
677 ret = regmap_write_bits(awi->regmap, reg, mask_lo, bits_lo);
678 if (ret)
679 dev_warn(awi->dev, "Cannot write port0 out level\n");
680 }
681 out:
682 mutex_unlock(&awi->i2c_lock);
683 }
684
685 static void aw9523_gpio_set(struct gpio_chip *chip,
686 unsigned int offset, int value)
687 {
688 struct aw9523 *awi = gpiochip_get_data(chip);
689 u8 regbit = offset % AW9523_PINS_PER_PORT;
690
691 mutex_lock(&awi->i2c_lock);
692 regmap_update_bits(awi->regmap, AW9523_REG_OUT_STATE(offset),
693 BIT(regbit), value ? BIT(regbit) : 0);
694 mutex_unlock(&awi->i2c_lock);
695 }
696
697
698 static int aw9523_direction_input(struct gpio_chip *chip, unsigned int offset)
699 {
700 struct aw9523 *awi = gpiochip_get_data(chip);
701 u8 regbit = offset % AW9523_PINS_PER_PORT;
702 int ret;
703
704 mutex_lock(&awi->i2c_lock);
705 ret = regmap_update_bits(awi->regmap, AW9523_REG_CONF_STATE(offset),
706 BIT(regbit), BIT(regbit));
707 mutex_unlock(&awi->i2c_lock);
708
709 return ret;
710 }
711
712 static int aw9523_direction_output(struct gpio_chip *chip,
713 unsigned int offset, int value)
714 {
715 struct aw9523 *awi = gpiochip_get_data(chip);
716 u8 regbit = offset % AW9523_PINS_PER_PORT;
717 int ret;
718
719 mutex_lock(&awi->i2c_lock);
720 ret = regmap_update_bits(awi->regmap, AW9523_REG_OUT_STATE(offset),
721 BIT(regbit), value ? BIT(regbit) : 0);
722 if (ret)
723 goto end;
724
725 ret = regmap_update_bits(awi->regmap, AW9523_REG_CONF_STATE(offset),
726 BIT(regbit), 0);
727 end:
728 mutex_unlock(&awi->i2c_lock);
729 return ret;
730 }
731
732 static int aw9523_drive_reset_gpio(struct aw9523 *awi)
733 {
734 unsigned int chip_id;
735 int ret;
736
737 /*
738 * If the chip is already configured for any reason, then we
739 * will probably succeed in sending the soft reset signal to
740 * the hardware through I2C: this operation takes less time
741 * compared to a full HW reset and it gives the same results.
742 */
743 ret = regmap_write(awi->regmap, AW9523_REG_SOFT_RESET, 0);
744 if (ret == 0)
745 goto done;
746
747 dev_dbg(awi->dev, "Cannot execute soft reset: trying hard reset\n");
748 ret = gpiod_direction_output(awi->reset_gpio, 0);
749 if (ret)
750 return ret;
751
752 /* The reset pulse has to be longer than 20uS due to deglitch */
753 usleep_range(AW9523_HW_RESET_US, AW9523_HW_RESET_US + 1);
754
755 ret = gpiod_direction_output(awi->reset_gpio, 1);
756 if (ret)
757 return ret;
758 done:
759 /* The HW needs at least 1uS to reliably recover after reset */
760 usleep_range(AW9523_HW_RESET_RECOVERY_US,
761 AW9523_HW_RESET_RECOVERY_US + 1);
762
763 /* Check the ChipID */
764 ret = regmap_read(awi->regmap, AW9523_REG_CHIPID, &chip_id);
765 if (ret) {
766 dev_err(awi->dev, "Cannot read Chip ID: %d\n", ret);
767 return ret;
768 }
769 if (chip_id != AW9523_VAL_EXPECTED_CHIPID) {
770 dev_err(awi->dev, "Bad ChipID; read 0x%x, expected 0x%x\n",
771 chip_id, AW9523_VAL_EXPECTED_CHIPID);
772 return -EINVAL;
773 }
774
775 return 0;
776 }
777
778 static int aw9523_hw_reset(struct aw9523 *awi)
779 {
780 int ret, max_retries = 2;
781
782 /* Sometimes the chip needs more than one reset cycle */
783 do {
784 ret = aw9523_drive_reset_gpio(awi);
785 if (ret == 0)
786 break;
787 max_retries--;
788 } while (max_retries);
789
790 return ret;
791 }
792
793 static int aw9523_init_gpiochip(struct aw9523 *awi, unsigned int npins)
794 {
795 struct device *dev = awi->dev;
796 struct gpio_chip *gpiochip = &awi->gpio;
797
798 gpiochip->label = devm_kstrdup(dev, dev_name(dev), GFP_KERNEL);
799 if (!gpiochip->label)
800 return -ENOMEM;
801
802 gpiochip->base = -1;
803 gpiochip->ngpio = npins;
804 gpiochip->get_direction = aw9523_gpio_get_direction;
805 gpiochip->direction_input = aw9523_direction_input;
806 gpiochip->direction_output = aw9523_direction_output;
807 gpiochip->get = aw9523_gpio_get;
808 gpiochip->get_multiple = aw9523_gpio_get_multiple;
809 gpiochip->set = aw9523_gpio_set;
810 gpiochip->set_multiple = aw9523_gpio_set_multiple;
811 gpiochip->set_config = gpiochip_generic_config;
812 gpiochip->parent = dev;
813 gpiochip->of_node = dev->of_node;
814 gpiochip->owner = THIS_MODULE;
815 gpiochip->can_sleep = true;
816
817 return 0;
818 }
819
820 static int aw9523_init_irq(struct aw9523 *awi, int irq)
821 {
822 struct device *dev = awi->dev;
823 struct gpio_irq_chip *gpioirq;
824 struct irq_chip *irqchip;
825 int ret;
826
827 if (!device_property_read_bool(dev, "interrupt-controller"))
828 return 0;
829
830 irqchip = devm_kzalloc(dev, sizeof(*irqchip), GFP_KERNEL);
831 if (!irqchip)
832 return -ENOMEM;
833
834 awi->irq = devm_kzalloc(dev, sizeof(*awi->irq), GFP_KERNEL);
835 if (!awi->irq)
836 return -ENOMEM;
837
838 irqchip->name = devm_kstrdup(dev, dev_name(dev), GFP_KERNEL);
839 if (!irqchip->name)
840 return -ENOMEM;
841
842 irqchip->irq_mask = aw9523_irq_mask;
843 irqchip->irq_unmask = aw9523_irq_unmask;
844 irqchip->irq_bus_lock = aw9523_irq_bus_lock;
845 irqchip->irq_bus_sync_unlock = aw9523_irq_bus_sync_unlock;
846 irqchip->irq_set_type = aw9523_gpio_irq_type;
847 awi->irq->irqchip = irqchip;
848 mutex_init(&awi->irq->lock);
849
850 ret = devm_request_threaded_irq(dev, irq, NULL, aw9523_irq_thread_func,
851 IRQF_ONESHOT, dev_name(dev), awi);
852 if (ret) {
853 dev_err(dev, "Failed to request irq %d\n", irq);
854 return ret;
855 }
856
857 gpioirq = &awi->gpio.irq;
858 gpioirq->chip = irqchip;
859 gpioirq->parent_handler = NULL;
860 gpioirq->num_parents = 0;
861 gpioirq->parents = NULL;
862 gpioirq->default_type = IRQ_TYPE_LEVEL_MASK;
863 gpioirq->handler = handle_simple_irq;
864 gpioirq->threaded = true;
865 gpioirq->first = 0;
866
867 return 0;
868 }
869
870 static bool aw9523_is_reg_hole(unsigned int reg)
871 {
872 return (reg > AW9523_REG_PORT_MODE(AW9523_PINS_PER_PORT) &&
873 reg < AW9523_REG_SOFT_RESET) ||
874 (reg > AW9523_REG_INTR_DIS(AW9523_PINS_PER_PORT) &&
875 reg < AW9523_REG_CHIPID);
876 }
877
878 static bool aw9523_readable_reg(struct device *dev, unsigned int reg)
879 {
880 /* All available registers (minus holes) can be read */
881 return !aw9523_is_reg_hole(reg);
882 }
883
884 static bool aw9523_volatile_reg(struct device *dev, unsigned int reg)
885 {
886 return aw9523_is_reg_hole(reg) ||
887 reg == AW9523_REG_IN_STATE(0) ||
888 reg == AW9523_REG_IN_STATE(AW9523_PINS_PER_PORT) ||
889 reg == AW9523_REG_CHIPID ||
890 reg == AW9523_REG_SOFT_RESET;
891 }
892
893 static bool aw9523_writeable_reg(struct device *dev, unsigned int reg)
894 {
895 return !aw9523_is_reg_hole(reg) && reg != AW9523_REG_CHIPID;
896 }
897
898 static bool aw9523_precious_reg(struct device *dev, unsigned int reg)
899 {
900 /* Reading AW9523_REG_IN_STATE clears interrupt status */
901 return aw9523_is_reg_hole(reg) ||
902 reg == AW9523_REG_IN_STATE(0) ||
903 reg == AW9523_REG_IN_STATE(AW9523_PINS_PER_PORT);
904 }
905
906 static const struct regmap_config aw9523_regmap = {
907 .reg_bits = 8,
908 .val_bits = 8,
909 .reg_stride = 1,
910
911 .precious_reg = aw9523_precious_reg,
912 .readable_reg = aw9523_readable_reg,
913 .volatile_reg = aw9523_volatile_reg,
914 .writeable_reg = aw9523_writeable_reg,
915
916 .cache_type = REGCACHE_FLAT,
917 .disable_locking = true,
918
919 .num_reg_defaults_raw = AW9523_REG_SOFT_RESET,
920 };
921
922 static int aw9523_hw_init(struct aw9523 *awi)
923 {
924 u8 p1_pin = AW9523_PINS_PER_PORT;
925 unsigned int val;
926 int ret;
927
928 /* No register caching during initialization */
929 regcache_cache_bypass(awi->regmap, true);
930
931 /* Bring up the chip */
932 ret = aw9523_hw_reset(awi);
933 if (ret) {
934 dev_err(awi->dev, "HW Reset failed: %d\n", ret);
935 return ret;
936 }
937
938 /*
939 * This is the expected chip and it is running: it's time to
940 * set a safe default configuration in case the user doesn't
941 * configure (all of the available) pins in this chip.
942 * P.S.: The writes order doesn't matter.
943 */
944
945 /* Set all pins as GPIO */
946 ret = regmap_write(awi->regmap, AW9523_REG_PORT_MODE(0), U8_MAX);
947 if (ret)
948 return ret;
949 ret = regmap_write(awi->regmap, AW9523_REG_PORT_MODE(p1_pin), U8_MAX);
950 if (ret)
951 return ret;
952
953 /* Set Open-Drain mode on Port 0 (Port 1 is always P-P) */
954 ret = regmap_write(awi->regmap, AW9523_REG_GCR, 0);
955 if (ret)
956 return ret;
957
958 /* Set all pins as inputs */
959 ret = regmap_write(awi->regmap, AW9523_REG_CONF_STATE(0), U8_MAX);
960 if (ret)
961 return ret;
962 ret = regmap_write(awi->regmap, AW9523_REG_CONF_STATE(p1_pin), U8_MAX);
963 if (ret)
964 return ret;
965
966 /* Disable all interrupts to avoid unreasoned wakeups */
967 ret = regmap_write(awi->regmap, AW9523_REG_INTR_DIS(0), U8_MAX);
968 if (ret)
969 return ret;
970 ret = regmap_write(awi->regmap, AW9523_REG_INTR_DIS(p1_pin), U8_MAX);
971 if (ret)
972 return ret;
973
974 /* Clear setup-generated interrupts by performing a port state read */
975 ret = aw9523_get_port_state(awi->regmap, 0, 0, &val);
976 if (ret)
977 return ret;
978 ret = aw9523_get_port_state(awi->regmap, p1_pin, 0, &val);
979 if (ret)
980 return ret;
981
982 /* Everything went fine: activate and reinitialize register cache */
983 regcache_cache_bypass(awi->regmap, false);
984 return regmap_reinit_cache(awi->regmap, &aw9523_regmap);
985 }
986
987 static int aw9523_probe(struct i2c_client *client,
988 const struct i2c_device_id *id)
989 {
990 struct device *dev = &client->dev;
991 struct pinctrl_desc *pdesc;
992 struct aw9523 *awi;
993 int ret;
994
995 awi = devm_kzalloc(dev, sizeof(*awi), GFP_KERNEL);
996 if (!awi)
997 return -ENOMEM;
998
999 i2c_set_clientdata(client, awi);
1000
1001 awi->dev = dev;
1002 awi->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
1003 if (IS_ERR(awi->reset_gpio))
1004 return PTR_ERR(awi->reset_gpio);
1005 gpiod_set_consumer_name(awi->reset_gpio, "aw9523 reset");
1006
1007 awi->regmap = devm_regmap_init_i2c(client, &aw9523_regmap);
1008 if (IS_ERR(awi->regmap))
1009 return PTR_ERR(awi->regmap);
1010
1011 awi->vio_vreg = devm_regulator_get_optional(dev, "vio");
1012 if (IS_ERR(awi->vio_vreg)) {
1013 if (PTR_ERR(awi->vio_vreg) == -EPROBE_DEFER)
1014 return -EPROBE_DEFER;
1015 awi->vio_vreg = NULL;
1016 } else {
1017 ret = regulator_enable(awi->vio_vreg);
1018 if (ret)
1019 return ret;
1020 }
1021
1022 mutex_init(&awi->i2c_lock);
1023 lockdep_set_subclass(&awi->i2c_lock,
1024 i2c_adapter_depth(client->adapter));
1025
1026 pdesc = devm_kzalloc(dev, sizeof(*pdesc), GFP_KERNEL);
1027 if (!pdesc)
1028 return -ENOMEM;
1029
1030 ret = aw9523_hw_init(awi);
1031 if (ret)
1032 goto err_disable_vregs;
1033
1034 pdesc->name = dev_name(dev);
1035 pdesc->owner = THIS_MODULE;
1036 pdesc->pctlops = &aw9523_pinctrl_ops;
1037 pdesc->pmxops = &aw9523_pinmux_ops;
1038 pdesc->confops = &aw9523_pinconf_ops;
1039 pdesc->pins = aw9523_pins;
1040 pdesc->npins = ARRAY_SIZE(aw9523_pins);
1041
1042 ret = aw9523_init_gpiochip(awi, pdesc->npins);
1043 if (ret)
1044 goto err_disable_vregs;
1045
1046 if (client->irq) {
1047 ret = aw9523_init_irq(awi, client->irq);
1048 if (ret)
1049 goto err_disable_vregs;
1050 }
1051
1052 awi->pctl = devm_pinctrl_register(dev, pdesc, awi);
1053 if (IS_ERR(awi->pctl)) {
1054 ret = PTR_ERR(awi->pctl);
1055 dev_err(dev, "Cannot register pinctrl: %d", ret);
1056 goto err_disable_vregs;
1057 }
1058
1059 ret = devm_gpiochip_add_data(dev, &awi->gpio, awi);
1060 if (ret)
1061 goto err_disable_vregs;
1062
1063 return ret;
1064
1065 err_disable_vregs:
1066 if (awi->vio_vreg)
1067 regulator_disable(awi->vio_vreg);
1068 mutex_destroy(&awi->i2c_lock);
1069 return ret;
1070 }
1071
1072 static int aw9523_remove(struct i2c_client *client)
1073 {
1074 struct aw9523 *awi = i2c_get_clientdata(client);
1075 int ret;
1076
1077 if (!awi)
1078 return 0;
1079
1080 /*
1081 * If the chip VIO is connected to a regulator that we can turn
1082 * off, life is easy... otherwise, reinitialize the chip and
1083 * set the pins to hardware defaults before removing the driver
1084 * to leave it in a clean, safe and predictable state.
1085 */
1086 if (awi->vio_vreg) {
1087 regulator_disable(awi->vio_vreg);
1088 } else {
1089 mutex_lock(&awi->i2c_lock);
1090 ret = aw9523_hw_init(awi);
1091 mutex_unlock(&awi->i2c_lock);
1092 if (ret)
1093 return ret;
1094 }
1095
1096 mutex_destroy(&awi->i2c_lock);
1097 return 0;
1098 }
1099
1100 #if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 1, 0)
1101 static void aw9523_remove_void(struct i2c_client *client)
1102 {
1103 aw9523_remove(client);
1104 }
1105 #endif
1106
1107 static const struct i2c_device_id aw9523_i2c_id_table[] = {
1108 { "aw9523_i2c", 0 },
1109 { }
1110 };
1111 MODULE_DEVICE_TABLE(i2c, aw9523_i2c_id_table);
1112
1113 static const struct of_device_id of_aw9523_i2c_match[] = {
1114 { .compatible = "awinic,aw9523-pinctrl", },
1115 };
1116 MODULE_DEVICE_TABLE(of, of_aw9523_i2c_match);
1117
1118 static struct i2c_driver aw9523_driver = {
1119 .driver = {
1120 .name = "aw9523-pinctrl",
1121 .of_match_table = of_aw9523_i2c_match,
1122 },
1123 .probe = aw9523_probe,
1124 #if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 1, 0)
1125 .remove = aw9523_remove_void,
1126 #else
1127 .remove = aw9523_remove,
1128 #endif
1129 .id_table = aw9523_i2c_id_table,
1130 };
1131 module_i2c_driver(aw9523_driver);
1132
1133 MODULE_DESCRIPTION("Awinic AW9523 I2C GPIO Expander driver");
1134 MODULE_AUTHOR("AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>");
1135 MODULE_LICENSE("GPL v2");
1136 MODULE_ALIAS("platform:aw9523");