ramips: mt7620a: convert to nvmem-layout
[openwrt/staging/stintel.git] / target / linux / ramips / dts / mt7620a_wavlink_wl-wn535k1.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later
2
3 #include "mt7620a.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 compatible = "wavlink,wl-wn535k1", "ralink,mt7620a-soc";
10 model = "Wavlink WL-WN535K1";
11
12 aliases {
13 label-mac-device = &wifi0;
14 led-boot = &led_status_blue;
15 led-failsafe = &led_status_red;
16 led-running = &led_status_blue;
17 led-upgrade = &led_status_red;
18 };
19
20 keys {
21 compatible = "gpio-keys";
22
23 reset {
24 label = "reset";
25 gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
26 linux,code = <KEY_RESTART>;
27 };
28
29 touchlink {
30 label = "touchlink";
31 gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
32 linux,code = <KEY_WPS_BUTTON>;
33 };
34 };
35
36 leds {
37 compatible = "gpio-leds";
38
39 led_status_blue: status_blue {
40 label = "blue:status";
41 gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
42 };
43
44 led_status_red: status_red {
45 label = "red:status";
46 gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
47 };
48
49 lan1 {
50 label = "green:lan1";
51 gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
52 };
53
54 lan2 {
55 label = "green:lan2";
56 gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
57 };
58
59 wan {
60 label = "green:wan";
61 gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
62 };
63 };
64 };
65
66 &gpio2 {
67 status = "okay";
68 };
69
70 &spi0 {
71 status = "okay";
72
73 flash@0 {
74 compatible = "jedec,spi-nor";
75 reg = <0>;
76 spi-max-frequency = <50000000>;
77
78 partitions {
79 compatible = "fixed-partitions";
80 #address-cells = <1>;
81 #size-cells = <1>;
82
83 partition@0 {
84 label = "u-boot";
85 reg = <0x0 0x30000>;
86 read-only;
87 };
88
89 partition@30000 {
90 label = "config";
91 reg = <0x30000 0x10000>;
92 read-only;
93 };
94
95 factory: partition@40000 {
96 label = "factory";
97 reg = <0x40000 0x10000>;
98 read-only;
99
100 nvmem-layout {
101 compatible = "fixed-layout";
102 #address-cells = <1>;
103 #size-cells = <1>;
104
105 eeprom_factory_0: eeprom@0 {
106 reg = <0x0 0x200>;
107 };
108
109 eeprom_factory_8000: eeprom@8000 {
110 reg = <0x8000 0x200>;
111 };
112
113 macaddr_factory_28: macaddr@28 {
114 reg = <0x28 0x6>;
115 };
116 };
117 };
118
119 partition@50000 {
120 compatible = "denx,uimage";
121 label = "firmware";
122 reg = <0x50000 0x730000>;
123 };
124
125 partition@780000 {
126 label = "vendor";
127 reg = <0x780000 0x80000>;
128 read-only;
129 };
130 };
131 };
132 };
133
134 &pcie {
135 status = "okay";
136 };
137
138 &pcie0 {
139 wifi0: wifi@0,0 {
140 reg = <0x0000 0 0 0 0>;
141 nvmem-cells = <&eeprom_factory_8000>;
142 nvmem-cell-names = "eeprom";
143 ieee80211-freq-limit = <5000000 6000000>;
144 };
145 };
146
147 &ethernet {
148 pinctrl-names = "default";
149 pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
150
151 nvmem-cells = <&macaddr_factory_28>;
152 nvmem-cell-names = "mac-address";
153
154 mediatek,portmap = "llllw";
155
156 port@4 {
157 status = "okay";
158 phy-handle = <&phy4>;
159 phy-mode = "rgmii";
160 };
161
162 port@5 {
163 status = "okay";
164 phy-handle = <&phy5>;
165 phy-mode = "rgmii";
166 };
167
168 mdio-bus {
169 status = "okay";
170
171 phy4: ethernet-phy@4 {
172 reg = <4>;
173 phy-mode = "rgmii";
174 };
175
176 phy5: ethernet-phy@5 {
177 reg = <5>;
178 phy-mode = "rgmii";
179 };
180 };
181 };
182
183 &gsw {
184 mediatek,port4-gmac;
185 };
186
187 &wmac {
188 nvmem-cells = <&eeprom_factory_0>;
189 nvmem-cell-names = "eeprom";
190 };
191
192 &state_default {
193 gpio {
194 groups = "ephy", "i2c", "uartf";
195 function = "gpio";
196 };
197 };