ramips: mt7620a_tplink_archer.dtsi rename to mt7620a_tplink_8m.dtsi
[openwrt/staging/stintel.git] / target / linux / ramips / dts / mt7620a_tplink_archer-c5-v4.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include <dt-bindings/leds/common.h>
4
5 #include "mt7620a_tplink_8m.dtsi"
6
7 / {
8 compatible = "tplink,archer-c5-v4", "ralink,mt7620a-soc";
9 model = "TP-Link Archer C5 v4";
10
11 aliases {
12 led-boot = &led_power;
13 led-failsafe = &led_power;
14 led-running = &led_power;
15 led-upgrade = &led_power;
16 label-mac-device = &ethernet;
17 };
18
19 leds {
20 compatible = "gpio-leds";
21
22 led_power: led-0 {
23 function = LED_FUNCTION_POWER;
24 color = <LED_COLOR_ID_GREEN>;
25 gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
26 };
27
28 led-1 {
29 function = LED_FUNCTION_WLAN_2GHZ;
30 color = <LED_COLOR_ID_GREEN>;
31 gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
32 linux,default-trigger = "phy1tpt";
33 };
34
35 led-2 {
36 function = LED_FUNCTION_WLAN_5GHZ;
37 color = <LED_COLOR_ID_GREEN>;
38 gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
39 linux,default-trigger = "phy0tpt";
40 };
41
42 led-3 {
43 function = LED_FUNCTION_WAN;
44 color = <LED_COLOR_ID_GREEN>;
45 gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
46 };
47
48 led-4 {
49 function = LED_FUNCTION_WAN;
50 color = <LED_COLOR_ID_ORANGE>;
51 gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
52 };
53
54 led-5 {
55 function = LED_FUNCTION_LAN;
56 color = <LED_COLOR_ID_GREEN>;
57 gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
58 };
59
60 led-6 {
61 function = LED_FUNCTION_USB;
62 color = <LED_COLOR_ID_GREEN>;
63 gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
64 trigger-sources = <&ohci_port1>, <&ehci_port1>;
65 linux,default-trigger = "usbport";
66 };
67
68 led-7 {
69 function = LED_FUNCTION_WPS;
70 color = <LED_COLOR_ID_GREEN>;
71 gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
72 };
73 };
74
75 rtl8367s {
76 compatible = "realtek,rtl8367b";
77 cpu_port = <7>;
78 realtek,extif2 = <1 0 1 1 1 1 1 1 2>;
79 mii-bus = <&mdio0>;
80 phy-id = <29>;
81 };
82 };
83
84 &spi0 {
85 flash@0 {
86 #address-cells = <1>;
87 #size-cells = <1>;
88 };
89 };
90
91 &state_default {
92 gpio {
93 groups = "i2c", "uartf", "ephy", "rgmii2";
94 function = "gpio";
95 };
96 };
97
98 &ethernet {
99 pinctrl-names = "default";
100 pinctrl-0 = <&rgmii1_pins &mdio_pins>;
101
102 port@5 {
103 status = "okay";
104 mediatek,fixed-link = <1000 1 1 1>;
105 phy-mode = "rgmii";
106 };
107
108 mdio0: mdio-bus {
109 status = "okay";
110 reset-gpios = <&gpio2 20 GPIO_ACTIVE_LOW>;
111 reset-delay-us = <10000>;
112 };
113 };
114
115 &wmac {
116 pinctrl-names = "default", "pa_gpio";
117 pinctrl-0 = <&pa_pins>;
118 pinctrl-1 = <&pa_gpio_pins>;
119
120 nvmem-cells = <&eeprom_radio_0>, <&macaddr_rom_f100 0>;
121 nvmem-cell-names = "eeprom", "mac-address";
122 };
123
124 &wifi {
125 nvmem-cells = <&eeprom_radio_8000>, <&macaddr_rom_f100 2>;
126 nvmem-cell-names = "eeprom", "mac-address";
127 };