a6b46d821a39aae02d6bb611cdbea0ba1bdaaf86
[openwrt/staging/stintel.git] / target / linux / ramips / dts / mt7620a_planex_mzk-ex750np.dts
1 #include "mt7620a.dtsi"
2
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/input/input.h>
5
6 / {
7 compatible = "planex,mzk-ex750np", "ralink,mt7620a-soc";
8 model = "Planex MZK-EX750NP";
9
10 aliases {
11 led-boot = &led_power;
12 led-failsafe = &led_power;
13 led-running = &led_power;
14 led-upgrade = &led_power;
15 };
16
17 leds {
18 compatible = "gpio-leds";
19
20 led_power: power {
21 label = "red:power";
22 gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
23 };
24
25 wifi {
26 label = "red:wifi";
27 gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
28 };
29
30 wps {
31 label = "green:wps";
32 gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
33 };
34
35 rep {
36 label = "blue:rep";
37 gpios = <&gpio2 16 GPIO_ACTIVE_LOW>;
38 };
39
40 wifi1 {
41 label = "blue:wifi1";
42 gpios = <&gpio2 19 GPIO_ACTIVE_LOW>;
43 };
44
45 wifi2 {
46 label = "blue:wifi2";
47 gpios = <&gpio2 18 GPIO_ACTIVE_LOW>;
48 };
49
50 wifi3 {
51 label = "blue:wifi3";
52 gpios = <&gpio2 17 GPIO_ACTIVE_LOW>;
53 };
54 };
55
56 keys {
57 compatible = "gpio-keys";
58
59 reset {
60 label = "reset";
61 gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
62 linux,code = <KEY_RESTART>;
63 };
64
65 wps {
66 label = "wps";
67 gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
68 linux,code = <KEY_RFKILL>;
69 };
70 };
71 };
72
73 &gpio2 {
74 status = "okay";
75 };
76
77 &gpio3 {
78 status = "okay";
79 };
80
81 &spi0 {
82 status = "okay";
83
84 flash@0 {
85 compatible = "jedec,spi-nor";
86 reg = <0>;
87 spi-max-frequency = <10000000>;
88
89 partitions {
90 compatible = "fixed-partitions";
91 #address-cells = <1>;
92 #size-cells = <1>;
93
94 partition@0 {
95 label = "u-boot";
96 reg = <0x0 0x30000>;
97 read-only;
98 };
99
100 partition@30000 {
101 label = "u-boot-env";
102 reg = <0x30000 0x10000>;
103 read-only;
104 };
105
106 factory: partition@40000 {
107 compatible = "nvmem-cells";
108 label = "factory";
109 reg = <0x40000 0x10000>;
110 #address-cells = <1>;
111 #size-cells = <1>;
112 read-only;
113
114 eeprom_factory_0: eeprom@0 {
115 reg = <0x0 0x200>;
116 };
117
118 eeprom_factory_8000: eeprom@8000 {
119 reg = <0x8000 0x200>;
120 };
121
122 macaddr_factory_4: macaddr@4 {
123 reg = <0x4 0x6>;
124 };
125 };
126
127 partition@50000 {
128 compatible = "denx,uimage";
129 label = "firmware";
130 reg = <0x50000 0x730000>;
131 };
132
133 partition@780000 {
134 label = "Udata";
135 reg = <0x780000 0x80000>;
136 };
137 };
138 };
139 };
140
141 &state_default {
142 gpio {
143 groups = "uartf", "nd_sd", "rgmii2", "wled";
144 function = "gpio";
145 };
146 };
147
148 &ethernet {
149 pinctrl-names = "default";
150 pinctrl-0 = <&ephy_pins>;
151
152 nvmem-cells = <&macaddr_factory_4>;
153 nvmem-cell-names = "mac-address";
154
155 mediatek,portmap = "llllw";
156 };
157
158 &wmac {
159 nvmem-cells = <&eeprom_factory_0>;
160 nvmem-cell-names = "eeprom";
161 };
162
163 &pcie {
164 status = "okay";
165 };
166
167 &pcie0 {
168 mt76@0,0 {
169 reg = <0x0000 0 0 0 0>;
170 nvmem-cells = <&eeprom_factory_8000>;
171 nvmem-cell-names = "eeprom";
172 };
173 };