qualcommax: ipq807x: Fix MAC addresses usage for RAX120v2
[openwrt/staging/stintel.git] / target / linux / qualcommax / files / arch / arm64 / boot / dts / qcom / ipq8074-rax120v2.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 /dts-v1/;
4
5 #include "ipq8074.dtsi"
6 #include "ipq8074-ess.dtsi"
7 #include "ipq8074-hk-cpu.dtsi"
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/leds/common.h>
11
12 / {
13 model = "Netgear RAX120v2";
14 compatible = "netgear,rax120v2", "qcom,ipq8074";
15
16 aliases {
17 serial0 = &blsp1_uart5;
18
19 led-running = &led_system_white;
20 led-upgrade = &led_system_white;
21 led-internet = &led_wan_white;
22 label-mac-device = &dp5;
23 };
24
25 chosen {
26 stdout-path = "serial0:115200n8";
27 bootargs-append = " ubi.mtd=rootfs root=/dev/ubiblock0_0";
28 };
29
30 keys {
31 compatible = "gpio-keys";
32
33 rfkill {
34 label = "rfkill";
35 gpios = <&tlmm 25 GPIO_ACTIVE_LOW>;
36 linux,code = <KEY_RFKILL>;
37 };
38
39 wps {
40 label = "wps";
41 gpios = <&tlmm 57 GPIO_ACTIVE_LOW>;
42 linux,code = <KEY_WPS_BUTTON>;
43 };
44
45 reset {
46 label = "reset";
47 gpios = <&tlmm 54 GPIO_ACTIVE_LOW>;
48 linux,code = <KEY_RESTART>;
49 };
50 };
51
52 led_spi {
53 compatible = "spi-gpio";
54 #address-cells = <1>;
55 #size-cells = <0>;
56
57 sck-gpios = <&tlmm 18 GPIO_ACTIVE_HIGH>;
58 mosi-gpios = <&tlmm 19 GPIO_ACTIVE_HIGH>;
59
60 led_gpio: led_gpio@0 {
61 compatible = "fairchild,74hc595";
62 reg = <0>;
63 gpio-controller;
64 #gpio-cells = <2>;
65 registers-number = <2>;
66 enable-gpios = <&tlmm 20 GPIO_ACTIVE_HIGH>;
67 spi-max-frequency = <1000000>;
68 };
69 };
70
71 leds {
72 compatible = "gpio-leds";
73
74 led_system_white: system-white {
75 gpios = <&led_gpio 0 GPIO_ACTIVE_LOW>;
76 color = <LED_COLOR_ID_WHITE>;
77 };
78
79 led_24g_white {
80 gpios = <&led_gpio 1 GPIO_ACTIVE_LOW>;
81 color = <LED_COLOR_ID_WHITE>;
82 linux,default-trigger = "phy1radio";
83 };
84
85 led_5g_white {
86 gpios = <&led_gpio 2 GPIO_ACTIVE_LOW>;
87 color = <LED_COLOR_ID_WHITE>;
88 linux,default-trigger = "phy0radio";
89 };
90
91 led_usb1_white {
92 gpios = <&led_gpio 3 GPIO_ACTIVE_LOW>;
93 color = <LED_COLOR_ID_WHITE>;
94 };
95
96 led_usb2_white {
97 gpios = <&led_gpio 4 GPIO_ACTIVE_LOW>;
98 color = <LED_COLOR_ID_WHITE>;
99 };
100
101 led_wan_white: wan-white {
102 gpios = <&led_gpio 5 GPIO_ACTIVE_LOW>;
103 color = <LED_COLOR_ID_WHITE>;
104 };
105
106 led_aqr_green {
107 gpios = <&led_gpio 6 GPIO_ACTIVE_LOW>;
108 color = <LED_COLOR_ID_GREEN>;
109 };
110
111 led_aqr_red {
112 gpios = <&led_gpio 10 GPIO_ACTIVE_LOW>;
113 color = <LED_COLOR_ID_RED>;
114 };
115
116 led_aqr_white {
117 gpios = <&led_gpio 11 GPIO_ACTIVE_LOW>;
118 color = <LED_COLOR_ID_WHITE>;
119 };
120
121 led_wps_white {
122 gpios = <&tlmm 40 GPIO_ACTIVE_HIGH>;
123 color = <LED_COLOR_ID_WHITE>;
124 };
125 };
126 };
127
128 &tlmm {
129 mdio_pins: mdio-pins {
130 mdc {
131 pins = "gpio68";
132 function = "mdc";
133 drive-strength = <8>;
134 bias-pull-up;
135 };
136
137 mdio {
138 pins = "gpio69";
139 function = "mdio";
140 drive-strength = <8>;
141 bias-pull-up;
142 };
143 };
144 };
145
146 &mdio {
147 status = "okay";
148
149 pinctrl-0 = <&mdio_pins>;
150 pinctrl-names = "default";
151 reset-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>;
152
153 ethernet-phy-package@0 {
154 #address-cells = <1>;
155 #size-cells = <0>;
156 reg = <0>;
157
158 compatible = "qcom,qca8075-package";
159
160 qca8075_0: ethernet-phy@0 {
161 compatible = "ethernet-phy-ieee802.3-c22";
162 reg = <0>;
163 };
164
165 qca8075_1: ethernet-phy@1 {
166 compatible = "ethernet-phy-ieee802.3-c22";
167 reg = <1>;
168 };
169
170 qca8075_2: ethernet-phy@2 {
171 compatible = "ethernet-phy-ieee802.3-c22";
172 reg = <2>;
173 };
174
175 qca8075_3: ethernet-phy@3 {
176 compatible = "ethernet-phy-ieee802.3-c22";
177 reg = <3>;
178 };
179
180 qca8075_4: ethernet-phy@4 {
181 compatible = "ethernet-phy-ieee802.3-c22";
182 reg = <4>;
183 };
184 };
185
186 aqr111b0: ethernet-phy@7 {
187 compatible ="ethernet-phy-ieee802.3-c45";
188 reg = <7>;
189 reset-gpios = <&tlmm 59 GPIO_ACTIVE_LOW>;
190 };
191 };
192
193 &switch {
194 status = "okay";
195
196 switch_lan_bmp = <(ESS_PORT1 | ESS_PORT2 | ESS_PORT3 | ESS_PORT4 | ESS_PORT6)>; /* lan port bitmap */
197 switch_wan_bmp = <ESS_PORT5>; /* wan port bitmap */
198 switch_mac_mode = <MAC_MODE_PSGMII>; /* mac mode for uniphy instance0*/
199 switch_mac_mode2 = <MAC_MODE_USXGMII>; /* mac mode for uniphy instance2*/
200
201 qcom,port_phyinfo {
202 port@1 {
203 port_id = <1>;
204 phy_address = <0>;
205 };
206 port@2 {
207 port_id = <2>;
208 phy_address = <1>;
209 };
210 port@3 {
211 port_id = <3>;
212 phy_address = <2>;
213 };
214 port@4 {
215 port_id = <4>;
216 phy_address = <3>;
217 };
218 port@5 {
219 port_id = <5>;
220 phy_address = <4>;
221 };
222 port@6 {
223 port_id = <6>;
224 phy_address = <7>;
225 compatible = "ethernet-phy-ieee802.3-c45";
226 ethernet-phy-ieee802.3-c45;
227 };
228 };
229 };
230
231 &edma {
232 status = "okay";
233 };
234
235 &dp1 {
236 status = "okay";
237 phy-handle = <&qca8075_0>;
238 label = "lan4";
239 nvmem-cells = <&macaddr_lan>;
240 nvmem-cell-names = "mac-address";
241 };
242
243 &dp2 {
244 status = "okay";
245 phy-handle = <&qca8075_1>;
246 label = "lan3";
247 nvmem-cells = <&macaddr_lan>;
248 nvmem-cell-names = "mac-address";
249 };
250
251 &dp3 {
252 status = "okay";
253 phy-handle = <&qca8075_2>;
254 label = "lan2";
255 nvmem-cells = <&macaddr_lan>;
256 nvmem-cell-names = "mac-address";
257 };
258
259 &dp4 {
260 status = "okay";
261 phy-handle = <&qca8075_3>;
262 label = "lan1";
263 nvmem-cells = <&macaddr_lan>;
264 nvmem-cell-names = "mac-address";
265 };
266
267 &dp5 {
268 status = "okay";
269 phy-handle = <&qca8075_4>;
270 label = "wan";
271 nvmem-cells = <&macaddr_wan>;
272 nvmem-cell-names = "mac-address";
273 };
274
275 &dp6_syn {
276 status = "okay";
277 phy-mode = "usxgmii";
278 phy-handle = <&aqr111b0>;
279 label = "lan5";
280 nvmem-cells = <&macaddr_lan>;
281 nvmem-cell-names = "mac-address";
282 };
283
284 &blsp1_uart5 {
285 status = "okay";
286 };
287
288 &blsp1_i2c2 {
289 status = "okay";
290
291 g761@3e {
292 compatible = "gmt,g763";
293 reg = <0x3e>;
294 clocks =<&sleep_clk>;
295 fan_gear_mode = <0>;
296 fan_start = <1>;
297 pwm_polarity = <0>;
298 };
299 };
300
301 &qpic_bam {
302 status = "okay";
303 };
304
305 &qpic_nand {
306 status = "okay";
307
308 nand@0 {
309 reg = <0>;
310 nand-ecc-strength = <4>;
311 nand-ecc-step-size = <512>;
312 nand-bus-width = <8>;
313
314 partitions {
315 compatible = "fixed-partitions";
316 #address-cells = <1>;
317 #size-cells = <1>;
318
319 partition@0 {
320 label = "0:sbl1";
321 reg = <0x00 0x100000>;
322 read-only;
323 };
324
325 partition@100000 {
326 label = "0:mibib";
327 reg = <0x100000 0x100000>;
328 read-only;
329 };
330
331 partition@200000 {
332 label = "0:bootconfig";
333 reg = <0x200000 0x80000>;
334 read-only;
335 };
336
337 partition@280000 {
338 label = "0:bootconfig_1";
339 reg = <0x280000 0x80000>;
340 read-only;
341 };
342
343 partition@300000 {
344 label = "0:qsee";
345 reg = <0x300000 0x300000>;
346 read-only;
347 };
348
349 partition@600000 {
350 label = "0:qsee_1";
351 reg = <0x600000 0x300000>;
352 read-only;
353 };
354
355 partition@900000 {
356 label = "0:devcfg";
357 reg = <0x900000 0x80000>;
358 read-only;
359 };
360
361 partition@980000 {
362 label = "0:devcfg_1";
363 reg = <0x980000 0x80000>;
364 read-only;
365 };
366
367 partition@a00000 {
368 label = "0:apdp";
369 reg = <0xa00000 0x80000>;
370 read-only;
371 };
372
373 partition@a80000 {
374 label = "0:apdp_1";
375 reg = <0xa80000 0x80000>;
376 read-only;
377 };
378
379 partition@b00000 {
380 label = "0:rpm";
381 reg = <0xb00000 0x80000>;
382 read-only;
383 };
384
385 partition@b80000 {
386 label = "0:rpm_1";
387 reg = <0xb80000 0x80000>;
388 read-only;
389 };
390
391 partition@c00000 {
392 label = "0:cdt";
393 reg = <0xc00000 0x80000>;
394 read-only;
395 };
396
397 partition@c80000 {
398 label = "0:cdt_1";
399 reg = <0xc80000 0x80000>;
400 read-only;
401 };
402
403 partition@d00000 {
404 label = "0:appsblenv";
405 reg = <0xd00000 0x80000>;
406 };
407
408 partition@d80000 {
409 label = "0:appsbl";
410 reg = <0xd80000 0x100000>;
411 read-only;
412 };
413
414 partition@e80000 {
415 label = "0:appsbl_1";
416 reg = <0xe80000 0x100000>;
417 read-only;
418 };
419
420 partition@f80000 {
421 label = "0:art";
422 reg = <0xf80000 0x80000>;
423 read-only;
424 };
425
426 partition@1000000 {
427 label = "0:art.bak";
428 reg = <0x1000000 0x0080000>;
429 read-only;
430 };
431
432 partition@1080000 {
433 label = "config";
434 reg = <0x1080000 0x0100000>;
435 read-only;
436 };
437
438 partition@1180000 {
439 label = "boarddata1";
440 reg = <0x1180000 0x0100000>;
441 read-only;
442
443 nvmem-layout {
444 compatible = "fixed-layout";
445 #address-cells = <1>;
446 #size-cells = <1>;
447
448 macaddr_lan: macaddr@0 {
449 reg = <0x0 0x6>;
450 };
451
452 macaddr_wan: macaddr@1 {
453 reg = <0x6 0x6>;
454 };
455
456 macaddr_wlan5g: macaddr@2 {
457 reg = <0xc 0x6>;
458 };
459 };
460 };
461
462 partition@1280000 {
463 label = "boarddata2";
464 reg = <0x1280000 0x0100000>;
465 read-only;
466 };
467
468 partition@1380000 {
469 label = "pot";
470 reg = <0x1380000 0x0100000>;
471 read-only;
472 };
473
474 partition@1480000 {
475 label = "dnidata";
476 reg = <0x1480000 0x0500000>;
477 read-only;
478 };
479
480 partition@1980000 {
481 label = "kernel";
482 reg = <0x1980000 0x1d00000>;
483 };
484
485 partition@7e00000 {
486 label = "ethphyfw";
487 reg = <0x7e00000 0x80000>;
488 };
489
490 partition@e8800000 {
491 label = "rootfs";
492 reg = <0xe880000 0x11780000>;
493 };
494 };
495 };
496 };
497
498 &qusb_phy_0 {
499 status = "okay";
500 };
501
502 &qusb_phy_1 {
503 status = "okay";
504 };
505
506 &ssphy_0 {
507 status = "okay";
508 };
509
510 &ssphy_1 {
511 status = "okay";
512 };
513
514 &usb_0 {
515 status = "okay";
516 };
517
518 &usb_1 {
519 status = "okay";
520 };
521
522 &wifi{
523 status = "okay";
524
525 qcom,ath11k-calibration-variant = "Netgear-RAX120v2";
526 };
527
528 &cryptobam {
529 status = "okay";
530 };
531
532 &crypto {
533 status = "okay";
534 };
535
536 &prng {
537 status = "okay";
538 };