target/linux/mediatek/patches-6.6/224-v6.3-clk-mediatek-clk-mtk-Add-dummy-clock-ops.patch

   1 From b8eb1081d267708ba976525a1fe2162901b34f3a Mon Sep 17 00:00:00 2001
   2 From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
   3 Date: Fri, 20 Jan 2023 10:20:37 +0100
   4 Subject: [PATCH] clk: mediatek: clk-mtk: Add dummy clock ops
   5
   6 In order to migrate some (few) old clock drivers to the common
   7 mtk_clk_simple_probe() function, add dummy clock ops to be able
   8 to insert a dummy clock with ID 0 at the beginning of the list.
   9
  10 Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
  11 Reviewed-by: Miles Chen <miles.chen@mediatek.com>
  12 Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
  13 Tested-by: Miles Chen <miles.chen@mediatek.com>
  14 Link: https://lore.kernel.org/r/20230120092053.182923-8-angelogioacchino.delregno@collabora.com
  15 Tested-by: Mingming Su <mingming.su@mediatek.com>
  16 Signed-off-by: Stephen Boyd <sboyd@kernel.org>
  17 ---
  18  drivers/clk/mediatek/clk-mtk.c | 16 ++++++++++++++++
  19  drivers/clk/mediatek/clk-mtk.h | 19 +++++++++++++++++++
  20  2 files changed, 35 insertions(+)
  21
  22 --- a/drivers/clk/mediatek/clk-mtk.c
  23 +++ b/drivers/clk/mediatek/clk-mtk.c
  24 @@ -18,6 +18,22 @@
  25  #include "clk-mtk.h"
  26  #include "clk-gate.h"
  27
  28 +const struct mtk_gate_regs cg_regs_dummy = { 0, 0, 0 };
  29 +EXPORT_SYMBOL_GPL(cg_regs_dummy);
  30 +
  31 +static int mtk_clk_dummy_enable(struct clk_hw *hw)
  32 +{
  33 +       return 0;
  34 +}
  35 +
  36 +static void mtk_clk_dummy_disable(struct clk_hw *hw) { }
  37 +
  38 +const struct clk_ops mtk_clk_dummy_ops = {
  39 +       .enable         = mtk_clk_dummy_enable,
  40 +       .disable        = mtk_clk_dummy_disable,
  41 +};
  42 +EXPORT_SYMBOL_GPL(mtk_clk_dummy_ops);
  43 +
  44  static void mtk_init_clk_data(struct clk_hw_onecell_data *clk_data,
  45                               unsigned int clk_num)
  46  {
  47 --- a/drivers/clk/mediatek/clk-mtk.h
  48 +++ b/drivers/clk/mediatek/clk-mtk.h
  49 @@ -22,6 +22,25 @@
  50
  51  struct platform_device;
  52
  53 +/*
  54 + * We need the clock IDs to start from zero but to maintain devicetree
  55 + * backwards compatibility we can't change bindings to start from zero.
  56 + * Only a few platforms are affected, so we solve issues given by the
  57 + * commonized MTK clocks probe function(s) by adding a dummy clock at
  58 + * the beginning where needed.
  59 + */
  60 +#define CLK_DUMMY              0
  61 +
  62 +extern const struct clk_ops mtk_clk_dummy_ops;
  63 +extern const struct mtk_gate_regs cg_regs_dummy;
  64 +
  65 +#define GATE_DUMMY(_id, _name) {                               \
  66 +               .id = _id,                                      \
  67 +               .name = _name,                                  \
  68 +               .regs = &cg_regs_dummy,                         \
  69 +               .ops = &mtk_clk_dummy_ops,                      \
  70 +       }
  71 +
  72  struct mtk_fixed_clk {
  73         int id;
  74         const char *name;