target/linux/mediatek/patches-6.6/008-v6.3-arm64-dts-mt7986-add-mmc-related-device-nodes.patch

   1 From c1744e9e75a6a8abc7c893f349bcbf725b9c0d74 Mon Sep 17 00:00:00 2001
   2 From: Sam Shih <sam.shih@mediatek.com>
   3 Date: Fri, 6 Jan 2023 16:28:43 +0100
   4 Subject: [PATCH 08/19] arm64: dts: mt7986: add mmc related device nodes
   5
   6 This patch adds mmc support for MT7986.
   7
   8 Signed-off-by: Sam Shih <sam.shih@mediatek.com>
   9 Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
  10 Link: https://lore.kernel.org/r/20230106152845.88717-4-linux@fw-web.de
  11 Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
  12 ---
  13  arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 96 ++++++++++++++++++++
  14  arch/arm64/boot/dts/mediatek/mt7986a.dtsi    | 15 +++
  15  2 files changed, 111 insertions(+)
  16
  17 --- a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
  18 +++ b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
  19 @@ -5,6 +5,8 @@
  20   */
  21
  22  /dts-v1/;
  23 +#include <dt-bindings/pinctrl/mt65xx.h>
  24 +
  25  #include "mt7986a.dtsi"
  26
  27  / {
  28 @@ -23,6 +25,24 @@
  29                 device_type = "memory";
  30                 reg = <0 0x40000000 0 0x40000000>;
  31         };
  32 +
  33 +       reg_1p8v: regulator-1p8v {
  34 +               compatible = "regulator-fixed";
  35 +               regulator-name = "fixed-1.8V";
  36 +               regulator-min-microvolt = <1800000>;
  37 +               regulator-max-microvolt = <1800000>;
  38 +               regulator-boot-on;
  39 +               regulator-always-on;
  40 +       };
  41 +
  42 +       reg_3p3v: regulator-3p3v {
  43 +               compatible = "regulator-fixed";
  44 +               regulator-name = "fixed-3.3V";
  45 +               regulator-min-microvolt = <3300000>;
  46 +               regulator-max-microvolt = <3300000>;
  47 +               regulator-boot-on;
  48 +               regulator-always-on;
  49 +       };
  50  };
  51
  52  &crypto {
  53 @@ -58,7 +78,83 @@
  54         };
  55  };
  56
  57 +&mmc0 {
  58 +       pinctrl-names = "default", "state_uhs";
  59 +       pinctrl-0 = <&mmc0_pins_default>;
  60 +       pinctrl-1 = <&mmc0_pins_uhs>;
  61 +       bus-width = <8>;
  62 +       max-frequency = <200000000>;
  63 +       cap-mmc-highspeed;
  64 +       mmc-hs200-1_8v;
  65 +       mmc-hs400-1_8v;
  66 +       hs400-ds-delay = <0x14014>;
  67 +       vmmc-supply = <&reg_3p3v>;
  68 +       vqmmc-supply = <&reg_1p8v>;
  69 +       non-removable;
  70 +       no-sd;
  71 +       no-sdio;
  72 +       status = "okay";
  73 +};
  74 +
  75  &pio {
  76 +       mmc0_pins_default: mmc0-pins {
  77 +               mux {
  78 +                       function = "emmc";
  79 +                       groups = "emmc_51";
  80 +               };
  81 +               conf-cmd-dat {
  82 +                       pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
  83 +                              "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
  84 +                              "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
  85 +                       input-enable;
  86 +                       drive-strength = <4>;
  87 +                       bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
  88 +               };
  89 +               conf-clk {
  90 +                       pins = "EMMC_CK";
  91 +                       drive-strength = <6>;
  92 +                       bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
  93 +               };
  94 +               conf-ds {
  95 +                       pins = "EMMC_DSL";
  96 +                       bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
  97 +               };
  98 +               conf-rst {
  99 +                       pins = "EMMC_RSTB";
 100 +                       drive-strength = <4>;
 101 +                       bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
 102 +               };
 103 +       };
 104 +
 105 +       mmc0_pins_uhs: mmc0-uhs-pins {
 106 +               mux {
 107 +                       function = "emmc";
 108 +                       groups = "emmc_51";
 109 +               };
 110 +               conf-cmd-dat {
 111 +                       pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
 112 +                              "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
 113 +                              "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
 114 +                       input-enable;
 115 +                       drive-strength = <4>;
 116 +                       bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
 117 +               };
 118 +               conf-clk {
 119 +                       pins = "EMMC_CK";
 120 +                       drive-strength = <6>;
 121 +                       bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
 122 +               };
 123 +               conf-ds {
 124 +                       pins = "EMMC_DSL";
 125 +                       bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
 126 +               };
 127 +               conf-rst {
 128 +                       pins = "EMMC_RSTB";
 129 +                       drive-strength = <4>;
 130 +                       bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
 131 +               };
 132 +       };
 133 +
 134         spi_flash_pins: spi-flash-pins {
 135                 mux {
 136                         function = "spi";
 137 --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
 138 +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
 139 @@ -345,6 +345,21 @@
 140                         status = "disabled";
 141                 };
 142
 143 +               mmc0: mmc@11230000 {
 144 +                       compatible = "mediatek,mt7986-mmc";
 145 +                       reg = <0 0x11230000 0 0x1000>,
 146 +                             <0 0x11c20000 0 0x1000>;
 147 +                       interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
 148 +                       clocks = <&topckgen CLK_TOP_EMMC_416M_SEL>,
 149 +                                <&infracfg CLK_INFRA_MSDC_HCK_CK>,
 150 +                                <&infracfg CLK_INFRA_MSDC_CK>,
 151 +                                <&infracfg CLK_INFRA_MSDC_133M_CK>,
 152 +                                <&infracfg CLK_INFRA_MSDC_66M_CK>;
 153 +                       clock-names = "source", "hclk", "source_cg", "bus_clk",
 154 +                                     "sys_cg";
 155 +                       status = "disabled";
 156 +               };
 157 +
 158                 usb_phy: t-phy@11e10000 {
 159                         compatible = "mediatek,mt7986-tphy",
 160                                      "mediatek,generic-tphy-v2";