target/linux/mediatek/patches-6.1/431-drivers-spi-mt65xx-Move-chip_config-to-driver-s-priv.patch

   1 From bfd3acc428085742d754a6d328d1a93ebf9451df Mon Sep 17 00:00:00 2001
   2 From: "SkyLake.Huang" <skylake.huang@mediatek.com>
   3 Date: Thu, 23 Jun 2022 18:29:51 +0800
   4 Subject: [PATCH 1/6] drivers: spi-mt65xx: Move chip_config to driver's private
   5  data
   6
   7 Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
   8 ---
   9  drivers/spi/spi-mt65xx.c                 | 29 +++++++++---------------
  10  include/linux/platform_data/spi-mt65xx.h | 17 --------------
  11  2 files changed, 11 insertions(+), 35 deletions(-)
  12  delete mode 100644 include/linux/platform_data/spi-mt65xx.h
  13
  14 --- a/drivers/spi/spi-mt65xx.c
  15 +++ b/drivers/spi/spi-mt65xx.c
  16 @@ -14,7 +14,6 @@
  17  #include <linux/of.h>
  18  #include <linux/gpio/consumer.h>
  19  #include <linux/platform_device.h>
  20 -#include <linux/platform_data/spi-mt65xx.h>
  21  #include <linux/pm_runtime.h>
  22  #include <linux/spi/spi.h>
  23  #include <linux/spi/spi-mem.h>
  24 @@ -171,6 +170,8 @@ struct mtk_spi {
  25         struct device *dev;
  26         dma_addr_t tx_dma;
  27         dma_addr_t rx_dma;
  28 +       u32 sample_sel;
  29 +       u32 get_tick_dly;
  30  };
  31
  32  static const struct mtk_spi_compatible mtk_common_compat;
  33 @@ -216,15 +217,6 @@ static const struct mtk_spi_compatible m
  34         .no_need_unprepare = true,
  35  };
  36
  37 -/*
  38 - * A piece of default chip info unless the platform
  39 - * supplies it.
  40 - */
  41 -static const struct mtk_chip_config mtk_default_chip_info = {
  42 -       .sample_sel = 0,
  43 -       .tick_delay = 0,
  44 -};
  45 -
  46  static const struct of_device_id mtk_spi_of_match[] = {
  47         { .compatible = "mediatek,spi-ipm",
  48                 .data = (void *)&mtk_ipm_compat,
  49 @@ -352,7 +344,6 @@ static int mtk_spi_hw_init(struct spi_ma
  50  {
  51         u16 cpha, cpol;
  52         u32 reg_val;
  53 -       struct mtk_chip_config *chip_config = spi->controller_data;
  54         struct mtk_spi *mdata = spi_master_get_devdata(master);
  55
  56         cpha = spi->mode & SPI_CPHA ? 1 : 0;
  57 @@ -402,7 +393,7 @@ static int mtk_spi_hw_init(struct spi_ma
  58                 else
  59                         reg_val &= ~SPI_CMD_CS_POL;
  60
  61 -               if (chip_config->sample_sel)
  62 +               if (mdata->sample_sel)
  63                         reg_val |= SPI_CMD_SAMPLE_SEL;
  64                 else
  65                         reg_val &= ~SPI_CMD_SAMPLE_SEL;
  66 @@ -429,20 +420,20 @@ static int mtk_spi_hw_init(struct spi_ma
  67                 if (mdata->dev_comp->ipm_design) {
  68                         reg_val = readl(mdata->base + SPI_CMD_REG);
  69                         reg_val &= ~SPI_CMD_IPM_GET_TICKDLY_MASK;
  70 -                       reg_val |= ((chip_config->tick_delay & 0x7)
  71 +                       reg_val |= ((mdata->get_tick_dly & 0x7)
  72                                     << SPI_CMD_IPM_GET_TICKDLY_OFFSET);
  73                         writel(reg_val, mdata->base + SPI_CMD_REG);
  74                 } else {
  75                         reg_val = readl(mdata->base + SPI_CFG1_REG);
  76                         reg_val &= ~SPI_CFG1_GET_TICK_DLY_MASK;
  77 -                       reg_val |= ((chip_config->tick_delay & 0x7)
  78 +                       reg_val |= ((mdata->get_tick_dly & 0x7)
  79                                     << SPI_CFG1_GET_TICK_DLY_OFFSET);
  80                         writel(reg_val, mdata->base + SPI_CFG1_REG);
  81                 }
  82         } else {
  83                 reg_val = readl(mdata->base + SPI_CFG1_REG);
  84                 reg_val &= ~SPI_CFG1_GET_TICK_DLY_MASK_V1;
  85 -               reg_val |= ((chip_config->tick_delay & 0x3)
  86 +               reg_val |= ((mdata->get_tick_dly & 0x3)
  87                             << SPI_CFG1_GET_TICK_DLY_OFFSET_V1);
  88                 writel(reg_val, mdata->base + SPI_CFG1_REG);
  89         }
  90 @@ -732,9 +723,6 @@ static int mtk_spi_setup(struct spi_devi
  91  {
  92         struct mtk_spi *mdata = spi_master_get_devdata(spi->master);
  93
  94 -       if (!spi->controller_data)
  95 -               spi->controller_data = (void *)&mtk_default_chip_info;
  96 -
  97         if (mdata->dev_comp->need_pad_sel && spi->cs_gpiod)
  98                 /* CS de-asserted, gpiolib will handle inversion */
  99                 gpiod_direction_output(spi->cs_gpiod, 0);
 100 @@ -1138,6 +1126,10 @@ static int mtk_spi_probe(struct platform
 101         mdata = spi_master_get_devdata(master);
 102         mdata->dev_comp = device_get_match_data(dev);
 103
 104 +       /* Set device configs to default first. Calibrate it later. */
 105 +       mdata->sample_sel = 0;
 106 +       mdata->get_tick_dly = 2;
 107 +
 108         if (mdata->dev_comp->enhance_timing)
 109                 master->mode_bits |= SPI_CS_HIGH;
 110
 111 --- a/include/linux/platform_data/spi-mt65xx.h
 112 +++ /dev/null
 113 @@ -1,17 +0,0 @@
 114 -/* SPDX-License-Identifier: GPL-2.0-only */
 115 -/*
 116 - *  MTK SPI bus driver definitions
 117 - *
 118 - * Copyright (c) 2015 MediaTek Inc.
 119 - * Author: Leilk Liu <leilk.liu@mediatek.com>
 120 - */
 121 -
 122 -#ifndef ____LINUX_PLATFORM_DATA_SPI_MTK_H
 123 -#define ____LINUX_PLATFORM_DATA_SPI_MTK_H
 124 -
 125 -/* Board specific platform_data */
 126 -struct mtk_chip_config {
 127 -       u32 sample_sel;
 128 -       u32 tick_delay;
 129 -};
 130 -#endif