target/linux/mediatek/files/drivers/net/phy/en8801sc.h

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* FILE NAME:  en8801sc.h
   3  * PURPOSE:
   4  *      Define EN8801SC driver function
   5  *
   6  * NOTES:
   7  *
   8  */
   9
  10 #ifndef __EN8801SC_H
  11 #define __EN8801SC_H
  12
  13 /* NAMING DECLARATIONS
  14  */
  15 #define EN8801S_DRIVER_VERSION  "1.1.8_Generic"
  16 #define EN8801S_PBUS_DEFAULT_ADDR 0x1e
  17 #define EN8801S_PHY_DEFAULT_ADDR 0x1d
  18 #define EN8801S_RG_ETHER_PHY_OUI 0x19a4
  19 #define EN8801S_RG_SMI_ADDR      0x19a8
  20 #define EN8801S_RG_BUCK_CTL      0x1a20
  21 #define EN8801S_RG_LTR_CTL       0x0cf8
  22 #define EN8801S_RG_PROD_VER      0x18e0
  23
  24 #define EN8801S_PBUS_OUI        0x17a5
  25 #define EN8801S_PHY_ID1         0x03a2
  26 #define EN8801S_PHY_ID2         0x9461
  27 #define EN8801SC_PHY_ID         0x03a29471
  28
  29 #define LED_ON_CTRL(i)              (0x024 + ((i)*2))
  30 #define LED_ON_EN                   (1 << 15)
  31 #define LED_ON_POL                  (1 << 14)
  32 #define LED_ON_EVT_MASK             (0x7f)
  33 /* LED ON Event Option.B */
  34 #define LED_ON_EVT_FORCE            (1 << 6)
  35 #define LED_ON_EVT_LINK_DOWN        (1 << 3)
  36 #define LED_ON_EVT_LINK_10M         (1 << 2)
  37 #define LED_ON_EVT_LINK_100M        (1 << 1)
  38 #define LED_ON_EVT_LINK_1000M       (1 << 0)
  39 /* LED ON Event Option.E */
  40
  41 #define LED_BLK_CTRL(i)             (0x025 + ((i)*2))
  42 #define LED_BLK_EVT_MASK            (0x3ff)
  43 /* LED Blinking Event Option.B*/
  44 #define LED_BLK_EVT_FORCE           (1 << 9)
  45 #define LED_BLK_EVT_10M_RX_ACT      (1 << 5)
  46 #define LED_BLK_EVT_10M_TX_ACT      (1 << 4)
  47 #define LED_BLK_EVT_100M_RX_ACT     (1 << 3)
  48 #define LED_BLK_EVT_100M_TX_ACT     (1 << 2)
  49 #define LED_BLK_EVT_1000M_RX_ACT    (1 << 1)
  50 #define LED_BLK_EVT_1000M_TX_ACT    (1 << 0)
  51 /* LED Blinking Event Option.E*/
  52 #define LED_ENABLE                  1
  53 #define LED_DISABLE                 0
  54
  55 #define LINK_UP                 1
  56 #define LINK_DOWN               0
  57
  58 /*
  59 SFP Sample for verification
  60 Tx Reverse, Rx Reverse
  61 */
  62 #define EN8801S_TX_POLARITY_NORMAL   0x0
  63 #define EN8801S_TX_POLARITY_REVERSE  0x1
  64
  65 #define EN8801S_RX_POLARITY_NORMAL   (0x1 << 1)
  66 #define EN8801S_RX_POLARITY_REVERSE  (0x0 << 1)
  67
  68 /*
  69 The following led_cfg example is for reference only.
  70 LED5 1000M/LINK/ACT  (GPIO5)  <-> BASE_T_LED0,
  71 LED6 10/100M/LINK/ACT(GPIO9)  <-> BASE_T_LED1,
  72 LED4 100M/LINK/ACT   (GPIO8)  <-> BASE_T_LED2,
  73 */
  74 /* User-defined.B */
  75 #define BASE_T_LED0_ON_CFG      (LED_ON_EVT_LINK_1000M)
  76 #define BASE_T_LED0_BLK_CFG \
  77                         (LED_BLK_EVT_1000M_TX_ACT | \
  78                         LED_BLK_EVT_1000M_RX_ACT)
  79 #define BASE_T_LED1_ON_CFG \
  80                         (LED_ON_EVT_LINK_100M | \
  81                          LED_ON_EVT_LINK_10M)
  82 #define BASE_T_LED1_BLK_CFG \
  83                         (LED_BLK_EVT_100M_TX_ACT | \
  84                          LED_BLK_EVT_100M_RX_ACT | \
  85                          LED_BLK_EVT_10M_TX_ACT | \
  86                          LED_BLK_EVT_10M_RX_ACT)
  87 #define BASE_T_LED2_ON_CFG \
  88                         (LED_ON_EVT_LINK_100M)
  89 #define BASE_T_LED2_BLK_CFG \
  90                         (LED_BLK_EVT_100M_TX_ACT | \
  91                          LED_BLK_EVT_100M_RX_ACT)
  92 #define BASE_T_LED3_ON_CFG      (0x0)
  93 #define BASE_T_LED3_BLK_CFG     (0x0)
  94 /* User-defined.E */
  95
  96 #define EN8801S_LED_COUNT       4
  97
  98 #define MAX_RETRY               5
  99 #define MAX_OUI_CHECK           2
 100 /* CL45 MDIO control */
 101 #define MII_MMD_ACC_CTL_REG     0x0d
 102 #define MII_MMD_ADDR_DATA_REG   0x0e
 103 #define MMD_OP_MODE_DATA        BIT(14)
 104
 105 #define MAX_TRG_COUNTER         5
 106
 107 /* CL22 Reg Support Page Select */
 108 #define RgAddr_Reg1Fh        0x1f
 109 #define CL22_Page_Reg        0x0000
 110 #define CL22_Page_ExtReg     0x0001
 111 #define CL22_Page_MiscReg    0x0002
 112 #define CL22_Page_LpiReg     0x0003
 113 #define CL22_Page_tReg       0x02A3
 114 #define CL22_Page_TrReg      0x52B5
 115
 116 /* CL45 Reg Support DEVID */
 117 #define DEVID_03             0x03
 118 #define DEVID_07             0x07
 119 #define DEVID_1E             0x1E
 120 #define DEVID_1F             0x1F
 121
 122 /* TokenRing Reg Access */
 123 #define TrReg_PKT_XMT_STA    0x8000
 124 #define TrReg_WR             0x8000
 125 #define TrReg_RD             0xA000
 126
 127 #define RgAddr_LPI_1Ch       0x1c
 128 #define RgAddr_AUXILIARY_1Dh 0x1d
 129 #define RgAddr_PMA_00h       0x0f80
 130 #define RgAddr_PMA_01h       0x0f82
 131 #define RgAddr_PMA_17h       0x0fae
 132 #define RgAddr_PMA_18h       0x0fb0
 133 #define RgAddr_DSPF_03h      0x1686
 134 #define RgAddr_DSPF_06h      0x168c
 135 #define RgAddr_DSPF_08h      0x1690
 136 #define RgAddr_DSPF_0Ch      0x1698
 137 #define RgAddr_DSPF_0Dh      0x169a
 138 #define RgAddr_DSPF_0Fh      0x169e
 139 #define RgAddr_DSPF_10h      0x16a0
 140 #define RgAddr_DSPF_11h      0x16a2
 141 #define RgAddr_DSPF_13h      0x16a6
 142 #define RgAddr_DSPF_14h      0x16a8
 143 #define RgAddr_DSPF_1Bh      0x16b6
 144 #define RgAddr_DSPF_1Ch      0x16b8
 145 #define RgAddr_TR_26h        0x0ecc
 146 #define RgAddr_R1000DEC_15h  0x03aa
 147 #define RgAddr_R1000DEC_17h  0x03ae
 148
 149 #define LED_BCR                     (0x021)
 150 #define LED_BCR_EXT_CTRL            (1 << 15)
 151 #define LED_BCR_CLK_EN              (1 << 3)
 152 #define LED_BCR_TIME_TEST           (1 << 2)
 153 #define LED_BCR_MODE_MASK           (3)
 154 #define LED_BCR_MODE_DISABLE        (0)
 155
 156 #define LED_ON_DUR                  (0x022)
 157 #define LED_ON_DUR_MASK             (0xffff)
 158
 159 #define LED_BLK_DUR                 (0x023)
 160 #define LED_BLK_DUR_MASK            (0xffff)
 161
 162 #define LED_GPIO_SEL_MASK 0x7FFFFFF
 163
 164 #define UNIT_LED_BLINK_DURATION     1024
 165
 166 /* Invalid data */
 167 #define INVALID_DATA            0xffffffff
 168
 169 #define LED_SET_GPIO_SEL(gpio, led, val)             \
 170                         (val |= (led << (8 * (gpio % 4))))       \
 171
 172 #define GET_BIT(val, bit) ((val & BIT(bit)) >> bit)
 173 /* DATA TYPE DECLARATIONS
 174  */
 175 struct AIR_BASE_T_LED_CFG_S {
 176         u16 en;
 177         u16 gpio;
 178         u16 pol;
 179         u16 on_cfg;
 180         u16 blk_cfg;
 181 };
 182
 183 union gephy_all_REG_LpiReg1Ch {
 184         struct {
 185                 /* b[15:00] */
 186                 u16 smi_deton_wt                             : 3;
 187                 u16 smi_det_mdi_inv                          : 1;
 188                 u16 smi_detoff_wt                            : 3;
 189                 u16 smi_sigdet_debouncing_en                 : 1;
 190                 u16 smi_deton_th                             : 6;
 191                 u16 rsv_14                                   : 2;
 192         } DataBitField;
 193         u16 DATA;
 194 };
 195
 196 union gephy_all_REG_dev1Eh_reg324h {
 197         struct {
 198                 /* b[15:00] */
 199                 u16 rg_smi_detcnt_max                        : 6;
 200                 u16 rsv_6                                    : 2;
 201                 u16 rg_smi_det_max_en                        : 1;
 202                 u16 smi_det_deglitch_off                     : 1;
 203                 u16 rsv_10                                   : 6;
 204         } DataBitField;
 205         u16 DATA;
 206 };
 207
 208 union gephy_all_REG_dev1Eh_reg012h {
 209         struct {
 210                 /* b[15:00] */
 211                 u16 da_tx_i2mpb_a_tbt                        : 6;
 212                 u16 rsv_6                                    : 4;
 213                 u16 da_tx_i2mpb_a_gbe                        : 6;
 214         } DataBitField;
 215         u16 DATA;
 216 };
 217
 218 union gephy_all_REG_dev1Eh_reg017h {
 219         struct {
 220                 /* b[15:00] */
 221                 u16 da_tx_i2mpb_b_tbt                        : 6;
 222                 u16 rsv_6                                    : 2;
 223                 u16 da_tx_i2mpb_b_gbe                        : 6;
 224                 u16 rsv_14                                   : 2;
 225         } DataBitField;
 226         u16 DATA;
 227 };
 228
 229 enum {
 230         AIR_LED_BLK_DUR_32M,
 231         AIR_LED_BLK_DUR_64M,
 232         AIR_LED_BLK_DUR_128M,
 233         AIR_LED_BLK_DUR_256M,
 234         AIR_LED_BLK_DUR_512M,
 235         AIR_LED_BLK_DUR_1024M,
 236         AIR_LED_BLK_DUR_LAST
 237 };
 238
 239 enum {
 240         AIR_ACTIVE_LOW,
 241         AIR_ACTIVE_HIGH,
 242 };
 243
 244 enum {
 245         AIR_LED_MODE_DISABLE,
 246         AIR_LED_MODE_USER_DEFINE,
 247         AIR_LED_MODE_LAST
 248 };
 249
 250 #endif /* End of __EN8801SC_H */