target/linux/mediatek/dts/mt7622-dlink-eagle-pro-ai-ax3200-a1.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 /dts-v1/;
   4 #include "mt7622.dtsi"
   5 #include "mt6380.dtsi"
   6 #include <dt-bindings/gpio/gpio.h>
   7 #include <dt-bindings/input/input.h>
   8
   9 / {
  10         aliases {
  11                 serial0 = &uart0;
  12                 label-mac-device = &gmac0;
  13         };
  14
  15         chosen {
  16                 stdout-path = "serial0:115200n8";
  17                 bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8 swiotlb=512";
  18         };
  19
  20         cpus {
  21                 cpu@0 {
  22                         proc-supply = <&mt6380_vcpu_reg>;
  23                         sram-supply = <&mt6380_vm_reg>;
  24                 };
  25
  26                 cpu@1 {
  27                         proc-supply = <&mt6380_vcpu_reg>;
  28                         sram-supply = <&mt6380_vm_reg>;
  29                 };
  30         };
  31
  32         gpio-keys {
  33                 compatible = "gpio-keys";
  34
  35                 button-reset {
  36                         gpios = <&pio 0 GPIO_ACTIVE_LOW>;
  37                         label = "reset";
  38                         linux,code = <KEY_RESTART>;
  39                 };
  40
  41                 button-wps {
  42                         gpios = <&pio 102 GPIO_ACTIVE_LOW>;
  43                         label = "wps";
  44                         linux,code = <KEY_WPS_BUTTON>;
  45                 };
  46         };
  47
  48         memory {
  49                 reg = <0 0x40000000 0 0x40000000>;
  50         };
  51 };
  52
  53 &bch {
  54         status = "okay";
  55 };
  56
  57 &eth {
  58         pinctrl-names = "default";
  59         pinctrl-0 = <&eth_pins>;
  60         status = "okay";
  61
  62         gmac0: mac@0 {
  63                 compatible = "mediatek,eth-mac";
  64                 phy-mode = "2500base-x";
  65                 reg = <0>;
  66                 nvmem-cells = <&macaddr_odm 1>;
  67                 nvmem-cell-names = "mac-address";
  68                 fixed-link {
  69                         full-duplex;
  70                         pause;
  71                         speed = <2500>;
  72                 };
  73         };
  74
  75         mdio-bus {
  76                 #address-cells = <1>;
  77                 #size-cells = <0>;
  78
  79                 switch: switch@1f {
  80                         compatible = "mediatek,mt7531";
  81                         reg = <31>;
  82                         interrupt-controller;
  83                         #interrupt-cells = <1>;
  84                         interrupt-parent = <&pio>;
  85                         interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
  86                         reset-gpios = <&pio 54 0>;
  87
  88                         ports {
  89                                 wan: port@4 {
  90                                         reg = <4>;
  91                                         label = "wan";
  92                                         nvmem-cells = <&macaddr_odm 0>;
  93                                         nvmem-cell-names = "mac-address";
  94                                 };
  95
  96                                 port@6 {
  97                                         reg = <6>;
  98                                         ethernet = <&gmac0>;
  99                                         phy-mode = "2500base-x";
 100
 101                                         fixed-link {
 102                                                 speed = <2500>;
 103                                                 full-duplex;
 104                                                 pause;
 105                                         };
 106                                 };
 107                         };
 108                 };
 109         };
 110 };
 111
 112 &pcie0 {
 113         pinctrl-names = "default";
 114         pinctrl-0 = <&pcie0_pins>;
 115         status = "okay";
 116 };
 117
 118 &pcie1 {
 119         pinctrl-names = "default";
 120         pinctrl-0 = <&pcie1_pins>;
 121         status = "okay";
 122 };
 123
 124 &pio {
 125         epa_elna_pins: epa-elna-pins {
 126                 mux {
 127                         function = "antsel";
 128                         groups = "antsel0", "antsel1", "antsel2", "antsel3",
 129                                 "antsel4", "antsel5", "antsel6", "antsel7",
 130                                 "antsel8", "antsel9", "antsel12", "antsel13",
 131                                 "antsel14", "antsel15", "antsel16", "antsel17";
 132                 };
 133         };
 134
 135         eth_pins: eth-pins {
 136                 mux {
 137                         function = "eth";
 138                         groups = "mdc_mdio", "rgmii_via_gmac2";
 139                 };
 140         };
 141
 142         pcie0_pins: pcie0-pins {
 143                 mux {
 144                         function = "pcie";
 145                         groups = "pcie0_pad_perst",
 146                                  "pcie0_1_waken",
 147                                  "pcie0_1_clkreq";
 148                 };
 149         };
 150
 151         pcie1_pins: pcie1-pins {
 152                 mux {
 153                         function = "pcie";
 154                         groups = "pcie1_pad_perst",
 155                                  "pcie1_0_waken",
 156                                  "pcie1_0_clkreq";
 157                 };
 158         };
 159
 160         pmic_bus_pins: pmic-bus-pins {
 161                 mux {
 162                         function = "pmic";
 163                         groups = "pmic_bus";
 164                 };
 165         };
 166
 167         /* Serial NAND is shared pin with SPI-NOR */
 168         serial_nand_pins: serial-nand-pins {
 169                 mux {
 170                         function = "flash";
 171                         groups = "snfi";
 172                 };
 173         };
 174
 175         uart0_pins: uart0-pins {
 176                 mux {
 177                         function = "uart";
 178                         groups = "uart0_0_tx_rx";
 179                 };
 180         };
 181
 182         watchdog_pins: watchdog-pins {
 183                 mux {
 184                         function = "watchdog";
 185                         groups = "watchdog";
 186                 };
 187         };
 188 };
 189
 190 &pwrap {
 191         pinctrl-names = "default";
 192         pinctrl-0 = <&pmic_bus_pins>;
 193         status = "okay";
 194 };
 195
 196 &rtc {
 197         status = "disabled";
 198 };
 199
 200 &sata {
 201         status = "disabled";
 202 };
 203
 204 &sata_phy {
 205         status = "disabled";
 206 };
 207
 208 &slot0 {
 209         wmac1: mt7915@0,0 {
 210                 reg = <0x0000 0 0 0 0>;
 211                 ieee80211-freq-limit = <5000000 6000000>;
 212                 mediatek,mtd-eeprom = <&factory 0x05000>;
 213                 nvmem-cells = <&macaddr_odm 3>;
 214                 nvmem-cell-names = "mac-address";
 215         };
 216 };
 217
 218 &snfi {
 219         pinctrl-names = "default";
 220         pinctrl-0 = <&serial_nand_pins>;
 221         status = "okay";
 222
 223         snand: flash@0 {
 224                 compatible = "spi-nand";
 225                 mediatek,bmt-table-size = <0x1000>;
 226                 mediatek,bmt-v2;
 227                 nand-ecc-engine = <&snfi>;
 228                 reg = <0>;
 229                 spi-rx-bus-width = <4>;
 230                 spi-tx-bus-width = <4>;
 231
 232                 partitions {
 233                         compatible = "fixed-partitions";
 234                         #address-cells = <1>;
 235                         #size-cells = <1>;
 236
 237                         partition@0 {
 238                                 label = "Preloader";
 239                                 reg = <0x00000000 0x00080000>;
 240                                 read-only;
 241                         };
 242
 243                         partition@80000 {
 244                                 label = "ATF";
 245                                 reg = <0x00080000 0x00040000>;
 246                                 read-only;
 247                         };
 248
 249                         partition@C0000 {
 250                                 label = "Bootloader";
 251                                 reg = <0x000C0000 0x00080000>;
 252                                 read-only;
 253                         };
 254
 255                         partition@140000 {
 256                                 label = "BootConfig";
 257                                 reg = <0x00140000 0x00040000>;
 258                         };
 259
 260                         partition@180000 {
 261                                 label = "Odm";
 262                                 reg = <0x00180000 0x00040000>;
 263                                 read-only;
 264                                 odm_partition: nvmem-layout {
 265                                         compatible = "fixed-layout";
 266                                 };
 267                         };
 268
 269                         config1: partition@1C0000 {
 270                                 compatible = "nvmem-cells";
 271                                 label = "Config1";
 272                                 reg = <0x001C0000 0x00080000>;
 273                                 read-only;
 274                         };
 275
 276                         partition@240000 {
 277                                 label = "Config2";
 278                                 reg = <0x00240000 0x00080000>;
 279                                 read-only;
 280                         };
 281
 282                         partition@2C0000 {
 283                                 label = "Kernel1";
 284                                 reg = <0x002C0000 0x02D00000>;
 285
 286                                 compatible = "denx,fit";
 287                                 openwrt,cmdline-match = "boot_part=Kernel1";
 288                                 partition@0 {
 289                                         label = "kernel";
 290                                         reg = <0x00000000 0x00800000>;
 291                                 };
 292
 293                                 partition@800000 {
 294                                         label = "ubi";
 295                                         reg = <0x00800000 0x02500000>;
 296                                 };
 297                         };
 298
 299                         partition@2FC0000 {
 300                                 label = "Kernel2";
 301                                 reg = <0x02FC0000 0x02D00000>;
 302
 303                                 compatible = "denx,fit";
 304                                 openwrt,cmdline-match = "boot_part=Kernel2";
 305                                 partition@0 {
 306                                         label = "kernel";
 307                                         reg = <0x00000000 0x00800000>;
 308                                 };
 309
 310                                 partition@800000 {
 311                                         label = "ubi";
 312                                         reg = <0x00800000 0x02500000>;
 313                                 };
 314                         };
 315
 316                         factory: partition@5CC0000 {
 317                                 label = "Factory";
 318                                 reg = <0x05CC0000 0x00100000>;
 319                                 read-only;
 320                         };
 321
 322                         partition@5DC0000 {
 323                                 label = "Mydlink";
 324                                 reg = <0x05DC0000 0x00200000>;
 325                                 read-only;
 326                         };
 327
 328                         partition@5FC0000 {
 329                                 label = "Storage";
 330                                 reg = <0x05FC0000 0x00300000>;
 331                                 read-only;
 332                         };
 333                 };
 334         };
 335 };
 336
 337 &ssusb {
 338         status = "disabled";
 339 };
 340
 341 &u3phy {
 342         status = "disabled";
 343 };
 344
 345 &uart0 {
 346         pinctrl-names = "default";
 347         pinctrl-0 = <&uart0_pins>;
 348         status = "okay";
 349 };
 350
 351 &watchdog {
 352         pinctrl-names = "default";
 353         pinctrl-0 = <&watchdog_pins>;
 354         status = "okay";
 355 };
 356
 357 &wmac {
 358         pinctrl-names = "default";
 359         pinctrl-0 = <&epa_elna_pins>;
 360         mediatek,mtd-eeprom = <&factory 0x0000>;
 361         nvmem-cells = <&macaddr_odm 2>;
 362         nvmem-cell-names = "mac-address";
 363         status = "okay";
 364 };
 365