ipq807x: add Qualcomm Atheros IPQ807x target
[openwrt/staging/stintel.git] / target / linux / ipq807x / patches-5.15 / 0124-soc-qcom-socinfo-move-SMEM-item-struct-and-defines-t.patch
1 From 97505f4c049fa2e8c86a53411a9e599033898533 Mon Sep 17 00:00:00 2001
2 From: Robert Marko <robimarko@gmail.com>
3 Date: Sat, 31 Dec 2022 00:27:42 +0100
4 Subject: [PATCH] soc: qcom: socinfo: move SMEM item struct and defines to a
5 header
6
7 Move SMEM item struct and related defines to a header in order to be able
8 to reuse them in the Qualcomm NVMEM CPUFreq driver instead of duplicating
9 them.
10
11 Signed-off-by: Robert Marko <robimarko@gmail.com>
12 ---
13 drivers/soc/qcom/socinfo.c | 58 +--------------------------
14 include/linux/soc/qcom/socinfo.h | 67 ++++++++++++++++++++++++++++++++
15 2 files changed, 68 insertions(+), 57 deletions(-)
16 create mode 100644 include/linux/soc/qcom/socinfo.h
17
18 --- a/drivers/soc/qcom/socinfo.c
19 +++ b/drivers/soc/qcom/socinfo.c
20 @@ -11,6 +11,7 @@
21 #include <linux/random.h>
22 #include <linux/slab.h>
23 #include <linux/soc/qcom/smem.h>
24 +#include <linux/soc/qcom/socinfo.h>
25 #include <linux/string.h>
26 #include <linux/sys_soc.h>
27 #include <linux/types.h>
28 @@ -25,15 +26,6 @@
29 #define SOCINFO_MINOR(ver) ((ver) & 0xffff)
30 #define SOCINFO_VERSION(maj, min) ((((maj) & 0xffff) << 16)|((min) & 0xffff))
31
32 -#define SMEM_SOCINFO_BUILD_ID_LENGTH 32
33 -#define SMEM_SOCINFO_CHIP_ID_LENGTH 32
34 -
35 -/*
36 - * SMEM item id, used to acquire handles to respective
37 - * SMEM region.
38 - */
39 -#define SMEM_HW_SW_BUILD_ID 137
40 -
41 #ifdef CONFIG_DEBUG_FS
42 #define SMEM_IMAGE_VERSION_BLOCKS_COUNT 32
43 #define SMEM_IMAGE_VERSION_SIZE 4096
44 @@ -105,54 +97,6 @@ static const char *const pmic_models[] =
45 };
46 #endif /* CONFIG_DEBUG_FS */
47
48 -/* Socinfo SMEM item structure */
49 -struct socinfo {
50 - __le32 fmt;
51 - __le32 id;
52 - __le32 ver;
53 - char build_id[SMEM_SOCINFO_BUILD_ID_LENGTH];
54 - /* Version 2 */
55 - __le32 raw_id;
56 - __le32 raw_ver;
57 - /* Version 3 */
58 - __le32 hw_plat;
59 - /* Version 4 */
60 - __le32 plat_ver;
61 - /* Version 5 */
62 - __le32 accessory_chip;
63 - /* Version 6 */
64 - __le32 hw_plat_subtype;
65 - /* Version 7 */
66 - __le32 pmic_model;
67 - __le32 pmic_die_rev;
68 - /* Version 8 */
69 - __le32 pmic_model_1;
70 - __le32 pmic_die_rev_1;
71 - __le32 pmic_model_2;
72 - __le32 pmic_die_rev_2;
73 - /* Version 9 */
74 - __le32 foundry_id;
75 - /* Version 10 */
76 - __le32 serial_num;
77 - /* Version 11 */
78 - __le32 num_pmics;
79 - __le32 pmic_array_offset;
80 - /* Version 12 */
81 - __le32 chip_family;
82 - __le32 raw_device_family;
83 - __le32 raw_device_num;
84 - /* Version 13 */
85 - __le32 nproduct_id;
86 - char chip_id[SMEM_SOCINFO_CHIP_ID_LENGTH];
87 - /* Version 14 */
88 - __le32 num_clusters;
89 - __le32 ncluster_array_offset;
90 - __le32 num_defective_parts;
91 - __le32 ndefective_parts_array_offset;
92 - /* Version 15 */
93 - __le32 nmodem_supported;
94 -};
95 -
96 #ifdef CONFIG_DEBUG_FS
97 struct socinfo_params {
98 u32 raw_device_family;
99 --- /dev/null
100 +++ b/include/linux/soc/qcom/socinfo.h
101 @@ -0,0 +1,67 @@
102 +// SPDX-License-Identifier: GPL-2.0
103 +/*
104 + * Copyright (c) 2009-2017, The Linux Foundation. All rights reserved.
105 + * Copyright (c) 2017-2019, Linaro Ltd.
106 + */
107 +
108 +#ifndef __QCOM_SOCINFO_H__
109 +#define __QCOM_SOCINFO_H__
110 +
111 +/*
112 + * SMEM item id, used to acquire handles to respective
113 + * SMEM region.
114 + */
115 +#define SMEM_HW_SW_BUILD_ID 137
116 +
117 +#define SMEM_SOCINFO_BUILD_ID_LENGTH 32
118 +#define SMEM_SOCINFO_CHIP_ID_LENGTH 32
119 +
120 +/* Socinfo SMEM item structure */
121 +struct socinfo {
122 + __le32 fmt;
123 + __le32 id;
124 + __le32 ver;
125 + char build_id[SMEM_SOCINFO_BUILD_ID_LENGTH];
126 + /* Version 2 */
127 + __le32 raw_id;
128 + __le32 raw_ver;
129 + /* Version 3 */
130 + __le32 hw_plat;
131 + /* Version 4 */
132 + __le32 plat_ver;
133 + /* Version 5 */
134 + __le32 accessory_chip;
135 + /* Version 6 */
136 + __le32 hw_plat_subtype;
137 + /* Version 7 */
138 + __le32 pmic_model;
139 + __le32 pmic_die_rev;
140 + /* Version 8 */
141 + __le32 pmic_model_1;
142 + __le32 pmic_die_rev_1;
143 + __le32 pmic_model_2;
144 + __le32 pmic_die_rev_2;
145 + /* Version 9 */
146 + __le32 foundry_id;
147 + /* Version 10 */
148 + __le32 serial_num;
149 + /* Version 11 */
150 + __le32 num_pmics;
151 + __le32 pmic_array_offset;
152 + /* Version 12 */
153 + __le32 chip_family;
154 + __le32 raw_device_family;
155 + __le32 raw_device_num;
156 + /* Version 13 */
157 + __le32 nproduct_id;
158 + char chip_id[SMEM_SOCINFO_CHIP_ID_LENGTH];
159 + /* Version 14 */
160 + __le32 num_clusters;
161 + __le32 ncluster_array_offset;
162 + __le32 num_defective_parts;
163 + __le32 ndefective_parts_array_offset;
164 + /* Version 15 */
165 + __le32 nmodem_supported;
166 +};
167 +
168 +#endif