ipq807x: add Qualcomm Atheros IPQ807x target
[openwrt/staging/stintel.git] / target / linux / ipq807x / patches-5.15 / 0123-arm64-dts-ipq8074-add-cooling-cells-to-CPU-nodes.patch
1 From 347ca56e86c99021fad059b9a8ef101245b8507e Mon Sep 17 00:00:00 2001
2 From: Robert Marko <robimarko@gmail.com>
3 Date: Fri, 31 Dec 2021 20:38:06 +0100
4 Subject: [PATCH] arm64: dts: ipq8074: add cooling cells to CPU nodes
5
6 Since there is CPU Freq support as well as thermal sensor support
7 now for the IPQ8074, add cooling cells to CPU nodes so that they can
8 be used as cooling devices using CPU Freq.
9
10 Signed-off-by: Robert Marko <robimarko@gmail.com>
11 ---
12 arch/arm64/boot/dts/qcom/ipq8074.dtsi | 4 ++++
13 1 file changed, 4 insertions(+)
14
15 --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
16 +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
17 @@ -41,6 +41,7 @@
18 enable-method = "psci";
19 clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
20 clock-names = "cpu";
21 + #cooling-cells = <2>;
22 };
23
24 CPU1: cpu@1 {
25 @@ -51,6 +52,7 @@
26 next-level-cache = <&L2_0>;
27 clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
28 clock-names = "cpu";
29 + #cooling-cells = <2>;
30 };
31
32 CPU2: cpu@2 {
33 @@ -61,6 +63,7 @@
34 next-level-cache = <&L2_0>;
35 clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
36 clock-names = "cpu";
37 + #cooling-cells = <2>;
38 };
39
40 CPU3: cpu@3 {
41 @@ -71,6 +74,7 @@
42 next-level-cache = <&L2_0>;
43 clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
44 clock-names = "cpu";
45 + #cooling-cells = <2>;
46 };
47
48 L2_0: l2-cache {