CI: build-tools: build all host tools
[openwrt/staging/stintel.git] / target / linux / ipq807x / files / arch / arm64 / boot / dts / qcom / ipq8072-301w.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 /* Copyright (c) 2021, Dirk Buchwalder <buchwalder@posteo.de> */
3
4 /dts-v1/;
5
6 #include "ipq8074.dtsi"
7 #include "ipq8074-hk-cpu.dtsi"
8 #include "ipq8074-ess.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12
13 / {
14 model = "QNAP 301w";
15 compatible = "qnap,301w", "qcom,ipq8074";
16
17 aliases {
18 serial0 = &blsp1_uart5;
19 /*
20 * Aliases as required by u-boot
21 * to patch MAC addresses
22 */
23 led-boot = &led_system_red;
24 led-failsafe = &led_system_red;
25 led-running = &led_pwr_green;
26 led-upgrade = &led_system_red;
27 ethernet0 = &dp1;
28 ethernet1 = &dp2;
29 ethernet2 = &dp3;
30 ethernet3 = &dp4;
31 ethernet4 = &dp5;
32 ethernet5 = &dp6_syn;
33 label-mac-device = &dp1;
34 };
35
36 chosen {
37 stdout-path = "serial0:115200n8";
38 };
39
40 keys {
41 compatible = "gpio-keys";
42 pinctrl-0 = <&button_pins>;
43 pinctrl-names = "default";
44
45 wps-button {
46 label = "wps";
47 gpios = <&tlmm 57 GPIO_ACTIVE_LOW>;
48 linux,code = <KEY_WPS_BUTTON>;
49 };
50
51 reset-button {
52 label = "reset";
53 gpios = <&tlmm 67 GPIO_ACTIVE_LOW>;
54 linux,code = <KEY_RESTART>;
55 };
56 };
57
58 leds {
59 compatible = "gpio-leds";
60 pinctrl-0 = <&leds_pins>;
61 pinctrl-names = "default";
62
63 led_system_green: led-system-green {
64 label = "green:system";
65 gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>;
66 color = <LED_COLOR_ID_GREEN>;
67 };
68
69 led_system_red: led-system-red {
70 label = "red:system";
71 gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
72 color = <LED_COLOR_ID_RED>;
73 };
74
75 led_pwr_green: led-pwr-green {
76 label = "green:pwr";
77 gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
78 color = <LED_COLOR_ID_GREEN>;
79 };
80
81 led-wifi-green {
82 label = "green:wifi";
83 gpios = <&tlmm 42 GPIO_ACTIVE_HIGH>;
84 color = <LED_COLOR_ID_GREEN>;
85 };
86
87 led-lan4-green {
88 label = "green:lan4";
89 gpios = <&tlmm 6 GPIO_ACTIVE_HIGH>;
90 color = <LED_COLOR_ID_GREEN>;
91 };
92
93 led-lan4-amber {
94 label = "amber:lan4";
95 gpios = <&tlmm 7 GPIO_ACTIVE_HIGH>;
96 color = <LED_COLOR_ID_AMBER>;
97 };
98
99 led-lan3-green {
100 label = "green:lan3";
101 gpios = <&tlmm 8 GPIO_ACTIVE_HIGH>;
102 color = <LED_COLOR_ID_GREEN>;
103 };
104
105 led-lan3-amber {
106 label = "amber:lan3";
107 gpios = <&tlmm 11 GPIO_ACTIVE_HIGH>;
108 color = <LED_COLOR_ID_AMBER>;
109 };
110
111 led-lan2-green {
112 label = "green:lan2";
113 gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
114 color = <LED_COLOR_ID_GREEN>;
115 };
116
117 led-lan2-amber {
118 label = "amber:lan2";
119 gpios = <&tlmm 13 GPIO_ACTIVE_HIGH>;
120 color = <LED_COLOR_ID_AMBER>;
121 };
122
123 led-lan1-green {
124 label = "green:lan1";
125 gpios = <&tlmm 14 GPIO_ACTIVE_HIGH>;
126 color = <LED_COLOR_ID_GREEN>;
127 };
128
129 led-lan1-amber {
130 label = "amber:lan1";
131 gpios = <&tlmm 15 GPIO_ACTIVE_HIGH>;
132 color = <LED_COLOR_ID_AMBER>;
133 };
134
135 led-10g-1-green {
136 label = "green:10g_1";
137 gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
138 color = <LED_COLOR_ID_GREEN>;
139 };
140
141 led-10g-1-amber {
142 label = "amber:10g_1";
143 gpios = <&tlmm 56 GPIO_ACTIVE_HIGH>;
144 color = <LED_COLOR_ID_AMBER>;
145 };
146
147 led-10g-2-green {
148 label = "green:10g_2";
149 gpios = <&tlmm 51 GPIO_ACTIVE_HIGH>;
150 color = <LED_COLOR_ID_GREEN>;
151 };
152
153 led-10g-2-amber {
154 label = "amber:10g_2";
155 gpios = <&tlmm 52 GPIO_ACTIVE_HIGH>;
156 color = <LED_COLOR_ID_AMBER>;
157 };
158 };
159 };
160
161 &tlmm {
162
163 mdio_pins: mdio-state {
164 mdc-pins {
165 pins = "gpio68";
166 function = "mdc";
167 drive-strength = <8>;
168 bias-pull-up;
169 };
170
171 mdio-pins {
172 pins = "gpio69";
173 function = "mdio";
174 drive-strength = <8>;
175 bias-pull-up;
176 };
177 };
178
179 button_pins: button-state {
180 wps-pins {
181 pins = "gpio57";
182 function = "gpio";
183 drive-strength = <8>;
184 bias-pull-up;
185 };
186
187 rst-pins {
188 pins = "gpio67";
189 function = "gpio";
190 drive-strength = <8>;
191 bias-pull-up;
192 };
193 };
194
195 leds_pins: leds-state {
196 pins = "gpio1", "gpio3", "gpio4", "gpio6", "gpio7", "gpio8",
197 "gpio11", "gpio12", "gpio13", "gpio14", "gpio15", "gpio42",
198 "gpio51", "gpio52", "gpio54", "gpio56";
199 function = "gpio";
200 drive-strength = <8>;
201 bias-pull-down;
202 };
203 };
204
205 &blsp1_uart5 {
206 status = "okay";
207 };
208
209 &prng {
210 status = "okay";
211 };
212
213 &ssphy_0 {
214 status = "okay";
215 };
216
217 &qusb_phy_0 {
218 status = "okay";
219 };
220
221 &ssphy_1 {
222 status = "okay";
223 };
224
225 &qusb_phy_1 {
226 status = "okay";
227 };
228
229 &usb_0 {
230 status = "okay";
231 };
232
233 &usb_1 {
234 status = "okay";
235 };
236
237 &cryptobam {
238 status = "okay";
239 };
240
241 &crypto {
242 status = "okay";
243 };
244
245 &qpic_bam {
246 status = "okay";
247 };
248
249 &blsp1_spi1 { /* BLSP1 QUP1 */
250 pinctrl-0 = <&spi_0_pins>;
251 pinctrl-names = "default";
252 cs-gpios = <0>;
253 status = "okay";
254
255 flash@0 {
256 #address-cells = <1>;
257 #size-cells = <1>;
258 reg = <0>;
259 compatible = "jedec,spi-nor";
260 spi-max-frequency = <50000000>;
261
262 partitions {
263 compatible = "qcom,smem-part";
264 };
265 };
266 };
267
268 &mdio {
269 status = "okay";
270
271 pinctrl-0 = <&mdio_pins>;
272 pinctrl-names = "default";
273 reset-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>;
274
275 aqr113c_0: ethernet-phy@0 {
276 compatible ="ethernet-phy-ieee802.3-c45";
277 reg = <0>;
278 reset-gpios = <&tlmm 59 GPIO_ACTIVE_LOW>;
279 };
280
281 aqr113c_8: ethernet-phy@8 {
282 compatible ="ethernet-phy-ieee802.3-c45";
283 reg = <8>;
284 reset-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
285 };
286
287 qca8075_16: ethernet-phy@16 {
288 compatible = "ethernet-phy-ieee802.3-c22";
289 reg = <16>;
290 };
291
292 qca8075_17: ethernet-phy@17 {
293 compatible = "ethernet-phy-ieee802.3-c22";
294 reg = <17>;
295 };
296
297 qca8075_18: ethernet-phy@18 {
298 compatible = "ethernet-phy-ieee802.3-c22";
299 reg = <18>;
300 };
301
302 qca8075_19: ethernet-phy@19 {
303 compatible = "ethernet-phy-ieee802.3-c22";
304 reg = <19>;
305 };
306 };
307
308 &sdhc_1 {
309 status = "okay";
310
311 /* According to the stock dts from the QNAP gpl drop
312 * the emmc has a problem with the hs400 > hs200 speed switch.
313 * Therefore remove the mmc-hs400-1_8v property
314 */
315 /delete-property/ mmc-hs400-1_8v;
316 mmc-hs200-1_8v;
317 mmc-ddr-1_8v;
318 vqmmc-supply = <&l11>;
319 };
320
321 &switch {
322 status = "okay";
323
324 switch_cpu_bmp = <0x1>; /* cpu port bitmap */
325 switch_lan_bmp = <0x3e>; /* lan port bitmap */
326 switch_wan_bmp = <0xc0>; /* wan port bitmap */
327 switch_mac_mode = <0xb>; /* mac mode for uniphy instance0*/
328 switch_mac_mode1 = <0xd>; /* mac mode for uniphy instance1*/
329 switch_mac_mode2 = <0xd>; /* mac mode for uniphy instance2*/
330 bm_tick_mode = <0>; /* bm tick mode */
331 tm_tick_mode = <0>; /* tm tick mode */
332
333 qcom,port_phyinfo {
334 port@0 {
335 port_id = <1>;
336 phy_address = <16>;
337 };
338 port@1 {
339 port_id = <2>;
340 phy_address = <17>;
341 };
342 port@2 {
343 port_id = <3>;
344 phy_address = <18>;
345 };
346 port@3 {
347 port_id = <4>;
348 phy_address = <19>;
349 };
350 port@4 {
351 port_id = <5>;
352 phy_address = <8>;
353 compatible = "ethernet-phy-ieee802.3-c45";
354 ethernet-phy-ieee802.3-c45;
355 };
356 port@5 {
357 port_id = <6>;
358 phy_address = <0>;
359 compatible = "ethernet-phy-ieee802.3-c45";
360 ethernet-phy-ieee802.3-c45;
361 };
362 };
363 };
364
365 &edma {
366 status = "okay";
367 };
368
369 &dp1 {
370 status = "okay";
371 phy-handle = <&qca8075_16>;
372 label = "lan4";
373 };
374
375 &dp2 {
376 status = "okay";
377 phy-handle = <&qca8075_17>;
378 label = "lan3";
379 };
380
381 &dp3 {
382 status = "okay";
383 phy-handle = <&qca8075_18>;
384 label = "lan2";
385 };
386
387 &dp4 {
388 status = "okay";
389 phy-handle = <&qca8075_19>;
390 label = "lan1";
391 };
392
393 &dp5 {
394 status = "okay";
395 qcom,mactype = <1>;
396 phy-handle = <&aqr113c_8>;
397 label = "10g-1";
398 };
399
400 &dp6_syn {
401 status = "okay";
402 phy-handle = <&aqr113c_0>;
403 label = "10g-2";
404 };
405
406 &wifi {
407 status = "okay";
408
409 qcom,ath11k-calibration-variant = "QNAP-301w";
410 };