target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wg2600hp.dts

   1 #include "qcom-ipq8064-v2.0-smb208.dtsi"
   2
   3 #include <dt-bindings/input/input.h>
   4
   5 / {
   6         model = "NEC Aterm WG2600HP";
   7         compatible = "nec,wg2600hp", "qcom,ipq8064";
   8
   9         memory@0 {
  10                 reg = <0x42000000 0x1e000000>;
  11                 device_type = "memory";
  12         };
  13
  14         aliases {
  15                 mdio-gpio0 = &mdio0;
  16
  17                 led-boot = &power_green;
  18                 led-failsafe = &power_red;
  19                 led-running = &power_green;
  20                 led-upgrade = &power_green;
  21         };
  22
  23         keys {
  24                 compatible = "gpio-keys";
  25                 pinctrl-0 = <&button_pins>;
  26                 pinctrl-names = "default";
  27
  28                 wps {
  29                         label = "wps";
  30                         gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>;
  31                         linux,code = <KEY_WPS_BUTTON>;
  32                         debounce-interval = <60>;
  33                         wakeup-source;
  34                 };
  35
  36                 reset {
  37                         label = "reset";
  38                         gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
  39                         linux,code = <KEY_RESTART>;
  40                         debounce-interval = <60>;
  41                         wakeup-source;
  42                 };
  43
  44                 bridge {
  45                         label = "bridge";
  46                         gpios = <&qcom_pinmux 24 GPIO_ACTIVE_LOW>;
  47                         linux,code = <BTN_0>;
  48                         linux,input-type = <EV_SW>;
  49                         debounce-interval = <60>;
  50                         wakeup-source;
  51                 };
  52
  53                 converter {
  54                         label = "converter";
  55                         gpios = <&qcom_pinmux 25 GPIO_ACTIVE_LOW>;
  56                         linux,code = <BTN_0>;
  57                         linux,input-type = <EV_SW>;
  58                         debounce-interval = <60>;
  59                         wakeup-source;
  60                 };
  61         };
  62
  63         leds {
  64                 compatible = "gpio-leds";
  65                 pinctrl-0 = <&led_pins>;
  66                 pinctrl-names = "default";
  67
  68                 converter_green {
  69                         label = "green:converter";
  70                         gpios = <&qcom_pinmux 6 GPIO_ACTIVE_HIGH>;
  71                 };
  72
  73                 power_red: power_red {
  74                         label = "red:power";
  75                         gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
  76                 };
  77
  78                 active_green {
  79                         label = "green:active";
  80                         gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
  81                 };
  82
  83                 active_red {
  84                         label = "red:active";
  85                         gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
  86                 };
  87
  88                 power_green: power_green {
  89                         label = "green:power";
  90                         gpios = <&qcom_pinmux 14 GPIO_ACTIVE_HIGH>;
  91                 };
  92
  93                 converter_red {
  94                         label = "red:converter";
  95                         gpios = <&qcom_pinmux 15 GPIO_ACTIVE_HIGH>;
  96                 };
  97
  98                 wlan2g_green {
  99                         label = "green:wlan2g";
 100                         gpios = <&qcom_pinmux 55 GPIO_ACTIVE_HIGH>;
 101                 };
 102
 103                 wlan2g_red {
 104                         label = "red:wlan2g";
 105                         gpios = <&qcom_pinmux 56 GPIO_ACTIVE_HIGH>;
 106                 };
 107
 108                 wlan5g_green {
 109                         label = "green:wlan5g";
 110                         gpios = <&qcom_pinmux 57 GPIO_ACTIVE_HIGH>;
 111                 };
 112
 113                 wlan5g_red {
 114                         label = "red:wlan5g";
 115                         gpios = <&qcom_pinmux 58 GPIO_ACTIVE_HIGH>;
 116                 };
 117
 118                 tv_green {
 119                         label = "green:tv";
 120                         gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
 121                 };
 122
 123                 tv_red {
 124                         label = "red:tv";
 125                         gpios = <&qcom_pinmux 65 GPIO_ACTIVE_HIGH>;
 126                 };
 127         };
 128 };
 129
 130 &CPU_SPC {
 131         status = "disabled";
 132 };
 133
 134 &adm_dma {
 135         status = "okay";
 136 };
 137
 138 &mdio0 {
 139         status = "okay";
 140
 141         pinctrl-0 = <&mdio0_pins>;
 142         pinctrl-names = "default";
 143
 144 switch@10 {
 145                 compatible = "qca,qca8337";
 146                 #address-cells = <1>;
 147                 #size-cells = <0>;
 148                 reg = <0x10>;
 149
 150                 ports {
 151                         #address-cells = <1>;
 152                         #size-cells = <0>;
 153
 154                         port@0 {
 155                                 reg = <0>;
 156                                 label = "cpu";
 157                                 ethernet = <&gmac1>;
 158                                 phy-mode = "rgmii";
 159                                 tx-internal-delay-ps = <1000>;
 160
 161                                 fixed-link {
 162                                         speed = <1000>;
 163                                         full-duplex;
 164                                 };
 165                         };
 166
 167                         port@1 {
 168                                 reg = <1>;
 169                                 label = "wan";
 170                                 phy-mode = "internal";
 171                                 phy-handle = <&phy_port1>;
 172                         };
 173
 174                         port@2 {
 175                                 reg = <2>;
 176                                 label = "lan1";
 177                                 phy-mode = "internal";
 178                                 phy-handle = <&phy_port2>;
 179                         };
 180
 181                         port@3 {
 182                                 reg = <3>;
 183                                 label = "lan2";
 184                                 phy-mode = "internal";
 185                                 phy-handle = <&phy_port3>;
 186                         };
 187
 188                         port@4 {
 189                                 reg = <4>;
 190                                 label = "lan3";
 191                                 phy-mode = "internal";
 192                                 phy-handle = <&phy_port4>;
 193                         };
 194
 195                         port@5 {
 196                                 reg = <5>;
 197                                 label = "lan4";
 198                                 phy-mode = "internal";
 199                                 phy-handle = <&phy_port5>;
 200                         };
 201
 202                         port@6 {
 203                                 reg = <6>;
 204                                 label = "cpu";
 205                                 ethernet = <&gmac2>;
 206                                 phy-mode = "sgmii";
 207                                 qca,sgmii-enable-pll;
 208                                 qca,sgmii-rxclk-falling-edge;
 209
 210                                 fixed-link {
 211                                         speed = <1000>;
 212                                         full-duplex;
 213                                 };
 214                         };
 215                 };
 216
 217                 mdio {
 218                         #address-cells = <1>;
 219                         #size-cells = <0>;
 220
 221                         phy_port1: phy@0 {
 222                                 reg = <0>;
 223                         };
 224
 225                         phy_port2: phy@1 {
 226                                 reg = <1>;
 227                         };
 228
 229                         phy_port3: phy@2 {
 230                                 reg = <2>;
 231                         };
 232
 233                         phy_port4: phy@3 {
 234                                 reg = <3>;
 235                         };
 236
 237                         phy_port5: phy@4 {
 238                                 reg = <4>;
 239                         };
 240                 };
 241         };
 242 };
 243
 244 &gmac1 {
 245         status = "okay";
 246
 247         phy-mode = "rgmii";
 248         qcom,id = <1>;
 249
 250         pinctrl-0 = <&rgmii2_pins>;
 251         pinctrl-names = "default";
 252
 253         nvmem-cells = <&macaddr_PRODUCTDATA_6>;
 254         nvmem-cell-names = "mac-address";
 255
 256         fixed-link {
 257                 speed = <1000>;
 258                 full-duplex;
 259         };
 260 };
 261
 262 &gmac2 {
 263         status = "okay";
 264
 265         phy-mode = "sgmii";
 266         qcom,id = <2>;
 267
 268         nvmem-cells = <&macaddr_PRODUCTDATA_0>;
 269         nvmem-cell-names = "mac-address";
 270
 271         fixed-link {
 272                 speed = <1000>;
 273                 full-duplex;
 274         };
 275 };
 276
 277 &gsbi5 {
 278         status = "okay";
 279
 280         qcom,mode = <GSBI_PROT_SPI>;
 281
 282         spi@1a280000 {
 283                 status = "okay";
 284
 285                 pinctrl-0 = <&spi_pins>;
 286                 pinctrl-names = "default";
 287
 288                 cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
 289
 290                 flash@0 {
 291                         compatible = "jedec,spi-nor";
 292                         spi-max-frequency = <50000000>;
 293                         reg = <0>;
 294
 295                         partitions {
 296                                 compatible = "fixed-partitions";
 297                                 #address-cells = <1>;
 298                                 #size-cells = <1>;
 299
 300                                 SBL1@0 {
 301                                         label = "SBL1";
 302                                         reg = <0x0 0x20000>;
 303                                         read-only;
 304                                 };
 305
 306                                 MIBIB@20000 {
 307                                         label = "MIBIB";
 308                                         reg = <0x20000 0x20000>;
 309                                         read-only;
 310                                 };
 311
 312                                 SBL2@40000 {
 313                                         label = "SBL2";
 314                                         reg = <0x40000 0x40000>;
 315                                         read-only;
 316                                 };
 317
 318                                 SBL3@80000 {
 319                                         label = "SBL3";
 320                                         reg = <0x80000 0x80000>;
 321                                         read-only;
 322                                 };
 323
 324                                 DDRCONFIG@100000 {
 325                                         label = "DDRCONFIG";
 326                                         reg = <0x100000 0x10000>;
 327                                         read-only;
 328                                 };
 329
 330                                 SSD@110000 {
 331                                         label = "SSD";
 332                                         reg = <0x110000 0x10000>;
 333                                         read-only;
 334                                 };
 335
 336                                 TZ@120000 {
 337                                         label = "TZ";
 338                                         reg = <0x120000 0x80000>;
 339                                         read-only;
 340                                 };
 341
 342                                 RPM@1a0000 {
 343                                         label = "RPM";
 344                                         reg = <0x1a0000 0x80000>;
 345                                         read-only;
 346                                 };
 347
 348                                 APPSBL@220000 {
 349                                         label = "APPSBL";
 350                                         reg = <0x220000 0x80000>;
 351                                         read-only;
 352                                 };
 353
 354                                 APPSBLENV@2a0000 {
 355                                         label = "APPSBLENV";
 356                                         reg = <0x2a0000 0x10000>;
 357                                 };
 358
 359                                 PRODUCTDATA: PRODUCTDATA@2b0000 {
 360                                         label = "PRODUCTDATA";
 361                                         reg = <0x2b0000 0x30000>;
 362                                         read-only;
 363
 364                                         nvmem-layout {
 365                                                 compatible = "fixed-layout";
 366                                                 #address-cells = <1>;
 367                                                 #size-cells = <1>;
 368
 369                                                 macaddr_PRODUCTDATA_0: macaddr@0 {
 370                                                         reg = <0x0 0x6>;
 371                                                 };
 372
 373                                                 macaddr_PRODUCTDATA_6: macaddr@6 {
 374                                                         reg = <0x6 0x6>;
 375                                                 };
 376
 377                                                 macaddr_PRODUCTDATA_c: macaddr@c {
 378                                                         reg = <0xc 0x6>;
 379                                                 };
 380
 381                                                 macaddr_PRODUCTDATA_12: macaddr@12 {
 382                                                         reg = <0x12 0x6>;
 383                                                 };
 384                                         };
 385                                 };
 386
 387                                 ART@2e0000 {
 388                                         label = "ART";
 389                                         reg = <0x2e0000 0x40000>;
 390                                         read-only;
 391
 392                                         nvmem-layout {
 393                                                 compatible = "fixed-layout";
 394                                                 #address-cells = <1>;
 395                                                 #size-cells = <1>;
 396
 397                                                 precal_ART_1000: precal@1000 {
 398                                                         reg = <0x1000 0x2f20>;
 399                                                 };
 400
 401                                                 precal_ART_5000: precal@5000 {
 402                                                         reg = <0x5000 0x2f20>;
 403                                                 };
 404                                         };
 405                                 };
 406
 407                                 TP@320000 {
 408                                         label = "TP";
 409                                         reg = <0x320000 0x40000>;
 410                                         read-only;
 411                                 };
 412
 413                                 TINY@360000 {
 414                                         label = "TINY";
 415                                         reg = <0x360000 0x500000>;
 416                                         read-only;
 417                                 };
 418
 419                                 firmware@860000 {
 420                                         compatible = "denx,uimage";
 421                                         label = "firmware";
 422                                         reg = <0x860000 0x17a0000>;
 423                                 };
 424                         };
 425                 };
 426         };
 427 };
 428
 429 &hs_phy_0 {
 430         status = "okay";
 431 };
 432
 433 &ss_phy_0 {
 434         status = "okay";
 435 };
 436
 437 &usb3_0 {
 438         status = "okay";
 439
 440         pinctrl-0 = <&usb_pwr_en_pins>;
 441         pinctrl-names = "default";
 442 };
 443
 444 &hs_phy_1 {
 445         status = "okay";
 446 };
 447
 448 &ss_phy_1 {
 449         status = "okay";
 450 };
 451
 452 &usb3_1 {
 453         status = "okay";
 454 };
 455
 456 &pcie0 {
 457         status = "okay";
 458
 459         bridge@0,0 {
 460                 reg = <0x00000000 0 0 0 0>;
 461                 #address-cells = <3>;
 462                 #size-cells = <2>;
 463                 ranges;
 464
 465                 wifi@1,0 {
 466                         compatible = "pci168c,0040";
 467                         reg = <0x00010000 0 0 0 0>;
 468
 469                         nvmem-cells = <&macaddr_PRODUCTDATA_12>, <&precal_ART_1000>;
 470                         nvmem-cell-names = "mac-address", "pre-calibration";
 471                 };
 472         };
 473 };
 474
 475 &pcie1 {
 476         status = "okay";
 477         max-link-speed = <1>;
 478
 479         bridge@0,0 {
 480                 reg = <0x00000000 0 0 0 0>;
 481                 #address-cells = <3>;
 482                 #size-cells = <2>;
 483                 ranges;
 484
 485                 wifi@1,0 {
 486                         compatible = "pci168c,0040";
 487                         reg = <0x00010000 0 0 0 0>;
 488
 489                         nvmem-cells = <&macaddr_PRODUCTDATA_c>, <&precal_ART_5000>;
 490                         nvmem-cell-names = "mac-address", "pre-calibration";
 491                 };
 492         };
 493 };
 494
 495 &qcom_pinmux {
 496         button_pins: button_pins {
 497                 mux {
 498                         pins = "gpio16", "gpio54", "gpio24", "gpio25";
 499                         function = "gpio";
 500                         drive-strength = <2>;
 501                         bias-pull-up;
 502                 };
 503         };
 504
 505         led_pins: led_pins {
 506                 mux {
 507                         pins = "gpio6", "gpio7", "gpio8", "gpio9", "gpio14",
 508                                 "gpio15", "gpio55", "gpio56", "gpio57", "gpio58",
 509                                 "gpio64", "gpio65";
 510                         function = "gpio";
 511                         drive-strength = <2>;
 512                         bias-pull-down;
 513                 };
 514         };
 515
 516         spi_pins: spi_pins {
 517                 mux {
 518                         pins = "gpio18", "gpio19", "gpio21";
 519                         function = "gsbi5";
 520                         bias-pull-down;
 521                 };
 522
 523                 data {
 524                         pins = "gpio18", "gpio19";
 525                         drive-strength = <10>;
 526                 };
 527
 528                 cs {
 529                         pins = "gpio20";
 530                         drive-strength = <10>;
 531                         bias-pull-up;
 532                 };
 533
 534                 clk {
 535                         pins = "gpio21";
 536                         drive-strength = <12>;
 537                 };
 538         };
 539
 540         usb_pwr_en_pins: usb_pwr_en_pins {
 541                 mux {
 542                         pins = "gpio22";
 543                         function = "gpio";
 544                         drive-strength = <2>;
 545                         bias-pull-down;
 546                         output-high;
 547                 };
 548         };
 549 };