base-files: reduce IPv6 ULA prefix generation to a single call
[openwrt/staging/stintel.git] / target / linux / ipq806x / files-6.1 / arch / arm / boot / dts / qcom-ipq8064-g10.dts
1 // SPDX-License-Identifier: GPL-2.0
2 #include "qcom-ipq8064-v2.0-smb208.dtsi"
3
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/leds/common.h>
6 #include <dt-bindings/soc/qcom,tcsr.h>
7
8 / {
9 compatible = "asrock,g10", "qcom,ipq8064";
10 model = "ASRock G10";
11
12 aliases {
13 ethernet0 = &gmac1;
14 ethernet1 = &gmac0;
15
16 led-boot = &led_status_blue;
17 led-failsafe = &led_status_amber;
18 led-running = &led_status_blue;
19 led-upgrade = &led_status_amber;
20 };
21
22 chosen {
23 bootargs-override = "console=ttyMSM0,115200n8";
24 };
25
26 leds {
27 compatible = "gpio-leds";
28
29 pinctrl-0 = <&led_pins>;
30 pinctrl-names = "default";
31
32 /*
33 * this is a bit misleading. Because there are about seven
34 * multicolor LEDs connected all wired together in parallel.
35 */
36
37 status_yellow {
38 function = LED_FUNCTION_STATUS;
39 color = <LED_COLOR_ID_YELLOW>;
40 gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
41 };
42
43 led_status_amber: status_amber {
44 function = LED_FUNCTION_STATUS;
45 color = <LED_COLOR_ID_AMBER>;
46 gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
47 };
48
49 led_status_blue: status_blue {
50 function = LED_FUNCTION_STATUS;
51 color = <LED_COLOR_ID_BLUE>;
52 gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
53 };
54
55 /*
56 * LED is declared in vendors boardfile but it's not
57 * working and the manual doesn't mention anything
58 * about the LED being white.
59
60 status_white {
61 function = LED_FUNCTION_STATUS;
62 color = <LED_COLOR_ID_WHITE>;
63 gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
64 };
65 */
66 };
67
68 i2c-gpio {
69 #address-cells = <1>;
70 #size-cells = <0>;
71
72 compatible = "i2c-gpio";
73 gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>, /* sda */
74 <&qcom_pinmux 54 GPIO_ACTIVE_HIGH>; /* scl */
75 i2c-gpio,delay-us = <5>;
76 i2c-gpio,scl-output-only;
77
78 mcu@50 {
79 reg = <0x50>;
80 compatible = "sonix,sn8f25e21";
81 };
82 };
83
84 keys {
85 compatible = "gpio-keys";
86
87 pinctrl-0 = <&button_pins>;
88 pinctrl-names = "default";
89
90 ir-remote {
91 label = "ir-remote";
92 gpios = <&qcom_pinmux 15 GPIO_ACTIVE_LOW>;
93 linux,code = <BTN_0>;
94 debounce-interval = <60>;
95 wakeup-source;
96 };
97
98 reset {
99 label = "reset";
100 gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>;
101 linux,code = <KEY_RESTART>;
102 debounce-interval = <60>;
103 wakeup-source;
104 };
105
106 wps5g {
107 label = "wps5g";
108 gpios = <&qcom_pinmux 64 GPIO_ACTIVE_LOW>;
109 linux,code = <KEY_WPS_BUTTON>;
110 debounce-interval = <60>;
111 wakeup-source;
112 };
113
114 wps2g {
115 label = "wps2g";
116 gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
117 linux,code = <KEY_WPS_BUTTON>;
118 debounce-interval = <60>;
119 wakeup-source;
120 };
121 };
122 };
123
124 &adm_dma {
125 status = "okay";
126 };
127
128 &gmac1 {
129 status = "okay";
130
131 pinctrl-0 = <&rgmii2_pins>;
132 pinctrl-names = "default";
133
134 phy-mode = "rgmii";
135 qcom,id = <1>;
136
137 fixed-link {
138 speed = <1000>;
139 full-duplex;
140 };
141 };
142
143 &gmac2 {
144 status = "okay";
145
146 phy-mode = "sgmii";
147 qcom,id = <2>;
148
149 fixed-link {
150 speed = <1000>;
151 full-duplex;
152 };
153 };
154
155 &gsbi4_serial {
156 pinctrl-0 = <&uart0_pins>;
157 pinctrl-names = "default";
158 };
159
160 &mdio0 {
161 status = "okay";
162
163 pinctrl-0 = <&mdio0_pins>;
164 pinctrl-names = "default";
165
166 switch@10 {
167 compatible = "qca,qca8337";
168 #address-cells = <1>;
169 #size-cells = <0>;
170 reg = <0x10>;
171
172 ports {
173 #address-cells = <1>;
174 #size-cells = <0>;
175
176 port@0 {
177 reg = <0>;
178 label = "cpu";
179 ethernet = <&gmac1>;
180 phy-mode = "rgmii";
181 tx-internal-delay-ps = <1000>;
182 rx-internal-delay-ps = <1000>;
183
184 fixed-link {
185 speed = <1000>;
186 full-duplex;
187 };
188 };
189
190 port@1 {
191 reg = <1>;
192 label = "wan";
193 phy-mode = "internal";
194 phy-handle = <&phy_port1>;
195 };
196
197 port@2 {
198 reg = <2>;
199 label = "lan1";
200 phy-mode = "internal";
201 phy-handle = <&phy_port2>;
202 };
203
204 port@3 {
205 reg = <3>;
206 label = "lan2";
207 phy-mode = "internal";
208 phy-handle = <&phy_port3>;
209 };
210
211 port@4 {
212 reg = <4>;
213 label = "lan3";
214 phy-mode = "internal";
215 phy-handle = <&phy_port4>;
216 };
217
218 port@5 {
219 reg = <5>;
220 label = "lan4";
221 phy-mode = "internal";
222 phy-handle = <&phy_port5>;
223 };
224
225 port@6 {
226 reg = <6>;
227 label = "cpu";
228 ethernet = <&gmac2>;
229 phy-mode = "sgmii";
230 qca,sgmii-enable-pll;
231
232 fixed-link {
233 speed = <1000>;
234 full-duplex;
235 };
236 };
237 };
238
239 mdio {
240 #address-cells = <1>;
241 #size-cells = <0>;
242
243 phy_port1: phy@0 {
244 reg = <0>;
245 };
246
247 phy_port2: phy@1 {
248 reg = <1>;
249 };
250
251 phy_port3: phy@2 {
252 reg = <2>;
253 };
254
255 phy_port4: phy@3 {
256 reg = <3>;
257 };
258
259 phy_port5: phy@4 {
260 reg = <4>;
261 };
262 };
263 };
264 };
265
266 &nand {
267 status = "okay";
268
269 nand@0 {
270 reg = <0>;
271 compatible = "qcom,nandcs";
272
273 nand-ecc-strength = <4>;
274 nand-bus-width = <8>;
275 nand-ecc-step-size = <512>;
276
277 nand-is-boot-medium;
278 qcom,boot-partitions = <0x0 0x1200000>;
279
280 partitions {
281 compatible = "qcom,smem-part";
282 };
283 };
284 };
285
286 &pcie0 {
287 status = "okay";
288
289 bridge@0,0 {
290 reg = <0x00000000 0 0 0 0>;
291 #address-cells = <3>;
292 #size-cells = <2>;
293 ranges;
294
295 wifi5g: wifi@1,0 {
296 reg = <0x00010000 0 0 0 0>;
297 compatible = "qcom,ath10k";
298 qcom,ath10k-calibration-variant = "ASRock-G10";
299 };
300 };
301 };
302
303 &pcie1 {
304 status = "okay";
305
306 bridge@0,0 {
307 reg = <0x00000000 0 0 0 0>;
308 #address-cells = <3>;
309 #size-cells = <2>;
310 ranges;
311
312 wifi2g: wifi@1,0 {
313 reg = <0x00010000 0 0 0 0>;
314 compatible = "qcom,ath10k";
315 qcom,ath10k-calibration-variant = "ASRock-G10";
316 };
317 };
318 };
319
320 &qcom_pinmux {
321 led_pins: led_pins {
322 mux {
323 pins = "gpio7", "gpio8", "gpio9", "gpio26";
324 function = "gpio";
325 drive-strength = <2>;
326 bias-pull-up;
327 };
328 };
329
330 button_pins: button_pins {
331 mux {
332 pins = "gpio15", "gpio16", "gpio64", "gpio65";
333 function = "gpio";
334 drive-strength = <2>;
335 bias-pull-up;
336 };
337 };
338
339 uart0_pins: uart0_pins {
340 mux {
341 pins = "gpio10", "gpio11";
342 function = "gsbi4";
343 drive-strength = <10>;
344 bias-disable;
345 };
346 };
347 };
348
349 &rpm {
350 pinctrl-0 = <&i2c4_pins>;
351 pinctrl-names = "default";
352 };
353
354 &hs_phy_0 {
355 status = "okay";
356 };
357
358 &ss_phy_0 {
359 status = "okay";
360 };
361
362 &usb3_0 {
363 status = "okay";
364 };
365
366 &hs_phy_1 {
367 status = "okay";
368 };
369
370 &ss_phy_1 {
371 status = "okay";
372 };
373
374 &usb3_1 {
375 status = "okay";
376 };
377
378 &tcsr {
379 qcom,usb-ctrl-select = <TCSR_USB_SELECT_USB3_DUAL>;
380 };
381
382 /delete-node/ &pcie2_pins;
383 /delete-node/ &pcie2;