target/linux/ipq40xx/patches-6.1/003-v6.6-net-phy-Introduce-PSGMII-PHY-interface-mode.patch

   1 From 9a0e95e34e9c0a713ddfd48c3a88a20d2bdfd514 Mon Sep 17 00:00:00 2001
   2 From: Gabor Juhos <j4g8y7@gmail.com>
   3 Date: Fri, 11 Aug 2023 13:10:07 +0200
   4 Subject: [PATCH] net: phy: Introduce PSGMII PHY interface mode
   5
   6 The PSGMII interface is similar to QSGMII. The main difference
   7 is that the PSGMII interface combines five SGMII lines into a
   8 single link while in QSGMII only four lines are combined.
   9
  10 Similarly to the QSGMII, this interface mode might also needs
  11 special handling within the MAC driver.
  12
  13 It is commonly used by Qualcomm with their QCA807x PHY series and
  14 modern WiSoC-s.
  15
  16 Add definitions for the PHY layer to allow to express this type
  17 of connection between the MAC and PHY.
  18
  19 Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
  20 Signed-off-by: Robert Marko <robert.marko@sartura.hr>
  21 Signed-off-by: David S. Miller <davem@davemloft.net>
  22 ---
  23  Documentation/networking/phy.rst | 4 ++++
  24  drivers/net/phy/phy-core.c       | 2 ++
  25  drivers/net/phy/phylink.c        | 3 +++
  26  include/linux/phy.h              | 4 ++++
  27  4 files changed, 13 insertions(+)
  28
  29 --- a/Documentation/networking/phy.rst
  30 +++ b/Documentation/networking/phy.rst
  31 @@ -323,6 +323,10 @@ Some of the interface modes are describe
  32      contrast with the 1000BASE-X phy mode used for Clause 38 and 39 PMDs, this
  33      interface mode has different autonegotiation and only supports full duplex.
  34
  35 +``PHY_INTERFACE_MODE_PSGMII``
  36 +    This is the Penta SGMII mode, it is similar to QSGMII but it combines 5
  37 +    SGMII lines into a single link compared to 4 on QSGMII.
  38 +
  39  Pause frames / flow control
  40  ===========================
  41
  42 --- a/drivers/net/phy/phy-core.c
  43 +++ b/drivers/net/phy/phy-core.c
  44 @@ -140,6 +140,8 @@ int phy_interface_num_ports(phy_interfac
  45         case PHY_INTERFACE_MODE_QSGMII:
  46         case PHY_INTERFACE_MODE_QUSGMII:
  47                 return 4;
  48 +       case PHY_INTERFACE_MODE_PSGMII:
  49 +               return 5;
  50         case PHY_INTERFACE_MODE_MAX:
  51                 WARN_ONCE(1, "PHY_INTERFACE_MODE_MAX isn't a valid interface mode");
  52                 return 0;
  53 --- a/drivers/net/phy/phylink.c
  54 +++ b/drivers/net/phy/phylink.c
  55 @@ -187,6 +187,7 @@ static int phylink_interface_max_speed(p
  56         case PHY_INTERFACE_MODE_RGMII_RXID:
  57         case PHY_INTERFACE_MODE_RGMII_ID:
  58         case PHY_INTERFACE_MODE_RGMII:
  59 +       case PHY_INTERFACE_MODE_PSGMII:
  60         case PHY_INTERFACE_MODE_QSGMII:
  61         case PHY_INTERFACE_MODE_QUSGMII:
  62         case PHY_INTERFACE_MODE_SGMII:
  63 @@ -448,6 +449,7 @@ unsigned long phylink_get_capabilities(p
  64         case PHY_INTERFACE_MODE_RGMII_RXID:
  65         case PHY_INTERFACE_MODE_RGMII_ID:
  66         case PHY_INTERFACE_MODE_RGMII:
  67 +       case PHY_INTERFACE_MODE_PSGMII:
  68         case PHY_INTERFACE_MODE_QSGMII:
  69         case PHY_INTERFACE_MODE_QUSGMII:
  70         case PHY_INTERFACE_MODE_SGMII:
  71 @@ -814,6 +816,7 @@ static int phylink_parse_mode(struct phy
  72
  73                 switch (pl->link_config.interface) {
  74                 case PHY_INTERFACE_MODE_SGMII:
  75 +               case PHY_INTERFACE_MODE_PSGMII:
  76                 case PHY_INTERFACE_MODE_QSGMII:
  77                 case PHY_INTERFACE_MODE_QUSGMII:
  78                 case PHY_INTERFACE_MODE_RGMII:
  79 --- a/include/linux/phy.h
  80 +++ b/include/linux/phy.h
  81 @@ -104,6 +104,7 @@ extern const int phy_10gbit_features_arr
  82   * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface
  83   * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface
  84   * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax
  85 + * @PHY_INTERFACE_MODE_PSGMII: Penta SGMII
  86   * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII
  87   * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII
  88   * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX
  89 @@ -141,6 +142,7 @@ typedef enum {
  90         PHY_INTERFACE_MODE_XGMII,
  91         PHY_INTERFACE_MODE_XLGMII,
  92         PHY_INTERFACE_MODE_MOCA,
  93 +       PHY_INTERFACE_MODE_PSGMII,
  94         PHY_INTERFACE_MODE_QSGMII,
  95         PHY_INTERFACE_MODE_TRGMII,
  96         PHY_INTERFACE_MODE_100BASEX,
  97 @@ -248,6 +250,8 @@ static inline const char *phy_modes(phy_
  98                 return "xlgmii";
  99         case PHY_INTERFACE_MODE_MOCA:
 100                 return "moca";
 101 +       case PHY_INTERFACE_MODE_PSGMII:
 102 +               return "psgmii";
 103         case PHY_INTERFACE_MODE_QSGMII:
 104                 return "qsgmii";
 105         case PHY_INTERFACE_MODE_TRGMII: