ipq40xx: migrate Linksys WHW01 to DSA and re-enable
[openwrt/staging/stintel.git] / target / linux / ipq40xx / files / arch / arm / boot / dts / qcom-ipq4018-whw01.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "qcom-ipq4019.dtsi"
4 #include <dt-bindings/leds/common.h>
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 model = "Linksys WHW01";
10 compatible = "linksys,whw01";
11
12 aliases {
13 serial0 = &blsp1_uart1;
14 led-boot = &led_system_blue;
15 led-running = &led_system_blue;
16 };
17
18 chosen {
19 stdout-path = "serial0:115200n8";
20 bootargs-append = " root=/dev/ubiblock0_0";
21 };
22
23 soc {
24 keys {
25 compatible = "gpio-keys";
26
27 reset {
28 label = "reset";
29 gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
30 linux,code = <KEY_RESTART>;
31 };
32 };
33
34 ess_tcsr@1953000 {
35 status = "okay";
36 };
37 };
38 };
39
40 &blsp_dma {
41 status = "okay";
42 };
43
44 &blsp1_i2c3 {
45 status = "okay";
46 pinctrl-0 = <&i2c_0_pins>;
47 pinctrl-1 = <&i2c_0_pins>;
48 pinctrl-names = "i2c_active", "i2c_sleep";
49
50 leds@62 {
51 compatible = "nxp,pca9633";
52 #address-cells = <1>;
53 #size-cells = <0>;
54 reg = <0x62>;
55
56 /* RGB? */
57 led@0 {
58 reg = <0>;
59 color = <LED_COLOR_ID_RED>;
60 function = LED_FUNCTION_POWER;
61 };
62
63 led@1 {
64 reg = <1>;
65 color = <LED_COLOR_ID_GREEN>;
66 function = LED_FUNCTION_POWER;
67 };
68
69 led_system_blue: led@2 {
70 reg = <2>;
71 color = <LED_COLOR_ID_BLUE>;
72 function = LED_FUNCTION_POWER;
73 linux,default-trigger = "default-on";
74 };
75 };
76 };
77
78 &blsp1_spi1 {
79 status = "okay";
80 pinctrl-0 = <&spi_0_pins>;
81 pinctrl-names = "default";
82 cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 4 GPIO_ACTIVE_HIGH>;
83
84 nor@0 {
85 reg = <0>;
86 compatible = "jedec,spi-nor";
87 spi-max-frequency = <24000000>;
88
89 partitions {
90 compatible = "fixed-partitions";
91 #address-cells = <1>;
92 #size-cells = <1>;
93
94 partition@0 {
95 label = "0:SBL1";
96 reg = <0x0 0x40000>;
97 read-only;
98 };
99
100 partition@40000 {
101 label = "0:MIBIB";
102 reg = <0x40000 0x20000>;
103 read-only;
104 };
105
106 partition@60000 {
107 label = "0:QSEE";
108 reg = <0x60000 0x60000>;
109 read-only;
110 };
111
112 partition@c0000 {
113 label = "0:CDT";
114 reg = <0xc0000 0x10000>;
115 read-only;
116 };
117
118 partition@d0000 {
119 label = "APPSBL";
120 reg = <0xd0000 0xa0000>;
121 read-only;
122 };
123
124 partition@170000 {
125 label = "0:ART";
126 reg = <0x170000 0x10000>;
127 read-only;
128
129 compatible = "nvmem-cells";
130 #address-cells = <1>;
131 #size-cells = <1>;
132
133 precal_art_1000: precal@1000 {
134 reg = <0x1000 0x2f20>;
135 };
136
137 precal_art_5000: precal@5000 {
138 reg = <0x5000 0x2f20>;
139 };
140 };
141
142 partition@180000 {
143 label = "u_env";
144 reg = <0x180000 0x40000>;
145 };
146
147 partition@1c0000 {
148 label = "s_env";
149 reg = <0x1c0000 0x20000>;
150 };
151
152 partition@1e0000 {
153 label = "devinfo";
154 reg = <0x1e0000 0x20000>;
155 read-only;
156 };
157 };
158 };
159
160 nand@1 {
161 reg = <1>;
162 compatible = "spi-nand";
163 spi-max-frequency = <24000000>;
164
165 partitions {
166 compatible = "fixed-partitions";
167 #address-cells = <1>;
168 #size-cells = <1>;
169
170 partition@0 {
171 label = "kernel";
172 reg = <0x0000000 0x5000000>;
173 };
174
175 partition@600000 {
176 label = "rootfs";
177 reg = <0x0600000 0x4a00000>;
178 };
179
180 partition@5000000 {
181 label = "alt_kernel";
182 reg = <0x5000000 0x5000000>;
183 };
184
185 partition@5600000 {
186 label = "alt_rootfs";
187 reg = <0x5600000 0x4a00000>;
188 };
189
190 partition@a000000 {
191 label = "sysdiag";
192 reg = <0xa000000 0x0200000>;
193 read-only;
194 };
195
196 partition@a200000 {
197 label = "syscfg";
198 reg = <0xa200000 0x5e00000>;
199 read-only;
200 };
201 };
202 };
203 };
204
205 &blsp1_uart1 {
206 pinctrl-0 = <&serial_pins>;
207 pinctrl-names = "default";
208 status = "okay";
209 };
210
211 &mdio {
212 status = "okay";
213 pinctrl-0 = <&mdio_pins>;
214 pinctrl-names = "default";
215 phy-reset-gpio = <&tlmm 62 GPIO_ACTIVE_HIGH>;
216 };
217
218 &tlmm {
219 mdio_pins: mdio_pinmux {
220 mux_mdio {
221 pins = "gpio53";
222 function = "mdio";
223 bias-pull-up;
224 };
225
226 mux_mdc {
227 pins = "gpio52";
228 function = "mdc";
229 bias-pull-up;
230 };
231 };
232
233 serial_pins: serial_pinmux {
234 mux {
235 pins = "gpio60", "gpio61";
236 function = "blsp_uart0";
237 bias-disable;
238 };
239 };
240
241 spi_0_pins: spi_0_pinmux {
242 pinmux {
243 function = "blsp_spi0";
244 pins = "gpio55", "gpio56", "gpio57";
245 };
246
247 pinmux_cs {
248 function = "gpio";
249 pins = "gpio54", "gpio4";
250 };
251
252 pinconf {
253 pins = "gpio55", "gpio56", "gpio57";
254 drive-strength = <12>;
255 bias-disable;
256 };
257
258 pinconf_cs {
259 pins = "gpio54", "gpio4";
260 drive-strength = <2>;
261 bias-disable;
262 output-high;
263 };
264 };
265
266 i2c_0_pins: i2c_0_pinmux {
267 mux {
268 function = "blsp_i2c0";
269 pins = "gpio58", "gpio59";
270 bias-disable;
271 };
272 };
273
274 reset_pinmux {
275 mux {
276 pins = "gpio63";
277 bias-pull-up;
278 };
279 };
280 };
281
282 &usb2 {
283 status = "okay";
284 };
285
286 &usb2_hs_phy {
287 status = "okay";
288 };
289
290 &usb3 {
291 status = "okay";
292 };
293
294 &usb3_hs_phy {
295 status = "okay";
296 };
297
298 &usb3_ss_phy {
299 status = "okay";
300 };
301
302 &watchdog {
303 status = "okay";
304 };
305
306 &wifi0 {
307 status = "okay";
308 qcom,ath10k-calibration-variant = "linksys-whw01-v1";
309 nvmem-cell-names = "pre-calibration";
310 nvmem-cells = <&precal_art_1000>;
311 };
312
313 &wifi1 {
314 status = "okay";
315 qcom,ath10k-calibration-variant = "linksys-whw01-v1";
316 nvmem-cell-names = "pre-calibration";
317 nvmem-cells = <&precal_art_5000>;
318 };
319
320 &gmac {
321 status = "okay";
322 };
323
324 &switch {
325 status = "okay";
326 };
327
328 &swport4 {
329 status = "okay";
330 label = "eth1";
331 };
332
333 &swport5 {
334 status = "okay";
335 label = "eth2";
336 };