target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4019-whw03v2.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "qcom-ipq4019.dtsi"
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/input/input.h>
   6 #include <dt-bindings/soc/qcom,tcsr.h>
   7 #include <dt-bindings/leds/common.h>
   8
   9 / {
  10         model = "Linksys WHW03 V2 (Velop)";
  11         compatible = "linksys,whw03v2", "qcom,ipq4019";
  12
  13         aliases {
  14                 led-boot = &led_blue;
  15                 led-failsafe = &led_red;
  16                 led-running = &led_green;
  17                 led-upgrade = &led_red;
  18         };
  19
  20         // The arguments rootfstype and ro are needed
  21         // to override the default bootargs
  22         chosen {
  23                 bootargs-append = " root=/dev/ubiblock0_0 rootfstype=squashfs ro";
  24                 stdout-path = &blsp1_uart1;
  25         };
  26
  27         soc {
  28                 ess-tcsr@1953000 {
  29                         compatible = "qcom,tcsr";
  30                         reg = <0x1953000 0x1000>;
  31                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  32                 };
  33
  34
  35                 tcsr@1949000 {
  36                         compatible = "qcom,tcsr";
  37                         reg = <0x1949000 0x100>;
  38                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  39                 };
  40
  41                 tcsr@194b000 {
  42                         compatible = "qcom,tcsr";
  43                         reg = <0x194b000 0x100>;
  44                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  45                 };
  46
  47                 tcsr@1957000 {
  48                         compatible = "qcom,tcsr";
  49                         reg = <0x1957000 0x100>;
  50                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  51                 };
  52         };
  53
  54
  55         keys {
  56                 compatible = "gpio-keys";
  57
  58                 reset {
  59                         label = "reset";
  60                         gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
  61                         linux,code = <KEY_RESTART>;
  62                 };
  63         };
  64 };
  65
  66
  67 &tlmm {
  68         mdio_pins: mdio-pinmux {
  69                 mux-1 {
  70                         pins = "gpio6";
  71                         function = "mdio";
  72                         bias-pull-up;
  73                 };
  74
  75                 mux-2 {
  76                         pins = "gpio7";
  77                         function = "mdc";
  78                         bias-pull-up;
  79                 };
  80         };
  81
  82         i2c_0_pins: i2c-0-pinmux {
  83                 mux {
  84                         function = "blsp_i2c0";
  85                         pins = "gpio20", "gpio21";
  86                         bias-disable;
  87                 };
  88         };
  89
  90         serial_0_pins: serial0-pinmux {
  91                 mux {
  92                         pins = "gpio16", "gpio17";
  93                         function = "blsp_uart0";
  94                         bias-disable;
  95                 };
  96         };
  97
  98         serial_1_pins: serial1-pinmux {
  99                 mux {
 100                         pins = "gpio8", "gpio9", "gpio10", "gpio11";
 101                         function = "blsp_uart1";
 102                         bias-disable;
 103                 };
 104         };
 105
 106         spi_0_pins: spi-0-pinmux {
 107                 mux {
 108                         function = "blsp_spi0";
 109                         pins = "gpio13", "gpio14", "gpio15";
 110                         drive-strength = <12>;
 111                         bias-disable;
 112                 };
 113
 114                 mux-cs {
 115                         pins = "gpio12";
 116                         drive-strength = <2>;
 117                         bias-disable;
 118                         output-high;
 119                 };
 120         };
 121
 122         spi_1_pins: spi-1-pinmux {
 123                 mux-1 {
 124                         function = "blsp_spi1";
 125                         pins = "gpio44", "gpio46","gpio47";
 126                         bias-disable;
 127                 };
 128
 129                 mux-2 {
 130                         pins = "gpio31", "gpio45", "gpio49";
 131                         function = "gpio";
 132                         bias-pull-up;
 133                         output-high;
 134                 };
 135
 136                 host-interrupt {
 137                         pins = "gpio42";
 138                         function = "gpio";
 139                         input;
 140                 };
 141         };
 142
 143         wifi_0_pins: wifi0-pinmux {
 144                 btcoexist {
 145                         bias-pull-up;
 146                         drive-strength = <6>;
 147                         function = "gpio";
 148                         output-high;
 149                         pins = "gpio52";
 150                 };
 151         };
 152
 153         zigbee-0 {
 154                 gpio-hog;
 155                 gpios = <29 GPIO_ACTIVE_HIGH>;
 156                 bias-disable;
 157                 output-low;
 158         };
 159
 160         zigbee-1 {
 161                 gpio-hog;
 162                 gpios = <50 GPIO_ACTIVE_HIGH>;
 163                 bias-disable;
 164                 input;
 165         };
 166
 167         bluetooth-enable {
 168                 gpio-hog;
 169                 gpios = <32 GPIO_ACTIVE_HIGH>;
 170                 output-high;
 171         };
 172 };
 173
 174 &mdio {
 175         status = "okay";
 176         pinctrl-0 = <&mdio_pins>;
 177         pinctrl-names = "default";
 178         phy-reset-gpios = <&tlmm 19 GPIO_ACTIVE_LOW>;
 179 };
 180
 181 &ethphy0 {
 182         status = "disabled";
 183 };
 184
 185 &ethphy1 {
 186         status = "disabled";
 187 };
 188
 189 &ethphy2 {
 190         status = "disabled";
 191 };
 192
 193 &ethphy3 {
 194         reg = <0x1b>;
 195 };
 196
 197 &ethphy4 {
 198         reg = <0x1c>;
 199 };
 200
 201 &psgmiiphy {
 202         reg = <0x1d>;
 203 };
 204
 205 &watchdog {
 206         status = "okay";
 207 };
 208
 209 &prng {
 210         status = "okay";
 211 };
 212
 213 &blsp_dma {
 214         status = "okay";
 215 };
 216
 217 &cryptobam {
 218         num-channels = <4>;
 219         qcom,num-ees = <2>;
 220
 221         status = "okay";
 222 };
 223
 224 &crypto {
 225         status = "okay";
 226 };
 227
 228 &blsp1_uart1 {
 229         status = "okay";
 230         pinctrl-0 = <&serial_0_pins>;
 231         pinctrl-names = "default";
 232 };
 233
 234 &blsp1_uart2 {
 235         status = "okay";
 236         pinctrl-0 = <&serial_1_pins>;
 237         pinctrl-names = "default";
 238
 239         bluetooth {
 240                 compatible = "csr,8811";
 241
 242                 enable-gpios = <&tlmm 32 GPIO_ACTIVE_HIGH>;
 243         };
 244 };
 245
 246 &blsp1_spi2 {
 247         pinctrl-0 = <&spi_1_pins>;
 248         pinctrl-names = "default";
 249         status = "okay";
 250
 251         cs-gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>;
 252
 253         zigbee@0 {
 254                 #address-cells = <1>;
 255                 #size-cells = <0>;
 256
 257                 compatible = "silabs,em3581";
 258                 reg = <0>;
 259                 spi-max-frequency = <12000000>;
 260         };
 261 };
 262
 263 &blsp1_i2c3 {
 264         pinctrl-0 = <&i2c_0_pins>;
 265         pinctrl-names = "default";
 266
 267         status = "okay";
 268
 269         // RGB LEDs
 270         pca9633: led-controller@62 {
 271                 compatible = "nxp,pca9633";
 272                 nxp,hw-blink;
 273                 reg = <0x62>;
 274                 #address-cells = <1>;
 275                 #size-cells = <0>;
 276
 277                 led_red: red@0 {
 278                         color = <LED_COLOR_ID_RED>;
 279                         function = LED_FUNCTION_INDICATOR;
 280                         reg = <0>;
 281                 };
 282
 283                 led_green: green@1 {
 284                         color = <LED_COLOR_ID_GREEN>;
 285                         function = LED_FUNCTION_INDICATOR;
 286                         reg = <1>;
 287                 };
 288
 289                 led_blue: blue@2 {
 290                         color = <LED_COLOR_ID_BLUE>;
 291                         function = LED_FUNCTION_INDICATOR;
 292                         reg = <2>;
 293                 };
 294         };
 295 };
 296
 297 &usb3_ss_phy {
 298         status = "okay";
 299 };
 300
 301 &usb3_hs_phy {
 302         status = "okay";
 303 };
 304
 305 &usb2_hs_phy {
 306         status = "okay";
 307 };
 308
 309 &nand {
 310         status = "okay";
 311
 312         nand@0 {
 313                 partitions {
 314                         compatible = "fixed-partitions";
 315                         #address-cells = <1>;
 316                         #size-cells = <1>;
 317
 318                         partition@0 {
 319                                 label = "SBL1";
 320                                 reg = <0x0 0x100000>;
 321                                 read-only;
 322                         };
 323
 324                         partition@100000 {
 325                                 label = "MIBIB";
 326                                 reg = <0x100000 0x100000>;
 327                                 read-only;
 328                         };
 329
 330                         partition@200000 {
 331                                 label = "QSEE";
 332                                 reg = <0x200000 0x100000>;
 333                                 read-only;
 334                         };
 335
 336                         partition@300000 {
 337                                 label = "CDT";
 338                                 reg = <0x300000 0x80000>;
 339                                 read-only;
 340                         };
 341
 342                         partition@380000 {
 343                                 label = "APPSBL";
 344                                 reg = <0x380000 0x200000>;
 345                                 read-only;
 346                         };
 347
 348                         partition@580000 {
 349                                 label = "ART";
 350                                 reg = <0x580000 0x80000>;
 351                                 read-only;
 352
 353                                 nvmem-layout {
 354                                         compatible = "fixed-layout";
 355                                         #address-cells = <1>;
 356                                         #size-cells = <1>;
 357
 358                                         macaddr_gmac0: macaddr@0 {
 359                                                 compatible = "mac-base";
 360                                                 reg = <0x0 0x6>;
 361                                                 #nvmem-cell-cells = <1>;
 362                                         };
 363
 364                                         macaddr_gmac1: macaddr@6 {
 365                                                 reg = <0x6 0x6>;
 366                                         };
 367
 368                                         precal_art_1000: precal@1000 {
 369                                                 reg = <0x1000 0x2f20>;
 370                                         };
 371
 372                                         precal_art_5000: precal@5000 {
 373                                                 reg = <0x5000 0x2f20>;
 374                                         };
 375
 376                                         precal_art_9000: precal@9000 {
 377                                                 reg = <0x9000 0x2f20>;
 378                                         };
 379                                 };
 380                         };
 381
 382                         partition@600000 {
 383                                 label = "u_env";
 384                                 reg = <0x600000 0x80000>;
 385                         };
 386
 387                         partition@680000 {
 388                                 label = "s_env";
 389                                 reg = <0x680000 0x40000>;
 390                         };
 391
 392                         partition@6c0000 {
 393                                 label = "devinfo";
 394                                 reg = <0x6c0000 0x40000>;
 395                                 read-only;
 396                         };
 397
 398                         partition@700000 {
 399                                 label = "kernel";
 400                                 reg = <0x700000 0xa100000>;
 401                         };
 402
 403                         partition@d00000 {
 404                                 label = "rootfs";
 405                                 reg = <0xd00000 0x9b00000>;
 406                         };
 407
 408                         partition@a800000 {
 409                                 label = "alt_kernel";
 410                                 reg = <0xa800000 0xa100000>;
 411                         };
 412
 413                         partition@ae00000 {
 414                                 label = "alt_rootfs";
 415                                 reg = <0xae00000 0x9b00000>;
 416                         };
 417
 418                         partition@14900000 {
 419                                 label = "sysdiag";
 420                                 reg = <0x14900000 0x200000>;
 421                                 read-only;
 422                         };
 423
 424                         partition@14b00000 {
 425                                 label = "syscfg";
 426                                 reg = <0x14b00000 0xb500000>;
 427                                 read-only;
 428                         };
 429                 };
 430         };
 431 };
 432
 433 &pcie0 {
 434         status = "okay";
 435
 436         perst-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
 437         wake-gpios = <&tlmm 40 GPIO_ACTIVE_LOW>;
 438         clkreq-gpios = <&tlmm 39 GPIO_ACTIVE_LOW>;
 439
 440         bridge@0,0 {
 441                 reg = <0x00000000 0 0 0 0>;
 442                 #address-cells = <3>;
 443                 #size-cells = <2>;
 444                 ranges;
 445
 446                 wifi2: wifi@1,0 {
 447                         compatible = "qcom,ath10k";
 448                         reg = <0x00010000 0 0 0 0>;
 449                 };
 450         };
 451 };
 452
 453 &qpic_bam {
 454         status = "okay";
 455 };
 456
 457 &gmac {
 458         status = "okay";
 459 };
 460
 461 &switch {
 462         status = "okay";
 463 };
 464
 465 &swport4 {
 466         status = "okay";
 467         label = "lan";
 468
 469         nvmem-cell-names = "mac-address";
 470         nvmem-cells = <&macaddr_gmac1>;
 471 };
 472
 473 &swport5 {
 474         status = "okay";
 475         label = "wan";
 476
 477         nvmem-cell-names = "mac-address";
 478         nvmem-cells = <&macaddr_gmac0 0>;
 479 };
 480
 481 &wifi0 {
 482         pinctrl-0 = <&wifi_0_pins>;
 483         pinctrl-names = "default";
 484
 485         status = "okay";
 486
 487         qcom,coexist-support = <1>;
 488         qcom,coexist-gpio-pin = <0x34>;
 489
 490         ieee80211-freq-limit = <2401000 2473000>;
 491         qcom,ath10k-calibration-variant = "linksys-whw03v2";
 492
 493         nvmem-cell-names = "pre-calibration", "mac-address";
 494         nvmem-cells = <&precal_art_1000>, <&macaddr_gmac0 1>;
 495 };
 496
 497 &wifi1 {
 498         status = "okay";
 499
 500         ieee80211-freq-limit = <5170000 5250000>;
 501         qcom,ath10k-calibration-variant = "linksys-whw03v2";
 502
 503         nvmem-cell-names = "pre-calibration", "mac-address";
 504         nvmem-cells = <&precal_art_5000>, <&macaddr_gmac0 2>;
 505 };
 506
 507 &wifi2 {
 508         status = "okay";
 509
 510         ieee80211-freq-limit = <5735000 5835000>;
 511         qcom,ath10k-calibration-variant = "linksys-whw03v2";
 512
 513         nvmem-cell-names = "pre-calibration", "mac-address";
 514         nvmem-cells = <&precal_art_9000>, <&macaddr_gmac0 3>;
 515 };