base-files: reduce IPv6 ULA prefix generation to a single call
[openwrt/staging/stintel.git] / target / linux / ipq40xx / files-6.1 / arch / arm / boot / dts / qcom-ipq4019-oap100.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "qcom-ipq4019.dtsi"
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/soc/qcom,tcsr.h>
7
8 / {
9 model = "EdgeCore OAP-100";
10 compatible = "edgecore,oap100";
11
12 aliases {
13 led-boot = &led_system;
14 led-failsafe = &led_system;
15 led-running = &led_system;
16 led-upgrade = &led_system;
17 };
18
19 chosen {
20 bootargs-append = " root=/dev/ubiblock0_1";
21 };
22
23 soc {
24 mdio@90000 {
25 status = "okay";
26 pinctrl-0 = <&mdio_pins>;
27 pinctrl-names = "default";
28 };
29
30 tcsr@1949000 {
31 compatible = "qcom,tcsr";
32 reg = <0x1949000 0x100>;
33 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
34 };
35
36 ess_tcsr@1953000 {
37 compatible = "qcom,tcsr";
38 reg = <0x1953000 0x1000>;
39 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
40 };
41
42 tcsr@1957000 {
43 compatible = "qcom,tcsr";
44 reg = <0x1957000 0x100>;
45 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
46 };
47
48 tcsr@194b000 {
49 /* select hostmode */
50 compatible = "qcom,tcsr";
51 reg = <0x194b000 0x100>;
52 qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
53 status = "okay";
54 };
55
56 usb2@60f8800 {
57 status = "okay";
58
59 dwc3@6000000 {
60 #address-cells = <1>;
61 #size-cells = <0>;
62
63 usb2_port1: port@1 {
64 reg = <1>;
65 #trigger-source-cells = <0>;
66 };
67 };
68 };
69
70 usb3@8af8800 {
71 status = "okay";
72
73 dwc3@8a00000 {
74 #address-cells = <1>;
75 #size-cells = <0>;
76
77 usb3_port1: port@1 {
78 reg = <1>;
79 #trigger-source-cells = <0>;
80 };
81
82 usb3_port2: port@2 {
83 reg = <2>;
84 #trigger-source-cells = <0>;
85 };
86 };
87 };
88
89 crypto@8e3a000 {
90 status = "okay";
91 };
92
93 watchdog@b017000 {
94 status = "okay";
95 };
96 };
97
98 key {
99 compatible = "gpio-keys";
100
101 button@1 {
102 label = "reset";
103 linux,code = <KEY_RESTART>;
104 gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
105 linux,input-type = <1>;
106 };
107 };
108
109 leds {
110 compatible = "gpio-leds";
111
112 led_system: led_system {
113 label = "green:system";
114 gpios = <&tlmm 22 GPIO_ACTIVE_HIGH>;
115 };
116
117 led_2g {
118 label = "blue:wlan2g";
119 gpios = <&tlmm 34 GPIO_ACTIVE_HIGH>;
120 };
121
122 led_5g {
123 label = "blue:wlan5g";
124 gpios = <&tlmm 35 GPIO_ACTIVE_HIGH>;
125 };
126 };
127
128 gpio_export {
129 compatible = "gpio-export";
130 #size-cells = <0>;
131
132 usb {
133 gpio-export,name = "usb-power";
134 gpio-export,output = <1>;
135 gpios = <&tlmm 44 GPIO_ACTIVE_HIGH>;
136 };
137
138 poe {
139 gpio-export,name = "poe-power";
140 gpio-export,output = <0>;
141 gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>;
142 };
143 };
144 };
145
146 &tlmm {
147 serial_0_pins: serial_pinmux {
148 mux {
149 pins = "gpio16", "gpio17";
150 function = "blsp_uart0";
151 bias-disable;
152 };
153 };
154
155 spi_0_pins: spi_0_pinmux {
156 pinmux {
157 function = "blsp_spi0";
158 pins = "gpio13", "gpio14", "gpio15";
159 drive-strength = <12>;
160 bias-disable;
161 };
162
163 pinmux_cs {
164 function = "gpio";
165 pins = "gpio12";
166 drive-strength = <2>;
167 bias-disable;
168 output-high;
169 };
170 };
171
172 nand_pins: nand_pins {
173 pullups {
174 pins = "gpio53", "gpio58", "gpio59";
175 function = "qpic";
176 bias-pull-up;
177 };
178
179 pulldowns {
180 pins = "gpio54", "gpio55", "gpio56",
181 "gpio57", "gpio60", "gpio61",
182 "gpio62", "gpio63", "gpio64",
183 "gpio65", "gpio66", "gpio67",
184 "gpio68", "gpio69";
185 function = "qpic";
186 bias-pull-down;
187 };
188 };
189
190 mdio_pins: mdio_pinmux {
191 mux_1 {
192 pins = "gpio6";
193 function = "mdio";
194 bias-pull-up;
195 };
196 mux_2 {
197 pins = "gpio7";
198 function = "mdc";
199 bias-pull-up;
200 };
201 };
202 };
203
204 &cryptobam {
205 status = "okay";
206 };
207
208 &blsp1_spi1 {
209 pinctrl-0 = <&spi_0_pins>;
210 pinctrl-names = "default";
211 status = "okay";
212 cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
213
214 flash@0 {
215 #address-cells = <1>;
216 #size-cells = <1>;
217 compatible = "jedec,spi-nor";
218 reg = <0>;
219 linux,modalias = "m25p80", "gd25q256";
220 spi-max-frequency = <24000000>;
221
222 partitions {
223 compatible = "fixed-partitions";
224 #address-cells = <1>;
225 #size-cells = <1>;
226
227 partition0@0 {
228 label = "0:SBL1";
229 reg = <0x00000000 0x00040000>;
230 read-only;
231 };
232 partition1@40000 {
233 label = "0:MIBIB";
234 reg = <0x00040000 0x00020000>;
235 read-only;
236 };
237 partition2@60000 {
238 label = "0:QSEE";
239 reg = <0x00060000 0x00060000>;
240 read-only;
241 };
242 partition3@c0000 {
243 label = "0:CDT";
244 reg = <0x000c0000 0x00010000>;
245 read-only;
246 };
247 partition4@d0000 {
248 label = "0:DDRPARAMS";
249 reg = <0x000d0000 0x00010000>;
250 read-only;
251 };
252 partition5@e0000 {
253 label = "0:APPSBLENV";
254 reg = <0x000e0000 0x00010000>;
255 read-only;
256 };
257 partition6@f0000 {
258 label = "0:APPSBL";
259 reg = <0x000f0000 0x00080000>;
260 read-only;
261 };
262 partition7@170000 {
263 label = "0:ART";
264 reg = <0x00170000 0x00010000>;
265 read-only;
266
267 nvmem-layout {
268 compatible = "fixed-layout";
269 #address-cells = <1>;
270 #size-cells = <1>;
271
272 precal_art_1000: precal@1000 {
273 reg = <0x1000 0x2f20>;
274 };
275
276 precal_art_5000: precal@5000 {
277 reg = <0x5000 0x2f20>;
278 };
279 };
280 };
281 };
282 };
283 };
284
285 &nand {
286 pinctrl-0 = <&nand_pins>;
287 pinctrl-names = "default";
288 status = "okay";
289
290 nand@0 {
291 partitions {
292 compatible = "fixed-partitions";
293 #address-cells = <1>;
294 #size-cells = <1>;
295
296 partition@0 {
297 label = "rootfs";
298 reg = <0x00000000 0x4000000>;
299 };
300 };
301 };
302 };
303
304 &blsp_dma {
305 status = "okay";
306 };
307
308 &blsp1_uart1 {
309 pinctrl-0 = <&serial_0_pins>;
310 pinctrl-names = "default";
311 status = "okay";
312 };
313
314 &qpic_bam {
315 status = "okay";
316 };
317
318 &wifi0 {
319 status = "okay";
320 nvmem-cell-names = "pre-calibration";
321 nvmem-cells = <&precal_art_1000>;
322 qcom,ath10k-calibration-variant = "Edgecore OAP100";
323 };
324
325 &wifi1 {
326 status = "okay";
327 nvmem-cell-names = "pre-calibration";
328 nvmem-cells = <&precal_art_5000>;
329 qcom,ath10k-calibration-variant = "Edgecore OAP100";
330 };
331
332 &usb3_ss_phy {
333 status = "okay";
334 };
335
336 &usb3_hs_phy {
337 status = "okay";
338 };
339
340 &usb2_hs_phy {
341 status = "okay";
342 };