target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4019-cm520-79f.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "qcom-ipq4019.dtsi"
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/input/input.h>
   6 #include <dt-bindings/leds/common.h>
   7 #include <dt-bindings/soc/qcom,tcsr.h>
   8
   9 / {
  10         model = "MobiPromo CM520-79F";
  11         compatible = "mobipromo,cm520-79f";
  12
  13         aliases {
  14                 led-boot = &led_sys;
  15                 led-failsafe = &led_sys;
  16                 led-running = &led_sys;
  17                 led-upgrade = &led_sys;
  18         };
  19
  20         soc {
  21                 rng@22000 {
  22                         status = "okay";
  23                 };
  24
  25                 mdio@90000 {
  26                         status = "okay";
  27                         pinctrl-0 = <&mdio_pins>;
  28                         pinctrl-names = "default";
  29                         reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
  30                         reset-delay-us = <1000>;
  31                 };
  32
  33                 tcsr@1949000 {
  34                         compatible = "qcom,tcsr";
  35                         reg = <0x1949000 0x100>;
  36                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  37                 };
  38
  39                 tcsr@194b000 {
  40                         compatible = "qcom,tcsr";
  41                         reg = <0x194b000 0x100>;
  42                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  43                 };
  44
  45                 ess_tcsr@1953000 {
  46                         compatible = "qcom,tcsr";
  47                         reg = <0x1953000 0x1000>;
  48                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  49                 };
  50
  51                 tcsr@1957000 {
  52                         compatible = "qcom,tcsr";
  53                         reg = <0x1957000 0x100>;
  54                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  55                 };
  56
  57                 usb2@60f8800 {
  58                         status = "okay";
  59
  60                         dwc3@6000000 {
  61                                 #address-cells = <1>;
  62                                 #size-cells = <0>;
  63
  64                                 usb2_port1: port@1 {
  65                                         reg = <1>;
  66                                         #trigger-source-cells = <0>;
  67                                 };
  68                         };
  69                 };
  70
  71                 usb3@8af8800 {
  72                         status = "okay";
  73
  74                         dwc3@8a00000 {
  75                                 #address-cells = <1>;
  76                                 #size-cells = <0>;
  77
  78                                 usb3_port1: port@1 {
  79                                         reg = <1>;
  80                                         #trigger-source-cells = <0>;
  81                                 };
  82
  83                                 usb3_port2: port@2 {
  84                                         reg = <2>;
  85                                         #trigger-source-cells = <0>;
  86                                 };
  87                         };
  88                 };
  89
  90                 crypto@8e3a000 {
  91                         status = "okay";
  92                 };
  93
  94                 watchdog@b017000 {
  95                         status = "okay";
  96                 };
  97         };
  98
  99         led_spi {
 100                 compatible = "spi-gpio";
 101                 #address-cells = <1>;
 102                 #size-cells = <0>;
 103
 104                 sck-gpios = <&tlmm 40 GPIO_ACTIVE_HIGH>;
 105                 mosi-gpios = <&tlmm 36 GPIO_ACTIVE_HIGH>;
 106                 num-chipselects = <0>;
 107
 108                 led_gpio: led_gpio@0 {
 109                         compatible = "fairchild,74hc595";
 110                         reg = <0>;
 111                         gpio-controller;
 112                         #gpio-cells = <2>;
 113                         registers-number = <1>;
 114                         spi-max-frequency = <1000000>;
 115                 };
 116         };
 117
 118         leds {
 119                 compatible = "gpio-leds";
 120
 121                 usb {
 122                         function = LED_FUNCTION_USB;
 123                         color = <LED_COLOR_ID_BLUE>;
 124                         gpios = <&tlmm 10 GPIO_ACTIVE_HIGH>;
 125                         linux,default-trigger = "usbport";
 126                         trigger-sources = <&usb3_port1>, <&usb3_port2>, <&usb2_port1>;
 127                 };
 128
 129                 led_sys: can {
 130                         label = "blue:can";
 131                         gpios = <&tlmm 11 GPIO_ACTIVE_HIGH>;
 132                 };
 133
 134                 wan {
 135                         function = LED_FUNCTION_WAN;
 136                         color = <LED_COLOR_ID_BLUE>;
 137                         gpios = <&led_gpio 0 GPIO_ACTIVE_LOW>;
 138                 };
 139
 140                 lan1 {
 141                         label = "blue:lan1";
 142                         gpios = <&led_gpio 1 GPIO_ACTIVE_LOW>;
 143                 };
 144
 145                 lan2 {
 146                         label = "blue:lan2";
 147                         gpios = <&led_gpio 2 GPIO_ACTIVE_LOW>;
 148                 };
 149
 150                 wlan2g {
 151                         label = "blue:wlan2g";
 152                         gpios = <&led_gpio 5 GPIO_ACTIVE_LOW>;
 153                         linux,default-trigger = "phy0tpt";
 154                 };
 155
 156                 wlan5g {
 157                         label = "blue:wlan5g";
 158                         gpios = <&led_gpio 6 GPIO_ACTIVE_LOW>;
 159                         linux,default-trigger = "phy1tpt";
 160                 };
 161         };
 162
 163         keys {
 164                 compatible = "gpio-keys";
 165
 166                 reset {
 167                         label = "reset";
 168                         gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
 169                         linux,code = <KEY_RESTART>;
 170                 };
 171         };
 172 };
 173
 174 &blsp_dma {
 175         status = "okay";
 176 };
 177
 178 &blsp1_uart1 {
 179         status = "okay";
 180 };
 181
 182 &blsp1_uart2 {
 183         status = "okay";
 184 };
 185
 186 &cryptobam {
 187         status = "okay";
 188 };
 189
 190 &nand {
 191         pinctrl-0 = <&nand_pins>;
 192         pinctrl-names = "default";
 193         status = "okay";
 194
 195         nand@0 {
 196                 partitions {
 197                         compatible = "fixed-partitions";
 198                         #address-cells = <1>;
 199                         #size-cells = <1>;
 200
 201                         partition@0 {
 202                                 label = "SBL1";
 203                                 reg = <0x0 0x100000>;
 204                                 read-only;
 205                         };
 206
 207                         partition@100000 {
 208                                 label = "MIBIB";
 209                                 reg = <0x100000 0x100000>;
 210                                 read-only;
 211                         };
 212
 213                         partition@200000 {
 214                                 label = "BOOTCONFIG";
 215                                 reg = <0x200000 0x100000>;
 216                         };
 217
 218                         partition@300000 {
 219                                 label = "QSEE";
 220                                 reg = <0x300000 0x100000>;
 221                                 read-only;
 222                         };
 223
 224                         partition@400000 {
 225                                 label = "QSEE_1";
 226                                 reg = <0x400000 0x100000>;
 227                                 read-only;
 228                         };
 229
 230                         partition@500000 {
 231                                 label = "CDT";
 232                                 reg = <0x500000 0x80000>;
 233                                 read-only;
 234                         };
 235
 236                         partition@580000 {
 237                                 label = "CDT_1";
 238                                 reg = <0x580000 0x80000>;
 239                                 read-only;
 240                         };
 241
 242                         partition@600000 {
 243                                 label = "BOOTCONFIG1";
 244                                 reg = <0x600000 0x80000>;
 245                         };
 246
 247                         partition@680000 {
 248                                 label = "APPSBLENV";
 249                                 reg = <0x680000 0x80000>;
 250                         };
 251
 252                         partition@700000 {
 253                                 label = "APPSBL";
 254                                 reg = <0x700000 0x200000>;
 255                                 read-only;
 256                         };
 257
 258                         partition@900000 {
 259                                 label = "APPSBL_1";
 260                                 reg = <0x900000 0x200000>;
 261                                 read-only;
 262                         };
 263
 264                         art: partition@b00000 {
 265                                 label = "ART";
 266                                 reg = <0xb00000 0x80000>;
 267                                 read-only;
 268
 269                                 nvmem-layout {
 270                                         compatible = "fixed-layout";
 271                                         #address-cells = <1>;
 272                                         #size-cells = <1>;
 273
 274                                         precal_art_1000: precal@1000 {
 275                                                 reg = <0x1000 0x2f20>;
 276                                         };
 277
 278                                         macaddr_art_1006: macaddr@1006 {
 279                                                 reg = <0x1006 0x6>;
 280                                         };
 281
 282                                         precal_art_5000: precal@5000 {
 283                                                 reg = <0x5000 0x2f20>;
 284                                         };
 285
 286                                         macaddr_art_5006: macaddr@5006 {
 287                                                 reg = <0x5006 0x6>;
 288                                         };
 289                                 };
 290                         };
 291
 292                         partition@b80000 {
 293                                 label = "ubi";
 294                                 reg = <0xb80000 0x7480000>;
 295                         };
 296                 };
 297         };
 298 };
 299
 300 &qpic_bam {
 301         status = "okay";
 302 };
 303
 304 &tlmm {
 305         mdio_pins: mdio_pinmux {
 306                 mux_1 {
 307                         pins = "gpio6";
 308                         function = "mdio";
 309                         bias-pull-up;
 310                 };
 311
 312                 mux_2 {
 313                         pins = "gpio7";
 314                         function = "mdc";
 315                         bias-pull-up;
 316                 };
 317         };
 318
 319         nand_pins: nand_pins {
 320                 pullups {
 321                         pins =  "gpio52", "gpio53", "gpio58",
 322                                 "gpio59";
 323                         function = "qpic";
 324                         bias-pull-up;
 325                 };
 326
 327                 pulldowns {
 328                         pins =  "gpio54", "gpio55", "gpio56",
 329                                 "gpio57", "gpio60", "gpio61",
 330                                 "gpio62", "gpio63", "gpio64",
 331                                 "gpio65", "gpio66", "gpio67",
 332                                 "gpio68", "gpio69";
 333                         function = "qpic";
 334                         bias-pull-down;
 335                 };
 336         };
 337 };
 338
 339 &usb3_ss_phy {
 340         status = "okay";
 341 };
 342
 343 &usb3_hs_phy {
 344         status = "okay";
 345 };
 346
 347 &usb2_hs_phy {
 348         status = "okay";
 349 };
 350
 351 &gmac {
 352         status = "okay";
 353
 354         nvmem-cells = <&macaddr_art_1006>;
 355         nvmem-cell-names = "mac-address";
 356 };
 357
 358 &switch {
 359         status = "okay";
 360 };
 361
 362 &swport3 {
 363         status = "okay";
 364
 365         label = "lan2";
 366 };
 367
 368 &swport4 {
 369         status = "okay";
 370
 371         label = "lan1";
 372 };
 373
 374 &swport5 {
 375         status = "okay";
 376
 377         nvmem-cells = <&macaddr_art_5006>;
 378         nvmem-cell-names = "mac-address";
 379 };
 380
 381 &wifi0 {
 382         status = "okay";
 383         nvmem-cell-names = "pre-calibration";
 384         nvmem-cells = <&precal_art_1000>;
 385         qcom,ath10k-calibration-variant = "CM520-79F";
 386 };
 387
 388 &wifi1 {
 389         status = "okay";
 390         nvmem-cell-names = "pre-calibration";
 391         nvmem-cells = <&precal_art_5000>;
 392         qcom,ath10k-calibration-variant = "CM520-79F";
 393 };