base-files: reduce IPv6 ULA prefix generation to a single call
[openwrt/staging/stintel.git] / target / linux / ipq40xx / files-6.1 / arch / arm / boot / dts / qcom-ipq4018-wre6606.dts
1 /* Copyright (c) 2015, The Linux Foundation. All rights reserved.
2 * Copyright (c) 2018, David Bauer <mail@david-bauer.net>
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 *
16 */
17
18 #include "qcom-ipq4019.dtsi"
19 #include <dt-bindings/gpio/gpio.h>
20 #include <dt-bindings/input/input.h>
21 #include <dt-bindings/leds/common.h>
22 #include <dt-bindings/soc/qcom,tcsr.h>
23
24 / {
25 model = "ZyXEL WRE6606";
26 compatible = "zyxel,wre6606";
27
28 aliases {
29 led-boot = &power;
30 led-failsafe = &power;
31 led-running = &power;
32 led-upgrade = &power;
33 };
34
35 chosen {
36 bootargs-append = " mtdparts=";
37 };
38
39 soc {
40 rng@22000 {
41 status = "okay";
42 };
43
44 mdio@90000 {
45 status = "okay";
46 };
47
48 tcsr@1949000 {
49 compatible = "qcom,tcsr";
50 reg = <0x1949000 0x100>;
51 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
52 };
53
54 ess_tcsr@1953000 {
55 compatible = "qcom,tcsr";
56 reg = <0x1953000 0x1000>;
57 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
58 };
59
60 tcsr@1957000 {
61 compatible = "qcom,tcsr";
62 reg = <0x1957000 0x100>;
63 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
64 };
65
66 crypto@8e3a000 {
67 status = "okay";
68 };
69
70 watchdog@b017000 {
71 status = "okay";
72 };
73 };
74
75 leds {
76 compatible = "gpio-leds";
77
78 wps {
79 function = LED_FUNCTION_WPS;
80 color = <LED_COLOR_ID_GREEN>;
81 gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>;
82 };
83
84 wlan5g_green {
85 label = "green:wlan5g";
86 gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
87 };
88
89 power: power {
90 function = LED_FUNCTION_POWER;
91 color = <LED_COLOR_ID_GREEN>;
92 gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
93 };
94
95 wlan5g_red {
96 label = "red:wlan5g";
97 gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
98 };
99
100 wlan2g_red {
101 label = "red:wlan2g";
102 gpios = <&tlmm 58 GPIO_ACTIVE_HIGH>;
103 };
104
105 wlan2g_green {
106 label = "green:wlan2g";
107 gpios = <&tlmm 59 GPIO_ACTIVE_HIGH>;
108 };
109 };
110
111 keys {
112 compatible = "gpio-keys";
113
114 wps {
115 label = "wps";
116 gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
117 linux,code = <KEY_WPS_BUTTON>;
118 };
119 };
120 };
121
122 &tlmm {
123 serial_pins: serial_pinmux {
124 mux {
125 pins = "gpio60", "gpio61";
126 function = "blsp_uart0";
127 bias-disable;
128 };
129 };
130
131 spi_0_pins: spi_0_pinmux {
132 pin {
133 function = "blsp_spi0";
134 pins = "gpio55", "gpio56", "gpio57";
135 drive-strength = <12>;
136 bias-disable;
137 };
138 pin_cs {
139 function = "gpio";
140 pins = "gpio54";
141 drive-strength = <2>;
142 bias-disable;
143 output-high;
144 };
145 };
146 };
147
148 &blsp_dma {
149 status = "okay";
150 };
151
152 &blsp1_spi1 {
153 pinctrl-0 = <&spi_0_pins>;
154 pinctrl-names = "default";
155 status = "okay";
156 cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
157
158 mx25l12805d@0 {
159 compatible = "jedec,spi-nor";
160 reg = <0>;
161 spi-max-frequency = <24000000>;
162
163 partitions {
164 compatible = "fixed-partitions";
165 #address-cells = <1>;
166 #size-cells = <1>;
167
168 partition0@0 {
169 label = "SBL1";
170 reg = <0x00000000 0x00040000>;
171 read-only;
172 };
173
174 partition1@40000 {
175 label = "MIBIB";
176 reg = <0x00040000 0x00020000>;
177 read-only;
178 };
179
180 partition2@60000 {
181 label = "QSEE";
182 reg = <0x00060000 0x00060000>;
183 read-only;
184 };
185
186 partition3@c0000 {
187 label = "CDT";
188 reg = <0x000c0000 0x00010000>;
189 read-only;
190 };
191
192 partition4@d0000 {
193 label = "DDRPARAMS";
194 reg = <0x000d0000 0x00010000>;
195 read-only;
196 };
197
198 partition5@E0000 {
199 label = "APPSBLENV";
200 reg = <0x000e0000 0x00010000>;
201 read-only;
202 };
203
204 partition6@F0000 {
205 label = "APPSBL";
206 reg = <0x000f0000 0x00080000>;
207 read-only;
208 };
209
210 partition7@170000 {
211 label = "ART";
212 reg = <0x00170000 0x00010000>;
213 read-only;
214 };
215
216 partition8@180000 {
217 compatible = "denx,fit";
218 label = "firmware";
219 reg = <0x00180000 0x00ce0000>;
220 };
221
222 partition9@e60000 {
223 label = "manufacture";
224 reg = <0x00e60000 0x00050000>;
225 read-only;
226 };
227
228 partition10@eb0000 {
229 label = "storage";
230 reg = <0x00eb0000 0x00150000>;
231 read-only;
232 };
233 };
234 };
235 };
236
237 &blsp1_uart1 {
238 pinctrl-0 = <&serial_pins>;
239 pinctrl-names = "default";
240 status = "okay";
241 };
242
243 &cryptobam {
244 status = "okay";
245 };
246
247 &wifi0 {
248 status = "okay";
249 qcom,ath10k-calibration-variant = "ZyXEL-WRE6606";
250 };
251
252 &wifi1 {
253 status = "okay";
254 qcom,ath10k-calibration-variant = "ZyXEL-WRE6606";
255 };