target/linux/imx/patches-6.1/003-6.3-phy-freescale-imx8m-pcie-Add-i.MX8MP-PCIe-PHY-suppor.patch

   1 From bf03b9281b119bcdc167b2dd6ac98294587eb5ff Mon Sep 17 00:00:00 2001
   2 From: Richard Zhu <hongxing.zhu@nxp.com>
   3 Date: Thu, 13 Oct 2022 09:47:02 +0800
   4 Subject: [PATCH 3/3] phy: freescale: imx8m-pcie: Add i.MX8MP PCIe PHY support
   5
   6 Add i.MX8MP PCIe PHY support.
   7
   8 Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
   9 Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
  10 Tested-by: Marek Vasut <marex@denx.de>
  11 Tested-by: Richard Leitner <richard.leitner@skidata.com>
  12 Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com>
  13 Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
  14 Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
  15 ---
  16  drivers/phy/freescale/phy-fsl-imx8m-pcie.c | 25 ++++++++++++++++++++--
  17  1 file changed, 23 insertions(+), 2 deletions(-)
  18
  19 --- a/drivers/phy/freescale/phy-fsl-imx8m-pcie.c
  20 +++ b/drivers/phy/freescale/phy-fsl-imx8m-pcie.c
  21 @@ -48,6 +48,7 @@
  22
  23  enum imx8_pcie_phy_type {
  24         IMX8MM,
  25 +       IMX8MP,
  26  };
  27
  28  struct imx8_pcie_phy_drvdata {
  29 @@ -60,6 +61,7 @@ struct imx8_pcie_phy {
  30         struct clk              *clk;
  31         struct phy              *phy;
  32         struct regmap           *iomuxc_gpr;
  33 +       struct reset_control    *perst;
  34         struct reset_control    *reset;
  35         u32                     refclk_pad_mode;
  36         u32                     tx_deemph_gen1;
  37 @@ -74,11 +76,11 @@ static int imx8_pcie_phy_power_on(struct
  38         u32 val, pad_mode;
  39         struct imx8_pcie_phy *imx8_phy = phy_get_drvdata(phy);
  40
  41 -       reset_control_assert(imx8_phy->reset);
  42 -
  43         pad_mode = imx8_phy->refclk_pad_mode;
  44         switch (imx8_phy->drvdata->variant) {
  45         case IMX8MM:
  46 +               reset_control_assert(imx8_phy->reset);
  47 +
  48                 /* Tune PHY de-emphasis setting to pass PCIe compliance. */
  49                 if (imx8_phy->tx_deemph_gen1)
  50                         writel(imx8_phy->tx_deemph_gen1,
  51 @@ -87,6 +89,8 @@ static int imx8_pcie_phy_power_on(struct
  52                         writel(imx8_phy->tx_deemph_gen2,
  53                                imx8_phy->base + PCIE_PHY_TRSV_REG6);
  54                 break;
  55 +       case IMX8MP: /* Do nothing. */
  56 +               break;
  57         }
  58
  59         if (pad_mode == IMX8_PCIE_REFCLK_PAD_INPUT ||
  60 @@ -141,6 +145,9 @@ static int imx8_pcie_phy_power_on(struct
  61                            IMX8MM_GPR_PCIE_CMN_RST);
  62
  63         switch (imx8_phy->drvdata->variant) {
  64 +       case IMX8MP:
  65 +               reset_control_deassert(imx8_phy->perst);
  66 +               fallthrough;
  67         case IMX8MM:
  68                 reset_control_deassert(imx8_phy->reset);
  69                 usleep_range(200, 500);
  70 @@ -181,8 +188,14 @@ static const struct imx8_pcie_phy_drvdat
  71         .variant = IMX8MM,
  72  };
  73
  74 +static const struct imx8_pcie_phy_drvdata imx8mp_drvdata = {
  75 +       .gpr = "fsl,imx8mp-iomuxc-gpr",
  76 +       .variant = IMX8MP,
  77 +};
  78 +
  79  static const struct of_device_id imx8_pcie_phy_of_match[] = {
  80         {.compatible = "fsl,imx8mm-pcie-phy", .data = &imx8mm_drvdata, },
  81 +       {.compatible = "fsl,imx8mp-pcie-phy", .data = &imx8mp_drvdata, },
  82         { },
  83  };
  84  MODULE_DEVICE_TABLE(of, imx8_pcie_phy_of_match);
  85 @@ -238,6 +251,14 @@ static int imx8_pcie_phy_probe(struct pl
  86                 return PTR_ERR(imx8_phy->reset);
  87         }
  88
  89 +       if (imx8_phy->drvdata->variant == IMX8MP) {
  90 +               imx8_phy->perst =
  91 +                       devm_reset_control_get_exclusive(dev, "perst");
  92 +               if (IS_ERR(imx8_phy->perst))
  93 +                       dev_err_probe(dev, PTR_ERR(imx8_phy->perst),
  94 +                                     "Failed to get PCIE PHY PERST control\n");
  95 +       }
  96 +
  97         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  98         imx8_phy->base = devm_ioremap_resource(dev, res);
  99         if (IS_ERR(imx8_phy->base))