e14a5f17477253bdcde51a09c88f2e539a5d194f
[openwrt/staging/stintel.git] / target / linux / generic / hack-5.15 / 726-net-phy-aquantia-enable-AQR111-and-AQR111B0.patch
1 Author: Thomas Kupper <thomas.kupper@gmail.com>
2 Date: Wed May 24 21:14:17 2023 +0200
3
4 kernel: phy: add Aquantia PHY AQR111 & AQR111B0
5
6 Add the IDs for Aquantia PHY AQR111 and AQR111B0 as found in the GPL sources
7 of the Netgear RAX120v2 firmware v1.2.8.40.
8
9 This is a 5GbE chip but it reports support for 10G. Implement config_init()
10 to set max speed to 5G.
11
12 Signed-off-by: Thomas Kupper <thomas.kupper@gmail.com>
13 --- a/drivers/net/phy/aquantia_main.c
14 +++ b/drivers/net/phy/aquantia_main.c
15 @@ -20,6 +20,8 @@
16 #define PHY_ID_AQR105 0x03a1b4a2
17 #define PHY_ID_AQR106 0x03a1b4d0
18 #define PHY_ID_AQR107 0x03a1b4e0
19 +#define PHY_ID_AQR111 0x03a1b610
20 +#define PHY_ID_AQR111B0 0x03a1b612
21 #define PHY_ID_AQR112 0x03a1b662
22 #define PHY_ID_AQR112C 0x03a1b790
23 #define PHY_ID_AQR112R 0x31c31d12
24 @@ -686,6 +688,33 @@ static int aqcs109_config_init(struct ph
25 return aqr107_set_downshift(phydev, MDIO_AN_VEND_PROV_DOWNSHIFT_DFLT);
26 }
27
28 +static int aqr111_config_init(struct phy_device *phydev)
29 +{
30 + int ret;
31 +
32 + /* Check that the PHY interface type is compatible */
33 + if (phydev->interface != PHY_INTERFACE_MODE_SGMII &&
34 + phydev->interface != PHY_INTERFACE_MODE_2500BASEX &&
35 + phydev->interface != PHY_INTERFACE_MODE_XGMII &&
36 + phydev->interface != PHY_INTERFACE_MODE_USXGMII &&
37 + phydev->interface != PHY_INTERFACE_MODE_10GKR &&
38 + phydev->interface != PHY_INTERFACE_MODE_10GBASER)
39 + return -ENODEV;
40 +
41 + WARN(phydev->interface == PHY_INTERFACE_MODE_XGMII,
42 + "Your devicetree is out of date, please update it. The AQR107 family doesn't support XGMII, maybe you mean USXGMII.\n");
43 +
44 + ret = aqr107_wait_reset_complete(phydev);
45 + if (!ret)
46 + aqr107_chip_info(phydev);
47 +
48 + /* AQR111 reports supporting speed up to 10G, however only speeds up to 5G are supported. */
49 + ret = phy_set_max_speed(phydev, SPEED_5000);
50 + if (ret)
51 + return ret;
52 +
53 + return aqr107_set_downshift(phydev, MDIO_AN_VEND_PROV_DOWNSHIFT_DFLT);
54 +}
55 static void aqr107_link_change_notify(struct phy_device *phydev)
56 {
57 u8 fw_major, fw_minor;
58 @@ -905,6 +934,42 @@ static struct phy_driver aqr_driver[] =
59 .link_change_notify = aqr107_link_change_notify,
60 },
61 {
62 + PHY_ID_MATCH_MODEL(PHY_ID_AQR111),
63 + .name = "Aquantia AQR111",
64 + .probe = aqr107_probe,
65 + .config_init = aqr111_config_init,
66 + .config_aneg = aqr_config_aneg,
67 + .config_intr = aqr_config_intr,
68 + .handle_interrupt = aqr_handle_interrupt,
69 + .read_status = aqr107_read_status,
70 + .get_tunable = aqr107_get_tunable,
71 + .set_tunable = aqr107_set_tunable,
72 + .suspend = aqr107_suspend,
73 + .resume = aqr107_resume,
74 + .get_sset_count = aqr107_get_sset_count,
75 + .get_strings = aqr107_get_strings,
76 + .get_stats = aqr107_get_stats,
77 + .link_change_notify = aqr107_link_change_notify,
78 +},
79 +{
80 + PHY_ID_MATCH_MODEL(PHY_ID_AQR111B0),
81 + .name = "Aquantia AQR111B0",
82 + .probe = aqr107_probe,
83 + .config_init = aqr111_config_init,
84 + .config_aneg = aqr_config_aneg,
85 + .config_intr = aqr_config_intr,
86 + .handle_interrupt = aqr_handle_interrupt,
87 + .read_status = aqr107_read_status,
88 + .get_tunable = aqr107_get_tunable,
89 + .set_tunable = aqr107_set_tunable,
90 + .suspend = aqr107_suspend,
91 + .resume = aqr107_resume,
92 + .get_sset_count = aqr107_get_sset_count,
93 + .get_strings = aqr107_get_strings,
94 + .get_stats = aqr107_get_stats,
95 + .link_change_notify = aqr107_link_change_notify,
96 +},
97 +{
98 PHY_ID_MATCH_MODEL(PHY_ID_AQR112),
99 .name = "Aquantia AQR112",
100 .probe = aqr107_probe,
101 @@ -970,6 +1035,8 @@ static struct mdio_device_id __maybe_unu
102 { PHY_ID_MATCH_MODEL(PHY_ID_AQR105) },
103 { PHY_ID_MATCH_MODEL(PHY_ID_AQR106) },
104 { PHY_ID_MATCH_MODEL(PHY_ID_AQR107) },
105 + { PHY_ID_MATCH_MODEL(PHY_ID_AQR111) },
106 + { PHY_ID_MATCH_MODEL(PHY_ID_AQR111B0) },
107 { PHY_ID_MATCH_MODEL(PHY_ID_AQR112) },
108 { PHY_ID_MATCH_MODEL(PHY_ID_AQR112C) },
109 { PHY_ID_MATCH_MODEL(PHY_ID_AQR112R) },