kernel: bump 6.6 to 6.6.28
[openwrt/staging/stintel.git] / target / linux / generic / backport-6.6 / 790-30-v6.9-net-dsa-mt7530-prevent-possible-incorrect-XTAL-frequ.patch
1 From b9547109205c5e0a27e5bed568b0fc183fff906b Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com>
3 Date: Thu, 14 Mar 2024 12:28:35 +0300
4 Subject: [PATCH 30/30] net: dsa: mt7530: prevent possible incorrect XTAL
5 frequency selection
6 MIME-Version: 1.0
7 Content-Type: text/plain; charset=UTF-8
8 Content-Transfer-Encoding: 8bit
9
10 On MT7530, the HT_XTAL_FSEL field of the HWTRAP register stores a 2-bit
11 value that represents the frequency of the crystal oscillator connected to
12 the switch IC. The field is populated by the state of the ESW_P4_LED_0 and
13 ESW_P4_LED_0 pins, which is done right after reset is deasserted.
14
15 ESW_P4_LED_0 ESW_P3_LED_0 Frequency
16 -----------------------------------------
17 0 0 Reserved
18 0 1 20MHz
19 1 0 40MHz
20 1 1 25MHz
21
22 On MT7531, the XTAL25 bit of the STRAP register stores this. The LAN0LED0
23 pin is used to populate the bit. 25MHz when the pin is high, 40MHz when
24 it's low.
25
26 These pins are also used with LEDs, therefore, their state can be set to
27 something other than the bootstrapping configuration. For example, a link
28 may be established on port 3 before the DSA subdriver takes control of the
29 switch which would set ESW_P3_LED_0 to high.
30
31 Currently on mt7530_setup() and mt7531_setup(), 1000 - 1100 usec delay is
32 described between reset assertion and deassertion. Some switch ICs in real
33 life conditions cannot always have these pins set back to the bootstrapping
34 configuration before reset deassertion in this amount of delay. This causes
35 wrong crystal frequency to be selected which puts the switch in a
36 nonfunctional state after reset deassertion.
37
38 The tests below are conducted on an MT7530 with a 40MHz crystal oscillator
39 by Justin Swartz.
40
41 With a cable from an active peer connected to port 3 before reset, an
42 incorrect crystal frequency (0b11 = 25MHz) is selected:
43
44 [1] [3] [5]
45 : : :
46 _____________________________ __________________
47 ESW_P4_LED_0 |_______|
48 _____________________________
49 ESW_P3_LED_0 |__________________________
50
51 : : : :
52 : : [4]...:
53 : :
54 [2]................:
55
56 [1] Reset is asserted.
57 [2] Period of 1000 - 1100 usec.
58 [3] Reset is deasserted.
59 [4] Period of 315 usec. HWTRAP register is populated with incorrect
60 XTAL frequency.
61 [5] Signals reflect the bootstrapped configuration.
62
63 Increase the delay between reset_control_assert() and
64 reset_control_deassert(), and gpiod_set_value_cansleep(priv->reset, 0) and
65 gpiod_set_value_cansleep(priv->reset, 1) to 5000 - 5100 usec. This amount
66 ensures a higher possibility that the switch IC will have these pins back
67 to the bootstrapping configuration before reset deassertion.
68
69 With a cable from an active peer connected to port 3 before reset, the
70 correct crystal frequency (0b10 = 40MHz) is selected:
71
72 [1] [2-1] [3] [5]
73 : : : :
74 _____________________________ __________________
75 ESW_P4_LED_0 |_______|
76 ___________________ _______
77 ESW_P3_LED_0 |_________| |__________________
78
79 : : : : :
80 : [2-2]...: [4]...:
81 [2]................:
82
83 [1] Reset is asserted.
84 [2] Period of 5000 - 5100 usec.
85 [2-1] ESW_P3_LED_0 goes low.
86 [2-2] Remaining period of 5000 - 5100 usec.
87 [3] Reset is deasserted.
88 [4] Period of 310 usec. HWTRAP register is populated with bootstrapped
89 XTAL frequency.
90 [5] Signals reflect the bootstrapped configuration.
91
92 ESW_P3_LED_0 low period before reset deassertion:
93
94 5000 usec
95 - 5100 usec
96 TEST RESET HOLD
97 # (usec)
98 ---------------------
99 1 5410
100 2 5440
101 3 4375
102 4 5490
103 5 5475
104 6 4335
105 7 4370
106 8 5435
107 9 4205
108 10 4335
109 11 3750
110 12 3170
111 13 4395
112 14 4375
113 15 3515
114 16 4335
115 17 4220
116 18 4175
117 19 4175
118 20 4350
119
120 Min 3170
121 Max 5490
122
123 Median 4342.500
124 Avg 4466.500
125
126 Revert commit 2920dd92b980 ("net: dsa: mt7530: disable LEDs before reset").
127 Changing the state of pins via reset assertion is simpler and more
128 efficient than doing so by setting the LED controller off.
129
130 Fixes: b8f126a8d543 ("net-next: dsa: add dsa support for Mediatek MT7530 switch")
131 Fixes: c288575f7810 ("net: dsa: mt7530: Add the support of MT7531 switch")
132 Co-developed-by: Justin Swartz <justin.swartz@risingedge.co.za>
133 Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za>
134 Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
135 Signed-off-by: David S. Miller <davem@davemloft.net>
136 ---
137 drivers/net/dsa/mt7530.c | 6 ------
138 1 file changed, 6 deletions(-)
139
140 --- a/drivers/net/dsa/mt7530.c
141 +++ b/drivers/net/dsa/mt7530.c
142 @@ -2389,12 +2389,6 @@ mt7530_setup(struct dsa_switch *ds)
143 }
144 }
145
146 - /* Disable LEDs before reset to prevent the MT7530 sampling a
147 - * potentially incorrect HT_XTAL_FSEL value.
148 - */
149 - mt7530_write(priv, MT7530_LED_EN, 0);
150 - usleep_range(1000, 1100);
151 -
152 /* Reset whole chip through gpio pin or memory-mapped registers for
153 * different type of hardware
154 */