target/linux/generic/backport-6.6/790-28-v6.9-net-dsa-mt7530-disable-LEDs-before-reset.patch

   1 From de16cf680331cd0bd7db97c3f8d376f5eac39cae Mon Sep 17 00:00:00 2001
   2 From: Justin Swartz <justin.swartz@risingedge.co.za>
   3 Date: Tue, 5 Mar 2024 06:39:51 +0200
   4 Subject: [PATCH 28/30] net: dsa: mt7530: disable LEDs before reset
   5
   6 Disable LEDs just before resetting the MT7530 to avoid
   7 situations where the ESW_P4_LED_0 and ESW_P3_LED_0 pin
   8 states may cause an unintended external crystal frequency
   9 to be selected.
  10
  11 The HT_XTAL_FSEL (External Crystal Frequency Selection)
  12 field of HWTRAP (the Hardware Trap register) stores a
  13 2-bit value that represents the state of the ESW_P4_LED_0
  14 and ESW_P4_LED_0 pins (seemingly) sampled just after the
  15 MT7530 has been reset, as:
  16
  17     ESW_P4_LED_0    ESW_P3_LED_0    Frequency
  18     -----------------------------------------
  19     0               1               20MHz
  20     1               0               40MHz
  21     1               1               25MHz
  22
  23 The value of HT_XTAL_FSEL is bootstrapped by pulling
  24 ESW_P4_LED_0 and ESW_P3_LED_0 up or down accordingly,
  25 but:
  26
  27   if a 40MHz crystal has been selected and
  28   the ESW_P3_LED_0 pin is high during reset,
  29
  30   or a 20MHz crystal has been selected and
  31   the ESW_P4_LED_0 pin is high during reset,
  32
  33   then the value of HT_XTAL_FSEL will indicate
  34   that a 25MHz crystal is present.
  35
  36 By default, the state of the LED pins is PHY controlled
  37 to reflect the link state.
  38
  39 To illustrate, if a board has:
  40
  41   5 ports with active low LED control,
  42   and HT_XTAL_FSEL bootstrapped for 40MHz.
  43
  44 When the MT7530 is powered up without any external
  45 connection, only the LED associated with Port 3 is
  46 illuminated as ESW_P3_LED_0 is low.
  47
  48 In this state, directly after mt7530_setup()'s reset
  49 is performed, the HWTRAP register (0x7800) reflects
  50 the intended HT_XTAL_FSEL (HWTRAP bits 10:9) of 40MHz:
  51
  52   mt7530-mdio mdio-bus:1f: mt7530_read: 00007800 == 00007dcf
  53
  54   >>> bin(0x7dcf >> 9 & 0b11)
  55   '0b10'
  56
  57 But if a cable is connected to Port 3 and the link
  58 is active before mt7530_setup()'s reset takes place,
  59 then HT_XTAL_FSEL seems to be set for 25MHz:
  60
  61   mt7530-mdio mdio-bus:1f: mt7530_read: 00007800 == 00007fcf
  62
  63   >>> bin(0x7fcf >> 9 & 0b11)
  64   '0b11'
  65
  66 Once HT_XTAL_FSEL reflects 25MHz, none of the ports
  67 are functional until the MT7621 (or MT7530 itself)
  68 is reset.
  69
  70 By disabling the LED pins just before reset, the chance
  71 of an unintended HT_XTAL_FSEL value is reduced.
  72
  73 Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za>
  74 Link: https://lore.kernel.org/r/20240305043952.21590-1-justin.swartz@risingedge.co.za
  75 Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  76 ---
  77  drivers/net/dsa/mt7530.c | 6 ++++++
  78  1 file changed, 6 insertions(+)
  79
  80 --- a/drivers/net/dsa/mt7530.c
  81 +++ b/drivers/net/dsa/mt7530.c
  82 @@ -2228,6 +2228,12 @@ mt7530_setup(struct dsa_switch *ds)
  83                 }
  84         }
  85
  86 +       /* Disable LEDs before reset to prevent the MT7530 sampling a
  87 +        * potentially incorrect HT_XTAL_FSEL value.
  88 +        */
  89 +       mt7530_write(priv, MT7530_LED_EN, 0);
  90 +       usleep_range(1000, 1100);
  91 +
  92         /* Reset whole chip through gpio pin or memory-mapped registers for
  93          * different type of hardware
  94          */