generic: 6.6: sync mt7530 DSA driver with upstream
[openwrt/staging/stintel.git] / target / linux / generic / backport-6.6 / 790-12-v6.9-net-dsa-mt7530-empty-default-case-on-mt7530_setup_po.patch
1 From 1f538cda24bcb69919da2fcac0211b66281d3d4e Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com>
3 Date: Tue, 6 Feb 2024 01:08:02 +0300
4 Subject: [PATCH 12/30] net: dsa: mt7530: empty default case on
5 mt7530_setup_port5()
6 MIME-Version: 1.0
7 Content-Type: text/plain; charset=UTF-8
8 Content-Transfer-Encoding: 8bit
9
10 There're two code paths for setting up port 5:
11
12 mt7530_setup()
13 -> mt7530_setup_port5()
14
15 mt753x_phylink_mac_config()
16 -> mt753x_mac_config()
17 -> mt7530_mac_config()
18 -> mt7530_setup_port5()
19
20 On the first code path, priv->p5_intf_sel is either set to
21 P5_INTF_SEL_PHY_P0 or P5_INTF_SEL_PHY_P4 when mt7530_setup_port5() is run.
22
23 On the second code path, priv->p5_intf_sel is set to P5_INTF_SEL_GMAC5 when
24 mt7530_setup_port5() is run.
25
26 Empty the default case which will never run but is needed nonetheless to
27 handle all the remaining enumeration values.
28
29 Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
30 Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
31 Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
32 Link: https://lore.kernel.org/r/20240206-for-netnext-mt7530-improvements-2-v5-1-d7d92a185cb1@arinc9.com
33 Signed-off-by: Jakub Kicinski <kuba@kernel.org>
34 ---
35 drivers/net/dsa/mt7530.c | 5 +----
36 1 file changed, 1 insertion(+), 4 deletions(-)
37
38 --- a/drivers/net/dsa/mt7530.c
39 +++ b/drivers/net/dsa/mt7530.c
40 @@ -943,9 +943,7 @@ static void mt7530_setup_port5(struct ds
41 val &= ~MHWTRAP_P5_DIS;
42 break;
43 default:
44 - dev_err(ds->dev, "Unsupported p5_intf_sel %d\n",
45 - priv->p5_intf_sel);
46 - goto unlock_exit;
47 + break;
48 }
49
50 /* Setup RGMII settings */
51 @@ -975,7 +973,6 @@ static void mt7530_setup_port5(struct ds
52 dev_dbg(ds->dev, "Setup P5, HWTRAP=0x%x, intf_sel=%s, phy-mode=%s\n",
53 val, p5_intf_modes(priv->p5_intf_sel), phy_modes(interface));
54
55 -unlock_exit:
56 mutex_unlock(&priv->reg_mutex);
57 }
58