kernel: bump 6.1 to 6.1.53
[openwrt/staging/stintel.git] / target / linux / bcm27xx / patches-6.1 / 950-0312-media-i2c-add-ov9281-driver.patch
1 From d26583e9c31d10919c8d4b965b938724fde1ba3c Mon Sep 17 00:00:00 2001
2 From: Zefa Chen <zefa.chen@rock-chips.com>
3 Date: Fri, 17 May 2019 18:23:03 +0800
4 Subject: [PATCH] media: i2c: add ov9281 driver.
5
6 Change-Id: I7b77250bbc56d2f861450cf77271ad15f9b88ab1
7 Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
8
9 media: i2c: ov9281: fix mclk issue when probe multiple camera.
10
11 Takes the ov9281 part only from the Rockchip's patch.
12
13 Change-Id: I30e833baf2c1bb07d6d87ddb3b00759ab45a90e4
14 Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
15
16 media: i2c: ov9281: add enum_frame_interval function for iq tool 2.2 and hal3
17
18 Adds the ov9281 parts of the Rockchip patch adding enum_frame_interval to
19 a large number of drivers.
20
21 Change-Id: I03344cd6cf278dd7c18fce8e97479089ef185a5c
22 Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
23
24 media: i2c: ov9281: Fixup for recent kernel releases, and remove custom code
25
26 The Rockchip driver was based on a 4.4 kernel, and had several custom
27 Rockchip parts.
28
29 Update to 5.4 kernel APIs, with the relevant controls required by
30 libcamera, and remove custom Rockchip parts.
31
32 Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
33
34 media: i2c: ov9281: Read chip ID via 2 reads
35
36 Vision Components have made an OV9281 module which blocks reading
37 back the majority of registers to comply with NDAs, and in doing
38 so doesn't allow auto-increment register reading as used when
39 reading the chip ID.
40
41 Use two reads and manually combine the results.
42
43 Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
44
45 media: i2c: ov9281: Add support for 8 bit readout
46
47 The sensor supports 8 bit mode as well as 10bit, so add the
48 relevant code to allow selection of this.
49
50 Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
51
52 media: ov9281: Add 1280x720 and 640x480 modes
53
54 Breaks out common register set and adds the different registers
55 for 1280x720 (cropped) and 640x480 (skipped) modes
56
57 Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
58
59 Fixed picture line bug in all ov9281 modes
60
61 Signed-off-by: Mathias Anhalt <mathiasanhalt@web.de>
62
63 Added hflip and vflip controls to ov9281
64
65 Signed-off-by: Mathias Anhalt <mathiasanhalt@web.de>
66
67 media: i2c: ov9281: Remove override of subdev name
68
69 From the original Rockchip driver, the subdev was renamed
70 from the default to being "mov9281 <dev_name>" whereas the
71 default would have been "ov9281 <dev_name>".
72
73 Remove the override to drop back to the default rather than
74 a vendor custom string.
75
76 Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
77
78 media: v4l2-subdev: add subdev-wide state struct
79
80 Signed-off-by: Dom Cobley <popcornmix@gmail.com>
81
82 media: i2c: ov9281: Add fwnode properties controls
83
84 Add call to v4l2_ctrl_new_fwnode_properties to read and
85 create the fwnode based controls.
86
87 Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
88
89 media: i2c: ov9281: Sensor should report RAW color space
90
91 Tested on Raspberry Pi running libcamera.
92
93 Signed-off-by: David Plowman <david.plowman@raspberrypi.com>
94 ---
95 drivers/media/i2c/Kconfig | 11 +
96 drivers/media/i2c/Makefile | 1 +
97 drivers/media/i2c/imx290.c | 9 +-
98 drivers/media/i2c/imx477.c | 30 +-
99 drivers/media/i2c/irs1125.c | 12 +-
100 drivers/media/i2c/ov9281.c | 1290 +++++++++++++++++
101 .../media/platform/bcm2835/bcm2835-unicam.c | 20 +-
102 .../bcm2835-isp/bcm2835-v4l2-isp.c | 4 +-
103 8 files changed, 1341 insertions(+), 36 deletions(-)
104 create mode 100644 drivers/media/i2c/ov9281.c
105
106 --- a/drivers/media/i2c/Kconfig
107 +++ b/drivers/media/i2c/Kconfig
108 @@ -1343,6 +1343,17 @@ config VIDEO_TW2804
109 To compile this driver as a module, choose M here: the
110 module will be called tw2804.
111
112 +config VIDEO_OV9281
113 + tristate "OmniVision OV9281 sensor support"
114 + depends on I2C && VIDEO_DEV
115 + depends on MEDIA_CAMERA_SUPPORT
116 + help
117 + This is a Video4Linux2 sensor-level driver for the OmniVision
118 + OV9281 camera.
119 +
120 + To compile this driver as a module, choose M here: the
121 + module will be called ov9281.
122 +
123 config VIDEO_TW9903
124 tristate "Techwell TW9903 video decoder"
125 depends on VIDEO_DEV && I2C
126 --- a/drivers/media/i2c/Makefile
127 +++ b/drivers/media/i2c/Makefile
128 @@ -98,6 +98,7 @@ obj-$(CONFIG_VIDEO_OV772X) += ov772x.o
129 obj-$(CONFIG_VIDEO_OV7740) += ov7740.o
130 obj-$(CONFIG_VIDEO_OV8856) += ov8856.o
131 obj-$(CONFIG_VIDEO_OV8865) += ov8865.o
132 +obj-$(CONFIG_VIDEO_OV9281) += ov9281.o
133 obj-$(CONFIG_VIDEO_OV9282) += ov9282.o
134 obj-$(CONFIG_VIDEO_OV9640) += ov9640.o
135 obj-$(CONFIG_VIDEO_OV9650) += ov9650.o
136 --- a/drivers/media/i2c/imx290.c
137 +++ b/drivers/media/i2c/imx290.c
138 @@ -982,12 +982,13 @@ static int imx290_write_current_format(s
139 }
140
141 static const struct v4l2_rect *
142 -__imx290_get_pad_crop(struct imx290 *imx290, struct v4l2_subdev_pad_config *cfg,
143 +__imx290_get_pad_crop(struct imx290 *imx290,
144 + struct v4l2_subdev_state *sd_state,
145 unsigned int pad, enum v4l2_subdev_format_whence which)
146 {
147 switch (which) {
148 case V4L2_SUBDEV_FORMAT_TRY:
149 - return v4l2_subdev_get_try_crop(&imx290->sd, cfg, pad);
150 + return v4l2_subdev_get_try_crop(&imx290->sd, sd_state, pad);
151 case V4L2_SUBDEV_FORMAT_ACTIVE:
152 return &imx290->current_mode->crop;
153 }
154 @@ -996,7 +997,7 @@ __imx290_get_pad_crop(struct imx290 *imx
155 }
156
157 static int imx290_get_selection(struct v4l2_subdev *sd,
158 - struct v4l2_subdev_pad_config *cfg,
159 + struct v4l2_subdev_state *sd_state,
160 struct v4l2_subdev_selection *sel)
161 {
162 switch (sel->target) {
163 @@ -1004,7 +1005,7 @@ static int imx290_get_selection(struct v
164 struct imx290 *imx290 = to_imx290(sd);
165
166 mutex_lock(&imx290->lock);
167 - sel->r = *__imx290_get_pad_crop(imx290, cfg, sel->pad,
168 + sel->r = *__imx290_get_pad_crop(imx290, sd_state, sel->pad,
169 sel->which);
170 mutex_unlock(&imx290->lock);
171
172 --- a/drivers/media/i2c/imx477.c
173 +++ b/drivers/media/i2c/imx477.c
174 @@ -1272,9 +1272,9 @@ static int imx477_open(struct v4l2_subde
175 {
176 struct imx477 *imx477 = to_imx477(sd);
177 struct v4l2_mbus_framefmt *try_fmt_img =
178 - v4l2_subdev_get_try_format(sd, fh->pad, IMAGE_PAD);
179 + v4l2_subdev_get_try_format(sd, fh->state, IMAGE_PAD);
180 struct v4l2_mbus_framefmt *try_fmt_meta =
181 - v4l2_subdev_get_try_format(sd, fh->pad, METADATA_PAD);
182 + v4l2_subdev_get_try_format(sd, fh->state, METADATA_PAD);
183 struct v4l2_rect *try_crop;
184
185 mutex_lock(&imx477->mutex);
186 @@ -1293,7 +1293,7 @@ static int imx477_open(struct v4l2_subde
187 try_fmt_meta->field = V4L2_FIELD_NONE;
188
189 /* Initialize try_crop */
190 - try_crop = v4l2_subdev_get_try_crop(sd, fh->pad, IMAGE_PAD);
191 + try_crop = v4l2_subdev_get_try_crop(sd, fh->state, IMAGE_PAD);
192 try_crop->left = IMX477_PIXEL_ARRAY_LEFT;
193 try_crop->top = IMX477_PIXEL_ARRAY_TOP;
194 try_crop->width = IMX477_PIXEL_ARRAY_WIDTH;
195 @@ -1425,7 +1425,7 @@ static const struct v4l2_ctrl_ops imx477
196 };
197
198 static int imx477_enum_mbus_code(struct v4l2_subdev *sd,
199 - struct v4l2_subdev_pad_config *cfg,
200 + struct v4l2_subdev_state *sd_state,
201 struct v4l2_subdev_mbus_code_enum *code)
202 {
203 struct imx477 *imx477 = to_imx477(sd);
204 @@ -1450,7 +1450,7 @@ static int imx477_enum_mbus_code(struct
205 }
206
207 static int imx477_enum_frame_size(struct v4l2_subdev *sd,
208 - struct v4l2_subdev_pad_config *cfg,
209 + struct v4l2_subdev_state *sd_state,
210 struct v4l2_subdev_frame_size_enum *fse)
211 {
212 struct imx477 *imx477 = to_imx477(sd);
213 @@ -1516,7 +1516,7 @@ static void imx477_update_metadata_pad_f
214 }
215
216 static int imx477_get_pad_format(struct v4l2_subdev *sd,
217 - struct v4l2_subdev_pad_config *cfg,
218 + struct v4l2_subdev_state *sd_state,
219 struct v4l2_subdev_format *fmt)
220 {
221 struct imx477 *imx477 = to_imx477(sd);
222 @@ -1528,7 +1528,8 @@ static int imx477_get_pad_format(struct
223
224 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
225 struct v4l2_mbus_framefmt *try_fmt =
226 - v4l2_subdev_get_try_format(&imx477->sd, cfg, fmt->pad);
227 + v4l2_subdev_get_try_format(&imx477->sd, sd_state,
228 + fmt->pad);
229 /* update the code which could change due to vflip or hflip: */
230 try_fmt->code = fmt->pad == IMAGE_PAD ?
231 imx477_get_format_code(imx477, try_fmt->code) :
232 @@ -1593,7 +1594,7 @@ static void imx477_set_framing_limits(st
233 }
234
235 static int imx477_set_pad_format(struct v4l2_subdev *sd,
236 - struct v4l2_subdev_pad_config *cfg,
237 + struct v4l2_subdev_state *sd_state,
238 struct v4l2_subdev_format *fmt)
239 {
240 struct v4l2_mbus_framefmt *framefmt;
241 @@ -1622,7 +1623,7 @@ static int imx477_set_pad_format(struct
242 fmt->format.height);
243 imx477_update_image_pad_format(imx477, mode, fmt);
244 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
245 - framefmt = v4l2_subdev_get_try_format(sd, cfg,
246 + framefmt = v4l2_subdev_get_try_format(sd, sd_state,
247 fmt->pad);
248 *framefmt = fmt->format;
249 } else if (imx477->mode != mode) {
250 @@ -1632,7 +1633,7 @@ static int imx477_set_pad_format(struct
251 }
252 } else {
253 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
254 - framefmt = v4l2_subdev_get_try_format(sd, cfg,
255 + framefmt = v4l2_subdev_get_try_format(sd, sd_state,
256 fmt->pad);
257 *framefmt = fmt->format;
258 } else {
259 @@ -1647,12 +1648,13 @@ static int imx477_set_pad_format(struct
260 }
261
262 static const struct v4l2_rect *
263 -__imx477_get_pad_crop(struct imx477 *imx477, struct v4l2_subdev_pad_config *cfg,
264 +__imx477_get_pad_crop(struct imx477 *imx477,
265 + struct v4l2_subdev_state *sd_state,
266 unsigned int pad, enum v4l2_subdev_format_whence which)
267 {
268 switch (which) {
269 case V4L2_SUBDEV_FORMAT_TRY:
270 - return v4l2_subdev_get_try_crop(&imx477->sd, cfg, pad);
271 + return v4l2_subdev_get_try_crop(&imx477->sd, sd_state, pad);
272 case V4L2_SUBDEV_FORMAT_ACTIVE:
273 return &imx477->mode->crop;
274 }
275 @@ -1661,7 +1663,7 @@ __imx477_get_pad_crop(struct imx477 *imx
276 }
277
278 static int imx477_get_selection(struct v4l2_subdev *sd,
279 - struct v4l2_subdev_pad_config *cfg,
280 + struct v4l2_subdev_state *sd_state,
281 struct v4l2_subdev_selection *sel)
282 {
283 switch (sel->target) {
284 @@ -1669,7 +1671,7 @@ static int imx477_get_selection(struct v
285 struct imx477 *imx477 = to_imx477(sd);
286
287 mutex_lock(&imx477->mutex);
288 - sel->r = *__imx477_get_pad_crop(imx477, cfg, sel->pad,
289 + sel->r = *__imx477_get_pad_crop(imx477, sd_state, sel->pad,
290 sel->which);
291 mutex_unlock(&imx477->mutex);
292
293 --- a/drivers/media/i2c/irs1125.c
294 +++ b/drivers/media/i2c/irs1125.c
295 @@ -562,8 +562,8 @@ static const struct v4l2_subdev_video_op
296 };
297
298 static int irs1125_enum_mbus_code(struct v4l2_subdev *sd,
299 - struct v4l2_subdev_pad_config *cfg,
300 - struct v4l2_subdev_mbus_code_enum *code)
301 + struct v4l2_subdev_state *sd_state,
302 + struct v4l2_subdev_mbus_code_enum *code)
303 {
304 if (code->index > 0)
305 return -EINVAL;
306 @@ -574,7 +574,7 @@ static int irs1125_enum_mbus_code(struct
307 }
308
309 static int irs1125_set_get_fmt(struct v4l2_subdev *sd,
310 - struct v4l2_subdev_pad_config *cfg,
311 + struct v4l2_subdev_state *sd_state,
312 struct v4l2_subdev_format *format)
313 {
314 struct v4l2_mbus_framefmt *fmt = &format->format;
315 @@ -930,7 +930,7 @@ static int irs1125_detect(struct v4l2_su
316 static int irs1125_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
317 {
318 struct v4l2_mbus_framefmt *format =
319 - v4l2_subdev_get_try_format(sd, fh->pad, 0);
320 + v4l2_subdev_get_try_format(sd, fh->state, 0);
321
322 format->code = MEDIA_BUS_FMT_Y12_1X12;
323 format->width = IRS1125_WINDOW_WIDTH_DEF;
324 @@ -1161,7 +1161,7 @@ mutex_remove:
325 return ret;
326 }
327
328 -static int irs1125_remove(struct i2c_client *client)
329 +static void irs1125_remove(struct i2c_client *client)
330 {
331 struct v4l2_subdev *sd = i2c_get_clientdata(client);
332 struct irs1125 *irs1125 = to_state(sd);
333 @@ -1171,8 +1171,6 @@ static int irs1125_remove(struct i2c_cli
334 v4l2_device_unregister_subdev(sd);
335 mutex_destroy(&irs1125->lock);
336 v4l2_ctrl_handler_free(&irs1125->ctrl_handler);
337 -
338 - return 0;
339 }
340
341 #if IS_ENABLED(CONFIG_OF)
342 --- /dev/null
343 +++ b/drivers/media/i2c/ov9281.c
344 @@ -0,0 +1,1290 @@
345 +// SPDX-License-Identifier: GPL-2.0
346 +/*
347 + * Omnivision OV9281 1280x800 global shutter image sensor driver
348 + *
349 + * This driver has been taken from
350 + * https://github.com/rockchip-linux/kernel/blob/develop-4.4/drivers/media/i2c/ov9281.c
351 + * cleaned up, made to compile against mainline kernels instead of the Rockchip
352 + * vendor kernel, and the relevant controls added to work with libcamera.
353 + *
354 + * Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd.
355 + * V0.0X01.0X02 fix mclk issue when probe multiple camera.
356 + * V0.0X01.0X03 add enum_frame_interval function.
357 + */
358 +
359 +#include <linux/clk.h>
360 +#include <linux/device.h>
361 +#include <linux/delay.h>
362 +#include <linux/gpio/consumer.h>
363 +#include <linux/i2c.h>
364 +#include <linux/module.h>
365 +#include <linux/pm_runtime.h>
366 +#include <linux/regulator/consumer.h>
367 +#include <linux/sysfs.h>
368 +#include <linux/slab.h>
369 +#include <media/media-entity.h>
370 +#include <media/v4l2-async.h>
371 +#include <media/v4l2-ctrls.h>
372 +#include <media/v4l2-fwnode.h>
373 +#include <media/v4l2-subdev.h>
374 +
375 +#define OV9281_LINK_FREQ_400MHZ 400000000
376 +#define OV9281_LANES 2
377 +
378 +/* pixel rate = link frequency * 2 * lanes / BITS_PER_SAMPLE */
379 +#define OV9281_PIXEL_RATE_10BIT (OV9281_LINK_FREQ_400MHZ * 2 * \
380 + OV9281_LANES / 10)
381 +#define OV9281_PIXEL_RATE_8BIT (OV9281_LINK_FREQ_400MHZ * 2 * \
382 + OV9281_LANES / 8)
383 +#define OV9281_XVCLK_FREQ 24000000
384 +
385 +#define CHIP_ID 0x9281
386 +#define OV9281_REG_CHIP_ID 0x300a
387 +
388 +#define OV9281_REG_TIMING_FORMAT_1 0x3820
389 +#define OV9281_REG_TIMING_FORMAT_2 0x3821
390 +#define OV9281_FLIP_BIT BIT(2)
391 +
392 +#define OV9281_REG_CTRL_MODE 0x0100
393 +#define OV9281_MODE_SW_STANDBY 0x0
394 +#define OV9281_MODE_STREAMING BIT(0)
395 +
396 +#define OV9281_REG_EXPOSURE 0x3500
397 +#define OV9281_EXPOSURE_MIN 4
398 +#define OV9281_EXPOSURE_STEP 1
399 +#define OV9281_VTS_MAX 0x7fff
400 +
401 +#define OV9281_REG_GAIN_H 0x3508
402 +#define OV9281_REG_GAIN_L 0x3509
403 +#define OV9281_GAIN_H_MASK 0x07
404 +#define OV9281_GAIN_H_SHIFT 8
405 +#define OV9281_GAIN_L_MASK 0xff
406 +#define OV9281_GAIN_MIN 0x10
407 +#define OV9281_GAIN_MAX 0xf8
408 +#define OV9281_GAIN_STEP 1
409 +#define OV9281_GAIN_DEFAULT 0x10
410 +
411 +#define OV9281_REG_TEST_PATTERN 0x5e00
412 +#define OV9281_TEST_PATTERN_ENABLE 0x80
413 +#define OV9281_TEST_PATTERN_DISABLE 0x0
414 +
415 +#define OV9281_REG_VTS 0x380e
416 +
417 +/*
418 + * OV9281 native and active pixel array size.
419 + * Datasheet not available to confirm these values, so assume there are no
420 + * border pixels.
421 + */
422 +#define OV9281_NATIVE_WIDTH 1280U
423 +#define OV9281_NATIVE_HEIGHT 800U
424 +#define OV9281_PIXEL_ARRAY_LEFT 0U
425 +#define OV9281_PIXEL_ARRAY_TOP 0U
426 +#define OV9281_PIXEL_ARRAY_WIDTH 1280U
427 +#define OV9281_PIXEL_ARRAY_HEIGHT 800U
428 +
429 +#define REG_NULL 0xFFFF
430 +
431 +#define OV9281_REG_VALUE_08BIT 1
432 +#define OV9281_REG_VALUE_16BIT 2
433 +#define OV9281_REG_VALUE_24BIT 3
434 +
435 +#define OV9281_NAME "ov9281"
436 +
437 +static const char * const ov9281_supply_names[] = {
438 + "avdd", /* Analog power */
439 + "dovdd", /* Digital I/O power */
440 + "dvdd", /* Digital core power */
441 +};
442 +
443 +#define OV9281_NUM_SUPPLIES ARRAY_SIZE(ov9281_supply_names)
444 +
445 +struct regval {
446 + u16 addr;
447 + u8 val;
448 +};
449 +
450 +struct ov9281_mode {
451 + u32 width;
452 + u32 height;
453 + u32 hts_def;
454 + u32 vts_def;
455 + u32 exp_def;
456 + struct v4l2_rect crop;
457 + const struct regval *reg_list;
458 +};
459 +
460 +struct ov9281 {
461 + struct i2c_client *client;
462 + struct clk *xvclk;
463 + struct gpio_desc *reset_gpio;
464 + struct gpio_desc *pwdn_gpio;
465 + struct regulator_bulk_data supplies[OV9281_NUM_SUPPLIES];
466 +
467 + struct v4l2_subdev subdev;
468 + struct media_pad pad;
469 + struct v4l2_ctrl_handler ctrl_handler;
470 + struct v4l2_ctrl *exposure;
471 + struct v4l2_ctrl *anal_gain;
472 + struct v4l2_ctrl *digi_gain;
473 + struct v4l2_ctrl *hblank;
474 + struct v4l2_ctrl *vblank;
475 + struct v4l2_ctrl *hflip;
476 + struct v4l2_ctrl *vflip;
477 + struct v4l2_ctrl *pixel_rate;
478 + struct v4l2_ctrl *test_pattern;
479 + struct mutex mutex;
480 + bool streaming;
481 + bool power_on;
482 + const struct ov9281_mode *cur_mode;
483 + u32 code;
484 +};
485 +
486 +#define to_ov9281(sd) container_of(sd, struct ov9281, subdev)
487 +
488 +/*
489 + * Xclk 24Mhz
490 + * max_framerate 120fps for 10 bit, 144fps for 8 bit.
491 + * mipi_datarate per lane 800Mbps
492 + */
493 +static const struct regval ov9281_common_regs[] = {
494 + {0x0103, 0x01},
495 + {0x0302, 0x32},
496 + {0x030e, 0x02},
497 + {0x3001, 0x00},
498 + {0x3004, 0x00},
499 + {0x3005, 0x00},
500 + {0x3006, 0x04},
501 + {0x3011, 0x0a},
502 + {0x3013, 0x18},
503 + {0x3022, 0x01},
504 + {0x3023, 0x00},
505 + {0x302c, 0x00},
506 + {0x302f, 0x00},
507 + {0x3030, 0x04},
508 + {0x3039, 0x32},
509 + {0x303a, 0x00},
510 + {0x303f, 0x01},
511 + {0x3500, 0x00},
512 + {0x3501, 0x2a},
513 + {0x3502, 0x90},
514 + {0x3503, 0x08},
515 + {0x3505, 0x8c},
516 + {0x3507, 0x03},
517 + {0x3508, 0x00},
518 + {0x3509, 0x10},
519 + {0x3610, 0x80},
520 + {0x3611, 0xa0},
521 + {0x3620, 0x6f},
522 + {0x3632, 0x56},
523 + {0x3633, 0x78},
524 + {0x3666, 0x00},
525 + {0x366f, 0x5a},
526 + {0x3680, 0x84},
527 + {0x3712, 0x80},
528 + {0x372d, 0x22},
529 + {0x3731, 0x80},
530 + {0x3732, 0x30},
531 + {0x377d, 0x22},
532 + {0x3788, 0x02},
533 + {0x3789, 0xa4},
534 + {0x378a, 0x00},
535 + {0x378b, 0x4a},
536 + {0x3799, 0x20},
537 + {0x3881, 0x42},
538 + {0x38b1, 0x00},
539 + {0x3920, 0xff},
540 + {0x4010, 0x40},
541 + {0x4043, 0x40},
542 + {0x4307, 0x30},
543 + {0x4317, 0x00},
544 + {0x4501, 0x00},
545 + {0x450a, 0x08},
546 + {0x4601, 0x04},
547 + {0x470f, 0x00},
548 + {0x4f07, 0x00},
549 + {0x4800, 0x00},
550 + {0x5000, 0x9f},
551 + {0x5001, 0x00},
552 + {0x5e00, 0x00},
553 + {0x5d00, 0x07},
554 + {0x5d01, 0x00},
555 + {REG_NULL, 0x00},
556 +};
557 +
558 +static const struct regval ov9281_1280x800_regs[] = {
559 + {0x3778, 0x00},
560 + {0x3800, 0x00},
561 + {0x3801, 0x00},
562 + {0x3802, 0x00},
563 + {0x3803, 0x00},
564 + {0x3804, 0x05},
565 + {0x3805, 0x0f},
566 + {0x3806, 0x03},
567 + {0x3807, 0x2f},
568 + {0x3808, 0x05},
569 + {0x3809, 0x00},
570 + {0x380a, 0x03},
571 + {0x380b, 0x20},
572 + {0x380c, 0x02},
573 + {0x380d, 0xd8},
574 + {0x380e, 0x03},
575 + {0x380f, 0x8e},
576 + {0x3810, 0x00},
577 + {0x3811, 0x08},
578 + {0x3812, 0x00},
579 + {0x3813, 0x08},
580 + {0x3814, 0x11},
581 + {0x3815, 0x11},
582 + {0x3820, 0x40},
583 + {0x3821, 0x00},
584 + {0x4003, 0x40},
585 + {0x4008, 0x04},
586 + {0x4009, 0x0b},
587 + {0x400c, 0x00},
588 + {0x400d, 0x07},
589 + {0x4507, 0x00},
590 + {0x4509, 0x00},
591 + {REG_NULL, 0x00},
592 +};
593 +
594 +static const struct regval ov9281_1280x720_regs[] = {
595 + {0x3778, 0x00},
596 + {0x3800, 0x00},
597 + {0x3801, 0x00},
598 + {0x3802, 0x00},
599 + {0x3803, 0x28},
600 + {0x3804, 0x05},
601 + {0x3805, 0x0f},
602 + {0x3806, 0x03},
603 + {0x3807, 0x07},
604 + {0x3808, 0x05},
605 + {0x3809, 0x00},
606 + {0x380a, 0x02},
607 + {0x380b, 0xd0},
608 + {0x380c, 0x02},
609 + {0x380d, 0xd8},
610 + {0x380e, 0x03},
611 + {0x380f, 0x8e},
612 + {0x3810, 0x00},
613 + {0x3811, 0x08},
614 + {0x3812, 0x00},
615 + {0x3813, 0x08},
616 + {0x3814, 0x11},
617 + {0x3815, 0x11},
618 + {0x3820, 0x40},
619 + {0x3821, 0x00},
620 + {0x4003, 0x40},
621 + {0x4008, 0x04},
622 + {0x4009, 0x0b},
623 + {0x400c, 0x00},
624 + {0x400d, 0x07},
625 + {0x4507, 0x00},
626 + {0x4509, 0x00},
627 + {REG_NULL, 0x00},
628 +};
629 +
630 +static const struct regval ov9281_640x400_regs[] = {
631 + {0x3778, 0x10},
632 + {0x3800, 0x00},
633 + {0x3801, 0x00},
634 + {0x3802, 0x00},
635 + {0x3803, 0x00},
636 + {0x3804, 0x05},
637 + {0x3805, 0x0f},
638 + {0x3806, 0x03},
639 + {0x3807, 0x2f},
640 + {0x3808, 0x02},
641 + {0x3809, 0x80},
642 + {0x380a, 0x01},
643 + {0x380b, 0x90},
644 + {0x380c, 0x02},
645 + {0x380d, 0xd8},
646 + {0x380e, 0x02},
647 + {0x380f, 0x08},
648 + {0x3810, 0x00},
649 + {0x3811, 0x04},
650 + {0x3812, 0x00},
651 + {0x3813, 0x04},
652 + {0x3814, 0x31},
653 + {0x3815, 0x22},
654 + {0x3820, 0x60},
655 + {0x3821, 0x01},
656 + {0x4008, 0x02},
657 + {0x4009, 0x05},
658 + {0x400c, 0x00},
659 + {0x400d, 0x03},
660 + {0x4507, 0x03},
661 + {0x4509, 0x80},
662 + {REG_NULL, 0x00},
663 +};
664 +
665 +static const struct regval op_10bit[] = {
666 + {0x030d, 0x50},
667 + {0x3662, 0x05},
668 + {REG_NULL, 0x00},
669 +};
670 +
671 +static const struct regval op_8bit[] = {
672 + {0x030d, 0x60},
673 + {0x3662, 0x07},
674 + {REG_NULL, 0x00},
675 +};
676 +
677 +static const struct ov9281_mode supported_modes[] = {
678 + {
679 + .width = 1280,
680 + .height = 800,
681 + .exp_def = 0x0320,
682 + .hts_def = 0x05b0, /* 0x2d8*2 */
683 + .vts_def = 0x038e,
684 + .crop = {
685 + .left = 0,
686 + .top = 0,
687 + .width = 1280,
688 + .height = 800
689 + },
690 + .reg_list = ov9281_1280x800_regs,
691 + },
692 + {
693 + .width = 1280,
694 + .height = 720,
695 + .exp_def = 0x0320,
696 + .hts_def = 0x05b0,
697 + .vts_def = 761,
698 + .crop = {
699 + .left = 0,
700 + .top = 40,
701 + .width = 1280,
702 + .height = 720
703 + },
704 + .reg_list = ov9281_1280x720_regs,
705 + },
706 + {
707 + .width = 640,
708 + .height = 400,
709 + .exp_def = 0x0320,
710 + .hts_def = 0x05b0,
711 + .vts_def = 421,
712 + .crop = {
713 + .left = 0,
714 + .top = 0,
715 + .width = 1280,
716 + .height = 800
717 + },
718 + .reg_list = ov9281_640x400_regs,
719 + },
720 +};
721 +
722 +static const s64 link_freq_menu_items[] = {
723 + OV9281_LINK_FREQ_400MHZ
724 +};
725 +
726 +static const char * const ov9281_test_pattern_menu[] = {
727 + "Disabled",
728 + "Vertical Color Bar Type 1",
729 + "Vertical Color Bar Type 2",
730 + "Vertical Color Bar Type 3",
731 + "Vertical Color Bar Type 4"
732 +};
733 +
734 +/* Write registers up to 4 at a time */
735 +static int ov9281_write_reg(struct i2c_client *client, u16 reg,
736 + u32 len, u32 val)
737 +{
738 + u32 buf_i, val_i;
739 + u8 buf[6];
740 + u8 *val_p;
741 + __be32 val_be;
742 +
743 + if (len > 4)
744 + return -EINVAL;
745 +
746 + buf[0] = reg >> 8;
747 + buf[1] = reg & 0xff;
748 +
749 + val_be = cpu_to_be32(val);
750 + val_p = (u8 *)&val_be;
751 + buf_i = 2;
752 + val_i = 4 - len;
753 +
754 + while (val_i < 4)
755 + buf[buf_i++] = val_p[val_i++];
756 +
757 + if (i2c_master_send(client, buf, len + 2) != len + 2)
758 + return -EIO;
759 +
760 + return 0;
761 +}
762 +
763 +static int ov9281_write_array(struct i2c_client *client,
764 + const struct regval *regs)
765 +{
766 + u32 i;
767 + int ret = 0;
768 +
769 + for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++)
770 + ret = ov9281_write_reg(client, regs[i].addr,
771 + OV9281_REG_VALUE_08BIT, regs[i].val);
772 +
773 + return ret;
774 +}
775 +
776 +/* Read registers up to 4 at a time */
777 +static int ov9281_read_reg(struct i2c_client *client, u16 reg, unsigned int len,
778 + u32 *val)
779 +{
780 + struct i2c_msg msgs[2];
781 + u8 *data_be_p;
782 + __be32 data_be = 0;
783 + __be16 reg_addr_be = cpu_to_be16(reg);
784 + int ret;
785 +
786 + if (len > 4 || !len)
787 + return -EINVAL;
788 +
789 + data_be_p = (u8 *)&data_be;
790 + /* Write register address */
791 + msgs[0].addr = client->addr;
792 + msgs[0].flags = 0;
793 + msgs[0].len = 2;
794 + msgs[0].buf = (u8 *)&reg_addr_be;
795 +
796 + /* Read data from register */
797 + msgs[1].addr = client->addr;
798 + msgs[1].flags = I2C_M_RD;
799 + msgs[1].len = len;
800 + msgs[1].buf = &data_be_p[4 - len];
801 +
802 + ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
803 + if (ret != ARRAY_SIZE(msgs))
804 + return -EIO;
805 +
806 + *val = be32_to_cpu(data_be);
807 +
808 + return 0;
809 +}
810 +
811 +static int ov9281_get_reso_dist(const struct ov9281_mode *mode,
812 + struct v4l2_mbus_framefmt *framefmt)
813 +{
814 + return abs(mode->width - framefmt->width) +
815 + abs(mode->height - framefmt->height);
816 +}
817 +
818 +static const struct ov9281_mode *
819 +ov9281_find_best_fit(struct v4l2_subdev_format *fmt)
820 +{
821 + struct v4l2_mbus_framefmt *framefmt = &fmt->format;
822 + int dist;
823 + int cur_best_fit = 0;
824 + int cur_best_fit_dist = -1;
825 + unsigned int i;
826 +
827 + for (i = 0; i < ARRAY_SIZE(supported_modes); i++) {
828 + dist = ov9281_get_reso_dist(&supported_modes[i], framefmt);
829 + if (cur_best_fit_dist == -1 || dist < cur_best_fit_dist) {
830 + cur_best_fit_dist = dist;
831 + cur_best_fit = i;
832 + }
833 + }
834 +
835 + return &supported_modes[cur_best_fit];
836 +}
837 +
838 +static int ov9281_set_fmt(struct v4l2_subdev *sd,
839 + struct v4l2_subdev_state *sd_state,
840 + struct v4l2_subdev_format *fmt)
841 +{
842 + struct ov9281 *ov9281 = to_ov9281(sd);
843 + const struct ov9281_mode *mode;
844 + s64 h_blank, vblank_def, pixel_rate;
845 +
846 + mutex_lock(&ov9281->mutex);
847 +
848 + mode = ov9281_find_best_fit(fmt);
849 + if (fmt->format.code != MEDIA_BUS_FMT_Y8_1X8)
850 + fmt->format.code = MEDIA_BUS_FMT_Y10_1X10;
851 + fmt->format.width = mode->width;
852 + fmt->format.height = mode->height;
853 + fmt->format.field = V4L2_FIELD_NONE;
854 + fmt->format.colorspace = V4L2_COLORSPACE_RAW;
855 + fmt->format.ycbcr_enc =
856 + V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->format.colorspace);
857 + fmt->format.quantization =
858 + V4L2_MAP_QUANTIZATION_DEFAULT(true, fmt->format.colorspace,
859 + fmt->format.ycbcr_enc);
860 + fmt->format.xfer_func =
861 + V4L2_MAP_XFER_FUNC_DEFAULT(fmt->format.colorspace);
862 +
863 + if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
864 + *v4l2_subdev_get_try_format(sd, sd_state, fmt->pad) = fmt->format;
865 + } else {
866 + ov9281->cur_mode = mode;
867 + ov9281->code = fmt->format.code;
868 + h_blank = mode->hts_def - mode->width;
869 + __v4l2_ctrl_modify_range(ov9281->hblank, h_blank,
870 + h_blank, 1, h_blank);
871 + __v4l2_ctrl_s_ctrl(ov9281->hblank, h_blank);
872 + vblank_def = mode->vts_def - mode->height;
873 + __v4l2_ctrl_modify_range(ov9281->vblank, vblank_def,
874 + OV9281_VTS_MAX - mode->height,
875 + 1, vblank_def);
876 + __v4l2_ctrl_s_ctrl(ov9281->vblank, vblank_def);
877 +
878 + pixel_rate = (fmt->format.code == MEDIA_BUS_FMT_Y10_1X10) ?
879 + OV9281_PIXEL_RATE_10BIT : OV9281_PIXEL_RATE_8BIT;
880 + __v4l2_ctrl_modify_range(ov9281->pixel_rate, pixel_rate,
881 + pixel_rate, 1, pixel_rate);
882 + }
883 +
884 + mutex_unlock(&ov9281->mutex);
885 +
886 + return 0;
887 +}
888 +
889 +static int ov9281_get_fmt(struct v4l2_subdev *sd,
890 + struct v4l2_subdev_state *sd_state,
891 + struct v4l2_subdev_format *fmt)
892 +{
893 + struct ov9281 *ov9281 = to_ov9281(sd);
894 + const struct ov9281_mode *mode = ov9281->cur_mode;
895 +
896 + mutex_lock(&ov9281->mutex);
897 + if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
898 + fmt->format = *v4l2_subdev_get_try_format(sd, sd_state,
899 + fmt->pad);
900 + } else {
901 + fmt->format.width = mode->width;
902 + fmt->format.height = mode->height;
903 + fmt->format.code = ov9281->code;
904 + fmt->format.field = V4L2_FIELD_NONE;
905 + fmt->format.colorspace = V4L2_COLORSPACE_RAW;
906 + fmt->format.ycbcr_enc =
907 + V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->format.colorspace);
908 + fmt->format.quantization =
909 + V4L2_MAP_QUANTIZATION_DEFAULT(true,
910 + fmt->format.colorspace,
911 + fmt->format.ycbcr_enc);
912 + fmt->format.xfer_func =
913 + V4L2_MAP_XFER_FUNC_DEFAULT(fmt->format.colorspace);
914 + }
915 + mutex_unlock(&ov9281->mutex);
916 +
917 + return 0;
918 +}
919 +
920 +static int ov9281_enum_mbus_code(struct v4l2_subdev *sd,
921 + struct v4l2_subdev_state *sd_state,
922 + struct v4l2_subdev_mbus_code_enum *code)
923 +{
924 + switch (code->index) {
925 + default:
926 + return -EINVAL;
927 + case 0:
928 + code->code = MEDIA_BUS_FMT_Y10_1X10;
929 + break;
930 + case 1:
931 + code->code = MEDIA_BUS_FMT_Y8_1X8;
932 + break;
933 + }
934 +
935 + return 0;
936 +}
937 +
938 +static int ov9281_enum_frame_sizes(struct v4l2_subdev *sd,
939 + struct v4l2_subdev_state *sd_state,
940 + struct v4l2_subdev_frame_size_enum *fse)
941 +{
942 + if (fse->index >= ARRAY_SIZE(supported_modes))
943 + return -EINVAL;
944 +
945 + if (fse->code != MEDIA_BUS_FMT_Y10_1X10 &&
946 + fse->code != MEDIA_BUS_FMT_Y8_1X8)
947 + return -EINVAL;
948 +
949 + fse->min_width = supported_modes[fse->index].width;
950 + fse->max_width = supported_modes[fse->index].width;
951 + fse->max_height = supported_modes[fse->index].height;
952 + fse->min_height = supported_modes[fse->index].height;
953 +
954 + return 0;
955 +}
956 +
957 +static int ov9281_enable_test_pattern(struct ov9281 *ov9281, u32 pattern)
958 +{
959 + u32 val;
960 +
961 + if (pattern)
962 + val = (pattern - 1) | OV9281_TEST_PATTERN_ENABLE;
963 + else
964 + val = OV9281_TEST_PATTERN_DISABLE;
965 +
966 + return ov9281_write_reg(ov9281->client, OV9281_REG_TEST_PATTERN,
967 + OV9281_REG_VALUE_08BIT, val);
968 +}
969 +
970 +static int ov9281_set_ctrl_hflip(struct ov9281 *ov9281, int value)
971 +{
972 + u32 current_val;
973 + int ret = ov9281_read_reg(ov9281->client, OV9281_REG_TIMING_FORMAT_2,
974 + OV9281_REG_VALUE_08BIT, &current_val);
975 + if (!ret) {
976 + if (value)
977 + current_val |= OV9281_FLIP_BIT;
978 + else
979 + current_val &= ~OV9281_FLIP_BIT;
980 + return ov9281_write_reg(ov9281->client,
981 + OV9281_REG_TIMING_FORMAT_2,
982 + OV9281_REG_VALUE_08BIT,
983 + current_val);
984 + }
985 + return ret;
986 +}
987 +
988 +static int ov9281_set_ctrl_vflip(struct ov9281 *ov9281, int value)
989 +{
990 + u32 current_val;
991 + int ret = ov9281_read_reg(ov9281->client, OV9281_REG_TIMING_FORMAT_1,
992 + OV9281_REG_VALUE_08BIT, &current_val);
993 + if (!ret) {
994 + if (value)
995 + current_val |= OV9281_FLIP_BIT;
996 + else
997 + current_val &= ~OV9281_FLIP_BIT;
998 + return ov9281_write_reg(ov9281->client,
999 + OV9281_REG_TIMING_FORMAT_1,
1000 + OV9281_REG_VALUE_08BIT,
1001 + current_val);
1002 + }
1003 + return ret;
1004 +}
1005 +
1006 +static const struct v4l2_rect *
1007 +__ov9281_get_pad_crop(struct ov9281 *ov9281,
1008 + struct v4l2_subdev_state *sd_state,
1009 + unsigned int pad, enum v4l2_subdev_format_whence which)
1010 +{
1011 + switch (which) {
1012 + case V4L2_SUBDEV_FORMAT_TRY:
1013 + return v4l2_subdev_get_try_crop(&ov9281->subdev, sd_state,
1014 + pad);
1015 + case V4L2_SUBDEV_FORMAT_ACTIVE:
1016 + return &ov9281->cur_mode->crop;
1017 + }
1018 +
1019 + return NULL;
1020 +}
1021 +
1022 +static int ov9281_get_selection(struct v4l2_subdev *sd,
1023 + struct v4l2_subdev_state *sd_state,
1024 + struct v4l2_subdev_selection *sel)
1025 +{
1026 + switch (sel->target) {
1027 + case V4L2_SEL_TGT_CROP: {
1028 + struct ov9281 *ov9281 = to_ov9281(sd);
1029 +
1030 + mutex_lock(&ov9281->mutex);
1031 + sel->r = *__ov9281_get_pad_crop(ov9281, sd_state, sel->pad,
1032 + sel->which);
1033 + mutex_unlock(&ov9281->mutex);
1034 +
1035 + return 0;
1036 + }
1037 +
1038 + case V4L2_SEL_TGT_NATIVE_SIZE:
1039 + sel->r.top = 0;
1040 + sel->r.left = 0;
1041 + sel->r.width = OV9281_NATIVE_WIDTH;
1042 + sel->r.height = OV9281_NATIVE_HEIGHT;
1043 +
1044 + return 0;
1045 +
1046 + case V4L2_SEL_TGT_CROP_DEFAULT:
1047 + case V4L2_SEL_TGT_CROP_BOUNDS:
1048 + sel->r.top = OV9281_PIXEL_ARRAY_TOP;
1049 + sel->r.left = OV9281_PIXEL_ARRAY_LEFT;
1050 + sel->r.width = OV9281_PIXEL_ARRAY_WIDTH;
1051 + sel->r.height = OV9281_PIXEL_ARRAY_HEIGHT;
1052 +
1053 + return 0;
1054 + }
1055 +
1056 + return -EINVAL;
1057 +}
1058 +
1059 +static int __ov9281_start_stream(struct ov9281 *ov9281)
1060 +{
1061 + int ret;
1062 +
1063 + ret = ov9281_write_array(ov9281->client, ov9281_common_regs);
1064 + if (ret)
1065 + return ret;
1066 +
1067 + ret = ov9281_write_array(ov9281->client, ov9281->cur_mode->reg_list);
1068 + if (ret)
1069 + return ret;
1070 +
1071 + if (ov9281->code == MEDIA_BUS_FMT_Y10_1X10)
1072 + ret = ov9281_write_array(ov9281->client, op_10bit);
1073 + else
1074 + ret = ov9281_write_array(ov9281->client, op_8bit);
1075 + if (ret)
1076 + return ret;
1077 +
1078 + /* In case these controls are set before streaming */
1079 + mutex_unlock(&ov9281->mutex);
1080 + ret = v4l2_ctrl_handler_setup(&ov9281->ctrl_handler);
1081 + mutex_lock(&ov9281->mutex);
1082 + if (ret)
1083 + return ret;
1084 +
1085 + return ov9281_write_reg(ov9281->client, OV9281_REG_CTRL_MODE,
1086 + OV9281_REG_VALUE_08BIT, OV9281_MODE_STREAMING);
1087 +}
1088 +
1089 +static int __ov9281_stop_stream(struct ov9281 *ov9281)
1090 +{
1091 + return ov9281_write_reg(ov9281->client, OV9281_REG_CTRL_MODE,
1092 + OV9281_REG_VALUE_08BIT, OV9281_MODE_SW_STANDBY);
1093 +}
1094 +
1095 +static int ov9281_s_stream(struct v4l2_subdev *sd, int on)
1096 +{
1097 + struct ov9281 *ov9281 = to_ov9281(sd);
1098 + struct i2c_client *client = ov9281->client;
1099 + int ret = 0;
1100 +
1101 + mutex_lock(&ov9281->mutex);
1102 + on = !!on;
1103 + if (on == ov9281->streaming)
1104 + goto unlock_and_return;
1105 +
1106 + if (on) {
1107 + ret = pm_runtime_get_sync(&client->dev);
1108 + if (ret < 0) {
1109 + pm_runtime_put_noidle(&client->dev);
1110 + goto unlock_and_return;
1111 + }
1112 +
1113 + ret = __ov9281_start_stream(ov9281);
1114 + if (ret) {
1115 + v4l2_err(sd, "start stream failed while write regs\n");
1116 + pm_runtime_put(&client->dev);
1117 + goto unlock_and_return;
1118 + }
1119 + } else {
1120 + __ov9281_stop_stream(ov9281);
1121 + pm_runtime_put(&client->dev);
1122 + }
1123 +
1124 + ov9281->streaming = on;
1125 +
1126 +unlock_and_return:
1127 + mutex_unlock(&ov9281->mutex);
1128 +
1129 + return ret;
1130 +}
1131 +
1132 +static int ov9281_s_power(struct v4l2_subdev *sd, int on)
1133 +{
1134 + struct ov9281 *ov9281 = to_ov9281(sd);
1135 + struct i2c_client *client = ov9281->client;
1136 + int ret = 0;
1137 +
1138 + mutex_lock(&ov9281->mutex);
1139 +
1140 + /* If the power state is not modified - no work to do. */
1141 + if (ov9281->power_on == !!on)
1142 + goto unlock_and_return;
1143 +
1144 + if (on) {
1145 + ret = pm_runtime_get_sync(&client->dev);
1146 + if (ret < 0) {
1147 + pm_runtime_put_noidle(&client->dev);
1148 + goto unlock_and_return;
1149 + }
1150 + ov9281->power_on = true;
1151 + } else {
1152 + pm_runtime_put(&client->dev);
1153 + ov9281->power_on = false;
1154 + }
1155 +
1156 +unlock_and_return:
1157 + mutex_unlock(&ov9281->mutex);
1158 +
1159 + return ret;
1160 +}
1161 +
1162 +/* Calculate the delay in us by clock rate and clock cycles */
1163 +static inline u32 ov9281_cal_delay(u32 cycles)
1164 +{
1165 + return DIV_ROUND_UP(cycles, OV9281_XVCLK_FREQ / 1000 / 1000);
1166 +}
1167 +
1168 +static int __ov9281_power_on(struct ov9281 *ov9281)
1169 +{
1170 + int ret;
1171 + u32 delay_us;
1172 + struct device *dev = &ov9281->client->dev;
1173 +
1174 + ret = clk_set_rate(ov9281->xvclk, OV9281_XVCLK_FREQ);
1175 + if (ret < 0)
1176 + dev_warn(dev, "Failed to set xvclk rate (24MHz)\n");
1177 + if (clk_get_rate(ov9281->xvclk) != OV9281_XVCLK_FREQ)
1178 + dev_warn(dev, "xvclk mismatched, modes are based on 24MHz - rate is %lu\n",
1179 + clk_get_rate(ov9281->xvclk));
1180 +
1181 + ret = clk_prepare_enable(ov9281->xvclk);
1182 + if (ret < 0) {
1183 + dev_err(dev, "Failed to enable xvclk\n");
1184 + return ret;
1185 + }
1186 +
1187 + if (!IS_ERR(ov9281->reset_gpio))
1188 + gpiod_set_value_cansleep(ov9281->reset_gpio, 0);
1189 +
1190 + ret = regulator_bulk_enable(OV9281_NUM_SUPPLIES, ov9281->supplies);
1191 + if (ret < 0) {
1192 + dev_err(dev, "Failed to enable regulators\n");
1193 + goto disable_clk;
1194 + }
1195 +
1196 + if (!IS_ERR(ov9281->reset_gpio))
1197 + gpiod_set_value_cansleep(ov9281->reset_gpio, 1);
1198 +
1199 + usleep_range(500, 1000);
1200 + if (!IS_ERR(ov9281->pwdn_gpio))
1201 + gpiod_set_value_cansleep(ov9281->pwdn_gpio, 1);
1202 +
1203 + /* 8192 cycles prior to first SCCB transaction */
1204 + delay_us = ov9281_cal_delay(8192);
1205 + usleep_range(delay_us, delay_us * 2);
1206 +
1207 + return 0;
1208 +
1209 +disable_clk:
1210 + clk_disable_unprepare(ov9281->xvclk);
1211 +
1212 + return ret;
1213 +}
1214 +
1215 +static void __ov9281_power_off(struct ov9281 *ov9281)
1216 +{
1217 + if (!IS_ERR(ov9281->pwdn_gpio))
1218 + gpiod_set_value_cansleep(ov9281->pwdn_gpio, 0);
1219 + clk_disable_unprepare(ov9281->xvclk);
1220 + if (!IS_ERR(ov9281->reset_gpio))
1221 + gpiod_set_value_cansleep(ov9281->reset_gpio, 0);
1222 + regulator_bulk_disable(OV9281_NUM_SUPPLIES, ov9281->supplies);
1223 +}
1224 +
1225 +static int ov9281_runtime_resume(struct device *dev)
1226 +{
1227 + struct i2c_client *client = to_i2c_client(dev);
1228 + struct v4l2_subdev *sd = i2c_get_clientdata(client);
1229 + struct ov9281 *ov9281 = to_ov9281(sd);
1230 +
1231 + return __ov9281_power_on(ov9281);
1232 +}
1233 +
1234 +static int ov9281_runtime_suspend(struct device *dev)
1235 +{
1236 + struct i2c_client *client = to_i2c_client(dev);
1237 + struct v4l2_subdev *sd = i2c_get_clientdata(client);
1238 + struct ov9281 *ov9281 = to_ov9281(sd);
1239 +
1240 + __ov9281_power_off(ov9281);
1241 +
1242 + return 0;
1243 +}
1244 +
1245 +static int ov9281_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
1246 +{
1247 + struct ov9281 *ov9281 = to_ov9281(sd);
1248 + struct v4l2_mbus_framefmt *try_fmt =
1249 + v4l2_subdev_get_try_format(sd, fh->state, 0);
1250 + const struct ov9281_mode *def_mode = &supported_modes[0];
1251 +
1252 + mutex_lock(&ov9281->mutex);
1253 + /* Initialize try_fmt */
1254 + try_fmt->width = def_mode->width;
1255 + try_fmt->height = def_mode->height;
1256 + try_fmt->code = MEDIA_BUS_FMT_Y10_1X10;
1257 + try_fmt->field = V4L2_FIELD_NONE;
1258 + try_fmt->colorspace = V4L2_COLORSPACE_RAW;
1259 + try_fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(try_fmt->colorspace);
1260 + try_fmt->quantization =
1261 + V4L2_MAP_QUANTIZATION_DEFAULT(true, try_fmt->colorspace,
1262 + try_fmt->ycbcr_enc);
1263 + try_fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(try_fmt->colorspace);
1264 +
1265 + mutex_unlock(&ov9281->mutex);
1266 + /* No crop or compose */
1267 +
1268 + return 0;
1269 +}
1270 +
1271 +static const struct dev_pm_ops ov9281_pm_ops = {
1272 + SET_RUNTIME_PM_OPS(ov9281_runtime_suspend,
1273 + ov9281_runtime_resume, NULL)
1274 +};
1275 +
1276 +static const struct v4l2_subdev_internal_ops ov9281_internal_ops = {
1277 + .open = ov9281_open,
1278 +};
1279 +
1280 +static const struct v4l2_subdev_core_ops ov9281_core_ops = {
1281 + .s_power = ov9281_s_power,
1282 +};
1283 +
1284 +static const struct v4l2_subdev_video_ops ov9281_video_ops = {
1285 + .s_stream = ov9281_s_stream,
1286 +};
1287 +
1288 +static const struct v4l2_subdev_pad_ops ov9281_pad_ops = {
1289 + .enum_mbus_code = ov9281_enum_mbus_code,
1290 + .enum_frame_size = ov9281_enum_frame_sizes,
1291 + .get_fmt = ov9281_get_fmt,
1292 + .set_fmt = ov9281_set_fmt,
1293 + .get_selection = ov9281_get_selection,
1294 +};
1295 +
1296 +static const struct v4l2_subdev_ops ov9281_subdev_ops = {
1297 + .core = &ov9281_core_ops,
1298 + .video = &ov9281_video_ops,
1299 + .pad = &ov9281_pad_ops,
1300 +};
1301 +
1302 +static int ov9281_set_ctrl(struct v4l2_ctrl *ctrl)
1303 +{
1304 + struct ov9281 *ov9281 = container_of(ctrl->handler,
1305 + struct ov9281, ctrl_handler);
1306 + struct i2c_client *client = ov9281->client;
1307 + s64 max;
1308 + int ret = 0;
1309 +
1310 + /* Propagate change of current control to all related controls */
1311 + switch (ctrl->id) {
1312 + case V4L2_CID_VBLANK:
1313 + /* Update max exposure while meeting expected vblanking */
1314 + max = ov9281->cur_mode->height + ctrl->val - 4;
1315 + __v4l2_ctrl_modify_range(ov9281->exposure,
1316 + ov9281->exposure->minimum, max,
1317 + ov9281->exposure->step,
1318 + ov9281->exposure->default_value);
1319 + break;
1320 + }
1321 +
1322 + if (pm_runtime_get(&client->dev) <= 0)
1323 + return 0;
1324 +
1325 + switch (ctrl->id) {
1326 + case V4L2_CID_HFLIP:
1327 + ret = ov9281_set_ctrl_hflip(ov9281, ctrl->val);
1328 + break;
1329 + case V4L2_CID_VFLIP:
1330 + ret = ov9281_set_ctrl_vflip(ov9281, ctrl->val);
1331 + break;
1332 + case V4L2_CID_EXPOSURE:
1333 + /* 4 least significant bits of expsoure are fractional part */
1334 + ret = ov9281_write_reg(ov9281->client, OV9281_REG_EXPOSURE,
1335 + OV9281_REG_VALUE_24BIT, ctrl->val << 4);
1336 + break;
1337 + case V4L2_CID_ANALOGUE_GAIN:
1338 + ret = ov9281_write_reg(ov9281->client, OV9281_REG_GAIN_H,
1339 + OV9281_REG_VALUE_08BIT,
1340 + (ctrl->val >> OV9281_GAIN_H_SHIFT) &
1341 + OV9281_GAIN_H_MASK);
1342 + ret |= ov9281_write_reg(ov9281->client, OV9281_REG_GAIN_L,
1343 + OV9281_REG_VALUE_08BIT,
1344 + ctrl->val & OV9281_GAIN_L_MASK);
1345 + break;
1346 + case V4L2_CID_VBLANK:
1347 + ret = ov9281_write_reg(ov9281->client, OV9281_REG_VTS,
1348 + OV9281_REG_VALUE_16BIT,
1349 + ctrl->val + ov9281->cur_mode->height);
1350 + break;
1351 + case V4L2_CID_TEST_PATTERN:
1352 + ret = ov9281_enable_test_pattern(ov9281, ctrl->val);
1353 + break;
1354 + default:
1355 + dev_warn(&client->dev, "%s Unhandled id:0x%x, val:0x%x\n",
1356 + __func__, ctrl->id, ctrl->val);
1357 + break;
1358 + }
1359 +
1360 + pm_runtime_put(&client->dev);
1361 +
1362 + return ret;
1363 +}
1364 +
1365 +static const struct v4l2_ctrl_ops ov9281_ctrl_ops = {
1366 + .s_ctrl = ov9281_set_ctrl,
1367 +};
1368 +
1369 +static int ov9281_initialize_controls(struct ov9281 *ov9281)
1370 +{
1371 + struct v4l2_fwnode_device_properties props;
1372 + const struct ov9281_mode *mode;
1373 + struct v4l2_ctrl_handler *handler;
1374 + struct v4l2_ctrl *ctrl;
1375 + s64 exposure_max, vblank_def;
1376 + u32 h_blank;
1377 + int ret;
1378 +
1379 + handler = &ov9281->ctrl_handler;
1380 + mode = ov9281->cur_mode;
1381 + ret = v4l2_ctrl_handler_init(handler, 11);
1382 + if (ret)
1383 + return ret;
1384 + handler->lock = &ov9281->mutex;
1385 +
1386 + ctrl = v4l2_ctrl_new_int_menu(handler, NULL, V4L2_CID_LINK_FREQ,
1387 + 0, 0, link_freq_menu_items);
1388 + if (ctrl)
1389 + ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1390 +
1391 + ov9281->pixel_rate = v4l2_ctrl_new_std(handler, NULL,
1392 + V4L2_CID_PIXEL_RATE,
1393 + OV9281_PIXEL_RATE_10BIT,
1394 + OV9281_PIXEL_RATE_10BIT, 1,
1395 + OV9281_PIXEL_RATE_10BIT);
1396 +
1397 + h_blank = mode->hts_def - mode->width;
1398 + ov9281->hblank = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK,
1399 + h_blank, h_blank, 1, h_blank);
1400 + if (ov9281->hblank)
1401 + ov9281->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1402 +
1403 + vblank_def = mode->vts_def - mode->height;
1404 + ov9281->vblank = v4l2_ctrl_new_std(handler, &ov9281_ctrl_ops,
1405 + V4L2_CID_VBLANK, vblank_def,
1406 + OV9281_VTS_MAX - mode->height, 1,
1407 + vblank_def);
1408 +
1409 + exposure_max = mode->vts_def - 4;
1410 + ov9281->exposure = v4l2_ctrl_new_std(handler, &ov9281_ctrl_ops,
1411 + V4L2_CID_EXPOSURE,
1412 + OV9281_EXPOSURE_MIN, exposure_max,
1413 + OV9281_EXPOSURE_STEP,
1414 + mode->exp_def);
1415 +
1416 + ov9281->anal_gain = v4l2_ctrl_new_std(handler, &ov9281_ctrl_ops,
1417 + V4L2_CID_ANALOGUE_GAIN,
1418 + OV9281_GAIN_MIN, OV9281_GAIN_MAX,
1419 + OV9281_GAIN_STEP,
1420 + OV9281_GAIN_DEFAULT);
1421 +
1422 + ov9281->vflip = v4l2_ctrl_new_std(handler, &ov9281_ctrl_ops,
1423 + V4L2_CID_VFLIP,
1424 + 0, 1, 1, 0);
1425 +
1426 + ov9281->hflip = v4l2_ctrl_new_std(handler, &ov9281_ctrl_ops,
1427 + V4L2_CID_HFLIP,
1428 + 0, 1, 1, 0);
1429 +
1430 + ov9281->test_pattern =
1431 + v4l2_ctrl_new_std_menu_items(handler, &ov9281_ctrl_ops,
1432 + V4L2_CID_TEST_PATTERN,
1433 + ARRAY_SIZE(ov9281_test_pattern_menu) - 1,
1434 + 0, 0, ov9281_test_pattern_menu);
1435 +
1436 + if (handler->error) {
1437 + ret = handler->error;
1438 + dev_err(&ov9281->client->dev,
1439 + "Failed to init controls(%d)\n", ret);
1440 + goto err_free_handler;
1441 + }
1442 +
1443 + ret = v4l2_fwnode_device_parse(&ov9281->client->dev, &props);
1444 + if (ret)
1445 + goto err_free_handler;
1446 +
1447 + ret = v4l2_ctrl_new_fwnode_properties(handler, &ov9281_ctrl_ops,
1448 + &props);
1449 + if (ret)
1450 + goto err_free_handler;
1451 +
1452 + ov9281->subdev.ctrl_handler = handler;
1453 +
1454 + return 0;
1455 +
1456 +err_free_handler:
1457 + v4l2_ctrl_handler_free(handler);
1458 +
1459 + return ret;
1460 +}
1461 +
1462 +static int ov9281_check_sensor_id(struct ov9281 *ov9281,
1463 + struct i2c_client *client)
1464 +{
1465 + struct device *dev = &ov9281->client->dev;
1466 + u32 id = 0, id_msb;
1467 + int ret;
1468 +
1469 + ret = ov9281_read_reg(client, OV9281_REG_CHIP_ID + 1,
1470 + OV9281_REG_VALUE_08BIT, &id);
1471 + if (!ret)
1472 + ret = ov9281_read_reg(client, OV9281_REG_CHIP_ID,
1473 + OV9281_REG_VALUE_08BIT, &id_msb);
1474 + id |= (id_msb << 8);
1475 + if (ret || id != CHIP_ID) {
1476 + dev_err(dev, "Unexpected sensor id(%04x), ret(%d)\n", id, ret);
1477 + return -ENODEV;
1478 + }
1479 +
1480 + dev_info(dev, "Detected OV%06x sensor\n", CHIP_ID);
1481 +
1482 + return 0;
1483 +}
1484 +
1485 +static int ov9281_configure_regulators(struct ov9281 *ov9281)
1486 +{
1487 + unsigned int i;
1488 +
1489 + for (i = 0; i < OV9281_NUM_SUPPLIES; i++)
1490 + ov9281->supplies[i].supply = ov9281_supply_names[i];
1491 +
1492 + return devm_regulator_bulk_get(&ov9281->client->dev,
1493 + OV9281_NUM_SUPPLIES,
1494 + ov9281->supplies);
1495 +}
1496 +
1497 +static int ov9281_probe(struct i2c_client *client,
1498 + const struct i2c_device_id *id)
1499 +{
1500 + struct device *dev = &client->dev;
1501 + struct ov9281 *ov9281;
1502 + struct v4l2_subdev *sd;
1503 + int ret;
1504 +
1505 + ov9281 = devm_kzalloc(dev, sizeof(*ov9281), GFP_KERNEL);
1506 + if (!ov9281)
1507 + return -ENOMEM;
1508 +
1509 + ov9281->client = client;
1510 + ov9281->cur_mode = &supported_modes[0];
1511 +
1512 + ov9281->xvclk = devm_clk_get(dev, "xvclk");
1513 + if (IS_ERR(ov9281->xvclk)) {
1514 + dev_err(dev, "Failed to get xvclk\n");
1515 + return -EINVAL;
1516 + }
1517 +
1518 + ov9281->reset_gpio = devm_gpiod_get_optional(dev, "reset",
1519 + GPIOD_OUT_LOW);
1520 + if (IS_ERR(ov9281->reset_gpio))
1521 + dev_warn(dev, "Failed to get reset-gpios\n");
1522 +
1523 + ov9281->pwdn_gpio = devm_gpiod_get_optional(dev, "pwdn", GPIOD_OUT_LOW);
1524 + if (IS_ERR(ov9281->pwdn_gpio))
1525 + dev_warn(dev, "Failed to get pwdn-gpios\n");
1526 +
1527 + ret = ov9281_configure_regulators(ov9281);
1528 + if (ret) {
1529 + dev_err(dev, "Failed to get power regulators\n");
1530 + return ret;
1531 + }
1532 +
1533 + mutex_init(&ov9281->mutex);
1534 +
1535 + sd = &ov9281->subdev;
1536 + v4l2_i2c_subdev_init(sd, client, &ov9281_subdev_ops);
1537 + ret = ov9281_initialize_controls(ov9281);
1538 + if (ret)
1539 + goto err_destroy_mutex;
1540 +
1541 + ret = __ov9281_power_on(ov9281);
1542 + if (ret)
1543 + goto err_free_handler;
1544 +
1545 + ret = ov9281_check_sensor_id(ov9281, client);
1546 + if (ret)
1547 + goto err_power_off;
1548 +
1549 + sd->internal_ops = &ov9281_internal_ops;
1550 + sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1551 +
1552 + ov9281->pad.flags = MEDIA_PAD_FL_SOURCE;
1553 + sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
1554 + ret = media_entity_pads_init(&sd->entity, 1, &ov9281->pad);
1555 + if (ret < 0)
1556 + goto err_power_off;
1557 +
1558 + ret = v4l2_async_register_subdev_sensor(sd);
1559 + if (ret) {
1560 + dev_err(dev, "v4l2 async register subdev failed\n");
1561 + goto err_clean_entity;
1562 + }
1563 +
1564 + pm_runtime_set_active(dev);
1565 + pm_runtime_enable(dev);
1566 + pm_runtime_idle(dev);
1567 +
1568 + return 0;
1569 +
1570 +err_clean_entity:
1571 + media_entity_cleanup(&sd->entity);
1572 +err_power_off:
1573 + __ov9281_power_off(ov9281);
1574 +err_free_handler:
1575 + v4l2_ctrl_handler_free(&ov9281->ctrl_handler);
1576 +err_destroy_mutex:
1577 + mutex_destroy(&ov9281->mutex);
1578 +
1579 + return ret;
1580 +}
1581 +
1582 +static void ov9281_remove(struct i2c_client *client)
1583 +{
1584 + struct v4l2_subdev *sd = i2c_get_clientdata(client);
1585 + struct ov9281 *ov9281 = to_ov9281(sd);
1586 +
1587 + v4l2_async_unregister_subdev(sd);
1588 + media_entity_cleanup(&sd->entity);
1589 + v4l2_ctrl_handler_free(&ov9281->ctrl_handler);
1590 + mutex_destroy(&ov9281->mutex);
1591 +
1592 + pm_runtime_disable(&client->dev);
1593 + if (!pm_runtime_status_suspended(&client->dev))
1594 + __ov9281_power_off(ov9281);
1595 + pm_runtime_set_suspended(&client->dev);
1596 +}
1597 +
1598 +static const struct of_device_id ov9281_of_match[] = {
1599 + { .compatible = "ovti,ov9281" },
1600 + {},
1601 +};
1602 +MODULE_DEVICE_TABLE(of, ov9281_of_match);
1603 +
1604 +static const struct i2c_device_id ov9281_match_id[] = {
1605 + { "ovti,ov9281", 0 },
1606 + { },
1607 +};
1608 +
1609 +static struct i2c_driver ov9281_i2c_driver = {
1610 + .driver = {
1611 + .name = OV9281_NAME,
1612 + .pm = &ov9281_pm_ops,
1613 + .of_match_table = of_match_ptr(ov9281_of_match),
1614 + },
1615 + .probe = &ov9281_probe,
1616 + .remove = &ov9281_remove,
1617 + .id_table = ov9281_match_id,
1618 +};
1619 +
1620 +static int __init sensor_mod_init(void)
1621 +{
1622 + return i2c_add_driver(&ov9281_i2c_driver);
1623 +}
1624 +
1625 +static void __exit sensor_mod_exit(void)
1626 +{
1627 + i2c_del_driver(&ov9281_i2c_driver);
1628 +}
1629 +
1630 +device_initcall_sync(sensor_mod_init);
1631 +module_exit(sensor_mod_exit);
1632 +
1633 +MODULE_DESCRIPTION("OmniVision ov9281 sensor driver");
1634 +MODULE_LICENSE("GPL v2");
1635 --- a/drivers/media/platform/bcm2835/bcm2835-unicam.c
1636 +++ b/drivers/media/platform/bcm2835/bcm2835-unicam.c
1637 @@ -443,7 +443,7 @@ struct unicam_device {
1638 /* ptr to sub device */
1639 struct v4l2_subdev *sensor;
1640 /* Pad config for the sensor */
1641 - struct v4l2_subdev_pad_config *sensor_config;
1642 + struct v4l2_subdev_state *sensor_state;
1643
1644 enum v4l2_mbus_type bus_type;
1645 /*
1646 @@ -594,7 +594,7 @@ static int __subdev_get_format(struct un
1647 };
1648 int ret;
1649
1650 - ret = v4l2_subdev_call(dev->sensor, pad, get_fmt, dev->sensor_config,
1651 + ret = v4l2_subdev_call(dev->sensor, pad, get_fmt, dev->sensor_state,
1652 &sd_fmt);
1653 if (ret < 0)
1654 return ret;
1655 @@ -618,7 +618,7 @@ static int __subdev_set_format(struct un
1656
1657 sd_fmt.format = *fmt;
1658
1659 - ret = v4l2_subdev_call(dev->sensor, pad, set_fmt, dev->sensor_config,
1660 + ret = v4l2_subdev_call(dev->sensor, pad, set_fmt, dev->sensor_state,
1661 &sd_fmt);
1662 if (ret < 0)
1663 return ret;
1664 @@ -1094,7 +1094,7 @@ static int unicam_try_fmt_vid_cap(struct
1665 */
1666 mbus_fmt->field = V4L2_FIELD_NONE;
1667
1668 - ret = v4l2_subdev_call(dev->sensor, pad, set_fmt, dev->sensor_config,
1669 + ret = v4l2_subdev_call(dev->sensor, pad, set_fmt, dev->sensor_state,
1670 &sd_fmt);
1671 if (ret && ret != -ENOIOCTLCMD && ret != -ENODEV)
1672 return ret;
1673 @@ -1116,7 +1116,7 @@ static int unicam_try_fmt_vid_cap(struct
1674 mbus_fmt->code = fmt->code;
1675
1676 ret = v4l2_subdev_call(dev->sensor, pad, set_fmt,
1677 - dev->sensor_config, &sd_fmt);
1678 + dev->sensor_state, &sd_fmt);
1679 if (ret && ret != -ENOIOCTLCMD && ret != -ENODEV)
1680 return ret;
1681
1682 @@ -2320,8 +2320,8 @@ static void unicam_release(struct kref *
1683 v4l2_ctrl_handler_free(&unicam->ctrl_handler);
1684 media_device_cleanup(&unicam->mdev);
1685
1686 - if (unicam->sensor_config)
1687 - v4l2_subdev_free_pad_config(unicam->sensor_config);
1688 + if (unicam->sensor_state)
1689 + __v4l2_subdev_state_free(unicam->sensor_state);
1690
1691 kfree(unicam);
1692 }
1693 @@ -2579,12 +2579,14 @@ static void unregister_nodes(struct unic
1694
1695 static int unicam_probe_complete(struct unicam_device *unicam)
1696 {
1697 + static struct lock_class_key key;
1698 int ret;
1699
1700 unicam->v4l2_dev.notify = unicam_notify;
1701
1702 - unicam->sensor_config = v4l2_subdev_alloc_pad_config(unicam->sensor);
1703 - if (!unicam->sensor_config)
1704 + unicam->sensor_state = __v4l2_subdev_state_alloc(unicam->sensor,
1705 + "unicam:async->lock", &key);
1706 + if (!unicam->sensor_state)
1707 return -ENOMEM;
1708
1709 unicam->sensor_embedded_data = (unicam->sensor->entity.num_pads >= 2);
1710 --- a/drivers/staging/vc04_services/bcm2835-isp/bcm2835-v4l2-isp.c
1711 +++ b/drivers/staging/vc04_services/bcm2835-isp/bcm2835-v4l2-isp.c
1712 @@ -1465,7 +1465,7 @@ queue_cleanup:
1713 }
1714
1715 /* Unregister one of the /dev/video<N> nodes associated with the ISP. */
1716 -static void unregister_node(struct bcm2835_isp_node *node)
1717 +static void bcm2835_unregister_node(struct bcm2835_isp_node *node)
1718 {
1719 struct bcm2835_isp_dev *dev = node_get_dev(node);
1720
1721 @@ -1668,7 +1668,7 @@ static int bcm2835_isp_remove(struct pla
1722 media_controller_unregister(dev);
1723
1724 for (i = 0; i < BCM2835_ISP_NUM_NODES; i++)
1725 - unregister_node(&dev->node[i]);
1726 + bcm2835_unregister_node(&dev->node[i]);
1727
1728 v4l2_device_unregister(&dev->v4l2_dev);
1729