target/linux/ath79/patches-5.15/314-MIPS-ath79-remove-irq-code-from-pci.patch

   1 From: John Crispin <john@phrozen.org>
   2 Subject: ath79: fix remove irq code from pci driver patch
   3
   4 This patch got mangled in the void while rebasing it.
   5
   6 Submitted-by: John Crispin <john@phrozen.org>
   7 ---
   8  arch/mips/pci/pci-ar71xx.c                    | 107 ------------------
   9  1 file changed, 141 deletions(-)
  10
  11 --- a/arch/mips/pci/pci-ar71xx.c
  12 +++ b/arch/mips/pci/pci-ar71xx.c
  13 @@ -51,11 +51,9 @@
  14  struct ar71xx_pci_controller {
  15         struct device_node *np;
  16         void __iomem *cfg_base;
  17 -       int irq;
  18         struct pci_controller pci_ctrl;
  19         struct resource io_res;
  20         struct resource mem_res;
  21 -       struct irq_domain *domain;
  22  };
  23
  24  /* Byte lane enable bits */
  25 @@ -227,104 +225,6 @@ static struct pci_ops ar71xx_pci_ops = {
  26         .write  = ar71xx_pci_write_config,
  27  };
  28
  29 -static void ar71xx_pci_irq_handler(struct irq_desc *desc)
  30 -{
  31 -       void __iomem *base = ath79_reset_base;
  32 -       struct irq_chip *chip = irq_desc_get_chip(desc);
  33 -       struct ar71xx_pci_controller *apc = irq_desc_get_handler_data(desc);
  34 -       u32 pending;
  35 -
  36 -       chained_irq_enter(chip, desc);
  37 -       pending = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_STATUS) &
  38 -                 __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
  39 -
  40 -       if (pending & AR71XX_PCI_INT_DEV0)
  41 -               generic_handle_irq(irq_linear_revmap(apc->domain, 1));
  42 -
  43 -       else if (pending & AR71XX_PCI_INT_DEV1)
  44 -               generic_handle_irq(irq_linear_revmap(apc->domain, 2));
  45 -
  46 -       else if (pending & AR71XX_PCI_INT_DEV2)
  47 -               generic_handle_irq(irq_linear_revmap(apc->domain, 3));
  48 -
  49 -       else if (pending & AR71XX_PCI_INT_CORE)
  50 -               generic_handle_irq(irq_linear_revmap(apc->domain, 4));
  51 -
  52 -       else
  53 -               spurious_interrupt();
  54 -       chained_irq_exit(chip, desc);
  55 -}
  56 -
  57 -static void ar71xx_pci_irq_unmask(struct irq_data *d)
  58 -{
  59 -       struct ar71xx_pci_controller *apc;
  60 -       unsigned int irq;
  61 -       void __iomem *base = ath79_reset_base;
  62 -       u32 t;
  63 -
  64 -       apc = irq_data_get_irq_chip_data(d);
  65 -       irq = irq_linear_revmap(apc->domain, d->irq);
  66 -
  67 -       t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
  68 -       __raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE);
  69 -
  70 -       /* flush write */
  71 -       __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
  72 -}
  73 -
  74 -static void ar71xx_pci_irq_mask(struct irq_data *d)
  75 -{
  76 -       struct ar71xx_pci_controller *apc;
  77 -       unsigned int irq;
  78 -       void __iomem *base = ath79_reset_base;
  79 -       u32 t;
  80 -
  81 -       apc = irq_data_get_irq_chip_data(d);
  82 -       irq = irq_linear_revmap(apc->domain, d->irq);
  83 -
  84 -       t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
  85 -       __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE);
  86 -
  87 -       /* flush write */
  88 -       __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
  89 -}
  90 -
  91 -static struct irq_chip ar71xx_pci_irq_chip = {
  92 -       .name           = "AR71XX PCI",
  93 -       .irq_mask       = ar71xx_pci_irq_mask,
  94 -       .irq_unmask     = ar71xx_pci_irq_unmask,
  95 -       .irq_mask_ack   = ar71xx_pci_irq_mask,
  96 -};
  97 -
  98 -static int ar71xx_pci_irq_map(struct irq_domain *d,
  99 -                             unsigned int irq, irq_hw_number_t hw)
 100 -{
 101 -       struct ar71xx_pci_controller *apc = d->host_data;
 102 -
 103 -       irq_set_chip_and_handler(irq, &ar71xx_pci_irq_chip, handle_level_irq);
 104 -       irq_set_chip_data(irq, apc);
 105 -
 106 -       return 0;
 107 -}
 108 -
 109 -static const struct irq_domain_ops ar71xx_pci_domain_ops = {
 110 -       .xlate = irq_domain_xlate_onecell,
 111 -       .map = ar71xx_pci_irq_map,
 112 -};
 113 -
 114 -static void ar71xx_pci_irq_init(struct ar71xx_pci_controller *apc)
 115 -{
 116 -       void __iomem *base = ath79_reset_base;
 117 -
 118 -       __raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_ENABLE);
 119 -       __raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_STATUS);
 120 -
 121 -       apc->domain = irq_domain_add_linear(apc->np, AR71XX_PCI_IRQ_COUNT,
 122 -                                           &ar71xx_pci_domain_ops, apc);
 123 -       irq_set_chained_handler_and_data(apc->irq, ar71xx_pci_irq_handler,
 124 -                                        apc);
 125 -}
 126 -
 127  static void ar71xx_pci_reset(void)
 128  {
 129         ath79_device_reset_set(AR71XX_RESET_PCI_BUS | AR71XX_RESET_PCI_CORE);
 130 @@ -357,10 +257,6 @@ static int ar71xx_pci_probe(struct platf
 131         if (IS_ERR(apc->cfg_base))
 132                 return PTR_ERR(apc->cfg_base);
 133
 134 -       apc->irq = platform_get_irq(pdev, 0);
 135 -       if (apc->irq < 0)
 136 -               return -EINVAL;
 137 -
 138         ar71xx_pci_reset();
 139
 140         /* setup COMMAND register */
 141 @@ -371,8 +267,6 @@ static int ar71xx_pci_probe(struct platf
 142         /* clear bus errors */
 143         ar71xx_pci_check_error(apc, 1);
 144
 145 -       ar71xx_pci_irq_init(apc);
 146 -
 147         apc->np = pdev->dev.of_node;
 148         apc->pci_ctrl.pci_ops = &ar71xx_pci_ops;
 149         apc->pci_ctrl.mem_resource = &apc->mem_res;