package/boot/uboot-mediatek/patches/006-mt7623-pinctrl-fix.patch

   1 From e05fdd93645dab2217bb5bfabcc04845415cf7ed Mon Sep 17 00:00:00 2001
   2 From: David Woodhouse <dwmw2@infradead.org>
   3 Date: Fri, 19 Jun 2020 12:40:20 +0100
   4 Subject: [PATCH] pinctrl: mediatek: add PUPD/R0/R1 support for MT7623
   5
   6 The pins for the MMC controller weren't being set up correctly because the
   7 pinctrl driver only sets the GPIO pullup/pulldown config and doesn't
   8 handle the special cases with PUPD/R0/R1 control.
   9
  10 Signed-off-by: David Woodhouse <dwmw2@infradead.org>
  11 Tested-by: Frank Wunderlich <frank-w@public-files.de>
  12 ---
  13  drivers/pinctrl/mediatek/pinctrl-mt7623.c     | 129 ++++++++++++++++++
  14  drivers/pinctrl/mediatek/pinctrl-mtk-common.c |  19 ++-
  15  drivers/pinctrl/mediatek/pinctrl-mtk-common.h |   3 +
  16  3 files changed, 146 insertions(+), 5 deletions(-)
  17
  18 diff --git a/drivers/pinctrl/mediatek/pinctrl-mt7623.c b/drivers/pinctrl/mediatek/pinctrl-mt7623.c
  19 index d58d840e08..0f5dcb2c63 100644
  20 --- a/drivers/pinctrl/mediatek/pinctrl-mt7623.c
  21 +++ b/drivers/pinctrl/mediatek/pinctrl-mt7623.c
  22 @@ -262,6 +262,132 @@ static const struct mtk_pin_field_calc mt7623_pin_drv_range[] = {
  23         PIN_FIELD16(278, 278, 0xf70, 0x10, 8, 4),
  24  };
  25
  26 +static const struct mtk_pin_field_calc mt7623_pin_pupd_range[] = {
  27 +       /* MSDC0 */
  28 +       PIN_FIELD16(111, 111, 0xd00, 0x10, 12, 1),
  29 +       PIN_FIELD16(112, 112, 0xd00, 0x10, 8, 1),
  30 +       PIN_FIELD16(113, 113, 0xd00, 0x10, 4, 1),
  31 +       PIN_FIELD16(114, 114, 0xd00, 0x10, 0, 1),
  32 +       PIN_FIELD16(115, 115, 0xd10, 0x10, 0, 1),
  33 +       PIN_FIELD16(116, 116, 0xcd0, 0x10, 8, 1),
  34 +       PIN_FIELD16(117, 117, 0xcc0, 0x10, 8, 1),
  35 +       PIN_FIELD16(118, 118, 0xcf0, 0x10, 12, 1),
  36 +       PIN_FIELD16(119, 119, 0xcf0, 0x10, 8, 1),
  37 +       PIN_FIELD16(120, 120, 0xcf0, 0x10, 4, 1),
  38 +       PIN_FIELD16(121, 121, 0xcf0, 0x10, 0, 1),
  39 +       /* MSDC1 */
  40 +       PIN_FIELD16(105, 105, 0xd40, 0x10, 8, 1),
  41 +       PIN_FIELD16(106, 106, 0xd30, 0x10, 8, 1),
  42 +       PIN_FIELD16(107, 107, 0xd60, 0x10, 0, 1),
  43 +       PIN_FIELD16(108, 108, 0xd60, 0x10, 10, 1),
  44 +       PIN_FIELD16(109, 109, 0xd60, 0x10, 4, 1),
  45 +       PIN_FIELD16(110, 110, 0xc60, 0x10, 12, 1),
  46 +       /* MSDC1 */
  47 +       PIN_FIELD16(85, 85, 0xda0, 0x10, 8, 1),
  48 +       PIN_FIELD16(86, 86, 0xd90, 0x10, 8, 1),
  49 +       PIN_FIELD16(87, 87, 0xdc0, 0x10, 0, 1),
  50 +       PIN_FIELD16(88, 88, 0xdc0, 0x10, 10, 1),
  51 +       PIN_FIELD16(89, 89, 0xdc0, 0x10, 4, 1),
  52 +       PIN_FIELD16(90, 90, 0xdc0, 0x10, 12, 1),
  53 +       /* MSDC0E */
  54 +       PIN_FIELD16(249, 249, 0x140, 0x10, 0, 1),
  55 +       PIN_FIELD16(250, 250, 0x130, 0x10, 12, 1),
  56 +       PIN_FIELD16(251, 251, 0x130, 0x10, 8, 1),
  57 +       PIN_FIELD16(252, 252, 0x130, 0x10, 4, 1),
  58 +       PIN_FIELD16(253, 253, 0x130, 0x10, 0, 1),
  59 +       PIN_FIELD16(254, 254, 0xf40, 0x10, 12, 1),
  60 +       PIN_FIELD16(255, 255, 0xf40, 0x10, 8, 1),
  61 +       PIN_FIELD16(256, 256, 0xf40, 0x10, 4, 1),
  62 +       PIN_FIELD16(257, 257, 0xf40, 0x10, 0, 1),
  63 +       PIN_FIELD16(258, 258, 0xcb0, 0x10, 8, 1),
  64 +       PIN_FIELD16(259, 259, 0xc90, 0x10, 8, 1),
  65 +       PIN_FIELD16(261, 261, 0x140, 0x10, 8, 1),
  66 +};
  67 +
  68 +static const struct mtk_pin_field_calc mt7623_pin_r1_range[] = {
  69 +       /* MSDC0 */
  70 +       PIN_FIELD16(111, 111, 0xd00, 0x10, 13, 1),
  71 +       PIN_FIELD16(112, 112, 0xd00, 0x10, 9, 1),
  72 +       PIN_FIELD16(113, 113, 0xd00, 0x10, 5, 1),
  73 +       PIN_FIELD16(114, 114, 0xd00, 0x10, 1, 1),
  74 +       PIN_FIELD16(115, 115, 0xd10, 0x10, 1, 1),
  75 +       PIN_FIELD16(116, 116, 0xcd0, 0x10, 9, 1),
  76 +       PIN_FIELD16(117, 117, 0xcc0, 0x10, 9, 1),
  77 +       PIN_FIELD16(118, 118, 0xcf0, 0x10, 13, 1),
  78 +       PIN_FIELD16(119, 119, 0xcf0, 0x10, 9, 1),
  79 +       PIN_FIELD16(120, 120, 0xcf0, 0x10, 5, 1),
  80 +       PIN_FIELD16(121, 121, 0xcf0, 0x10, 1, 1),
  81 +       /* MSDC1 */
  82 +       PIN_FIELD16(105, 105, 0xd40, 0x10, 9, 1),
  83 +       PIN_FIELD16(106, 106, 0xd30, 0x10, 9, 1),
  84 +       PIN_FIELD16(107, 107, 0xd60, 0x10, 1, 1),
  85 +       PIN_FIELD16(108, 108, 0xd60, 0x10, 9, 1),
  86 +       PIN_FIELD16(109, 109, 0xd60, 0x10, 5, 1),
  87 +       PIN_FIELD16(110, 110, 0xc60, 0x10, 13, 1),
  88 +       /* MSDC2 */
  89 +       PIN_FIELD16(85, 85, 0xda0, 0x10, 9, 1),
  90 +       PIN_FIELD16(86, 86, 0xd90, 0x10, 9, 1),
  91 +       PIN_FIELD16(87, 87, 0xdc0, 0x10, 1, 1),
  92 +       PIN_FIELD16(88, 88, 0xdc0, 0x10, 9, 1),
  93 +       PIN_FIELD16(89, 89, 0xdc0, 0x10, 5, 1),
  94 +       PIN_FIELD16(90, 90, 0xdc0, 0x10, 13, 1),
  95 +       /* MSDC0E */
  96 +       PIN_FIELD16(249, 249, 0x140, 0x10, 1, 1),
  97 +       PIN_FIELD16(250, 250, 0x130, 0x10, 13, 1),
  98 +       PIN_FIELD16(251, 251, 0x130, 0x10, 9, 1),
  99 +       PIN_FIELD16(252, 252, 0x130, 0x10, 5, 1),
 100 +       PIN_FIELD16(253, 253, 0x130, 0x10, 1, 1),
 101 +       PIN_FIELD16(254, 254, 0xf40, 0x10, 13, 1),
 102 +       PIN_FIELD16(255, 255, 0xf40, 0x10, 9, 1),
 103 +       PIN_FIELD16(256, 256, 0xf40, 0x10, 5, 1),
 104 +       PIN_FIELD16(257, 257, 0xf40, 0x10, 1, 1),
 105 +       PIN_FIELD16(258, 258, 0xcb0, 0x10, 9, 1),
 106 +       PIN_FIELD16(259, 259, 0xc90, 0x10, 9, 1),
 107 +       PIN_FIELD16(261, 261, 0x140, 0x10, 9, 1),
 108 +};
 109 +
 110 +static const struct mtk_pin_field_calc mt7623_pin_r0_range[] = {
 111 +       /* MSDC0 */
 112 +       PIN_FIELD16(111, 111, 0xd00, 0x10, 14, 1),
 113 +       PIN_FIELD16(112, 112, 0xd00, 0x10, 10, 1),
 114 +       PIN_FIELD16(113, 113, 0xd00, 0x10, 6, 1),
 115 +       PIN_FIELD16(114, 114, 0xd00, 0x10, 2, 1),
 116 +       PIN_FIELD16(115, 115, 0xd10, 0x10, 2, 1),
 117 +       PIN_FIELD16(116, 116, 0xcd0, 0x10, 10, 1),
 118 +       PIN_FIELD16(117, 117, 0xcc0, 0x10, 10, 1),
 119 +       PIN_FIELD16(118, 118, 0xcf0, 0x10, 14, 1),
 120 +       PIN_FIELD16(119, 119, 0xcf0, 0x10, 10, 1),
 121 +       PIN_FIELD16(120, 120, 0xcf0, 0x10, 6, 1),
 122 +       PIN_FIELD16(121, 121, 0xcf0, 0x10, 2, 1),
 123 +       /* MSDC1 */
 124 +       PIN_FIELD16(105, 105, 0xd40, 0x10, 10, 1),
 125 +       PIN_FIELD16(106, 106, 0xd30, 0x10, 10, 1),
 126 +       PIN_FIELD16(107, 107, 0xd60, 0x10, 2, 1),
 127 +       PIN_FIELD16(108, 108, 0xd60, 0x10, 8, 1),
 128 +       PIN_FIELD16(109, 109, 0xd60, 0x10, 6, 1),
 129 +       PIN_FIELD16(110, 110, 0xc60, 0x10, 14, 1),
 130 +       /* MSDC2 */
 131 +       PIN_FIELD16(85, 85, 0xda0, 0x10, 10, 1),
 132 +       PIN_FIELD16(86, 86, 0xd90, 0x10, 10, 1),
 133 +       PIN_FIELD16(87, 87, 0xdc0, 0x10, 2, 1),
 134 +       PIN_FIELD16(88, 88, 0xdc0, 0x10, 8, 1),
 135 +       PIN_FIELD16(89, 89, 0xdc0, 0x10, 6, 1),
 136 +       PIN_FIELD16(90, 90, 0xdc0, 0x10, 14, 1),
 137 +       /* MSDC0E */
 138 +       PIN_FIELD16(249, 249, 0x140, 0x10, 2, 1),
 139 +       PIN_FIELD16(250, 250, 0x130, 0x10, 14, 1),
 140 +       PIN_FIELD16(251, 251, 0x130, 0x10, 10, 1),
 141 +       PIN_FIELD16(252, 252, 0x130, 0x10, 6, 1),
 142 +       PIN_FIELD16(253, 253, 0x130, 0x10, 2, 1),
 143 +       PIN_FIELD16(254, 254, 0xf40, 0x10, 14, 1),
 144 +       PIN_FIELD16(255, 255, 0xf40, 0x10, 10, 1),
 145 +       PIN_FIELD16(256, 256, 0xf40, 0x10, 6, 1),
 146 +       PIN_FIELD16(257, 257, 0xf40, 0x10, 5, 1),
 147 +       PIN_FIELD16(258, 258, 0xcb0, 0x10, 10, 1),
 148 +       PIN_FIELD16(259, 259, 0xc90, 0x10, 10, 1),
 149 +       PIN_FIELD16(261, 261, 0x140, 0x10, 10, 1),
 150 +};
 151 +
 152  static const struct mtk_pin_reg_calc mt7623_reg_cals[] = {
 153         [PINCTRL_PIN_REG_MODE] = MTK_RANGE(mt7623_pin_mode_range),
 154         [PINCTRL_PIN_REG_DIR] = MTK_RANGE(mt7623_pin_dir_range),
 155 @@ -272,6 +398,9 @@ static const struct mtk_pin_reg_calc mt7623_reg_cals[] = {
 156         [PINCTRL_PIN_REG_PULLSEL] = MTK_RANGE(mt7623_pin_pullsel_range),
 157         [PINCTRL_PIN_REG_PULLEN] = MTK_RANGE(mt7623_pin_pullen_range),
 158         [PINCTRL_PIN_REG_DRV] = MTK_RANGE(mt7623_pin_drv_range),
 159 +       [PINCTRL_PIN_REG_PUPD] = MTK_RANGE(mt7623_pin_pupd_range),
 160 +       [PINCTRL_PIN_REG_R0] = MTK_RANGE(mt7623_pin_r0_range),
 161 +       [PINCTRL_PIN_REG_R1] = MTK_RANGE(mt7623_pin_r1_range),
 162  };
 163
 164  static const struct mtk_pin_desc mt7623_pins[] = {
 165 diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
 166 index e8187a3780..6553dde45c 100644
 167 --- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
 168 +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
 169 @@ -296,7 +296,7 @@ static const struct pinconf_param mtk_conf_params[] = {
 170  };
 171
 172
 173 -int mtk_pinconf_bias_set_v0(struct udevice *dev, u32 pin, u32 arg)
 174 +int mtk_pinconf_bias_set_v0(struct udevice *dev, u32 pin, u32 arg, u32 val)
 175  {
 176         int err, disable, pullup;
 177
 178 @@ -323,12 +323,14 @@ int mtk_pinconf_bias_set_v0(struct udevice *dev, u32 pin, u32 arg)
 179         return 0;
 180  }
 181
 182 -int mtk_pinconf_bias_set_v1(struct udevice *dev, u32 pin, u32 arg)
 183 +int mtk_pinconf_bias_set_v1(struct udevice *dev, u32 pin, u32 arg, u32 val)
 184  {
 185 -       int err, disable, pullup;
 186 +       int err, disable, pullup, r0, r1;
 187
 188         disable = (arg == PIN_CONFIG_BIAS_DISABLE);
 189         pullup = (arg == PIN_CONFIG_BIAS_PULL_UP);
 190 +       r0 = !!(val & 1);
 191 +       r1 = !!(val & 2);
 192
 193         if (disable) {
 194                 err = mtk_hw_set_value(dev, pin, PINCTRL_PIN_REG_PULLEN, 0);
 195 @@ -344,6 +346,13 @@ int mtk_pinconf_bias_set_v1(struct udevice *dev, u32 pin, u32 arg)
 196                         return err;
 197         }
 198
 199 +       /* Also set PUPD/R0/R1 if the pin has them */
 200 +       err = mtk_hw_set_value(dev, pin, PINCTRL_PIN_REG_PUPD, !pullup);
 201 +       if (err != -EINVAL) {
 202 +               mtk_hw_set_value(dev, pin, PINCTRL_PIN_REG_R0, r0);
 203 +               mtk_hw_set_value(dev, pin, PINCTRL_PIN_REG_R1, r1);
 204 +       }
 205 +
 206         return 0;
 207  }
 208
 209 @@ -419,9 +428,9 @@ static int mtk_pinconf_set(struct udevice *dev, unsigned int pin,
 210         case PIN_CONFIG_BIAS_PULL_UP:
 211         case PIN_CONFIG_BIAS_PULL_DOWN:
 212                 if (rev == MTK_PINCTRL_V0)
 213 -                       err = mtk_pinconf_bias_set_v0(dev, pin, param);
 214 +                       err = mtk_pinconf_bias_set_v0(dev, pin, param, arg);
 215                 else
 216 -                       err = mtk_pinconf_bias_set_v1(dev, pin, param);
 217 +                       err = mtk_pinconf_bias_set_v1(dev, pin, param, arg);
 218                 if (err)
 219                         goto err;
 220                 break;
 221 diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common.h b/drivers/pinctrl/mediatek/pinctrl-mtk-common.h
 222 index e815761450..5e51a9a90c 100644
 223 --- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.h
 224 +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.h
 225 @@ -51,6 +51,9 @@ enum {
 226         PINCTRL_PIN_REG_PULLEN,
 227         PINCTRL_PIN_REG_PULLSEL,
 228         PINCTRL_PIN_REG_DRV,
 229 +       PINCTRL_PIN_REG_PUPD,
 230 +       PINCTRL_PIN_REG_R0,
 231 +       PINCTRL_PIN_REG_R1,
 232         PINCTRL_PIN_REG_MAX,
 233  };
 234
 235 --
 236 2.26.2
 237