target/linux/ramips/patches-5.10/0121-staging-mt7621-pci-fix-PCIe-interrupt-mapping.patch

   1 From fab6710e4c51f4eb622f95a08322ab5fdbe3f295 Mon Sep 17 00:00:00 2001
   2 From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
   3 Date: Mon, 13 Apr 2020 07:59:42 +0200
   4 Subject: [PATCH] staging: mt7621-pci: fix PCIe interrupt mapping
   5
   6 MT7621 has three assigned interrupts for the pcie. This
   7 interrupts should properly being mapped taking into account
   8 which devices are finally connected in which bus according
   9 to link status. So the irq mappings should be as follows
  10 according to link status (three bits indicating which devices
  11 are link up):
  12
  13 * For PCIe Bus 1 slot 0:
  14   - status = 0x2 || status = 0x6 => IRQ = pcie1_irq (24).
  15   - status = 0x4 => IRQ = pcie2_irq (25).
  16   - default => IRQ = pcie0_irq (23).
  17 * For PCIe Bus 2 slot 0:
  18   - status = 0x5 || status = 0x6 => IRQ = pcie2_irq (25).
  19   - default => IRQ = pcie1_irq (24).
  20 * For PCIe Bus 2 slot 1:
  21   - status = 0x5 || status = 0x6 => IRQ = pcie2_irq (25).
  22   - default => IRQ = pcie1_irq (24).
  23 * For PCIe Bus 3 any slot:
  24   - default => IRQ = pcie2_irq (25).
  25
  26 Because of this, the function 'of_irq_parse_and_map_pci' cannot
  27 be used and we need to change device tree information from using
  28 the 'interrupt-map' and 'interrupt-map-mask' properties into an
  29 'interrupts' property to be able to get irq information from the
  30 ports using the 'platform_get_irq' and storing an 'irq-map' into
  31 the pcie driver data node to properly map correct irq using a
  32 new 'mt7621_map_irq' function where this map will be read and the
  33 correct irq returned.
  34
  35 Fixes: 46d093124df4 ("staging: mt7621-pci: improve interrupt mapping")
  36 Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
  37 Link: https://lore.kernel.org/r/20200413055942.2714-1-sergio.paracuellos@gmail.com
  38 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  39 ---
  40  drivers/staging/mt7621-dts/mt7621.dtsi  |  9 +++----
  41  drivers/staging/mt7621-pci/pci-mt7621.c | 36 +++++++++++++++++++++++--
  42  2 files changed, 38 insertions(+), 7 deletions(-)
  43
  44 --- a/drivers/staging/mt7621-pci/pci-mt7621.c
  45 +++ b/drivers/staging/mt7621-pci/pci-mt7621.c
  46 @@ -97,6 +97,7 @@
  47   * @pcie_rst: pointer to port reset control
  48   * @gpio_rst: gpio reset
  49   * @slot: port slot
  50 + * @irq: GIC irq
  51   * @enabled: indicates if port is enabled
  52   */
  53  struct mt7621_pcie_port {
  54 @@ -107,6 +108,7 @@ struct mt7621_pcie_port {
  55         struct reset_control *pcie_rst;
  56         struct gpio_desc *gpio_rst;
  57         u32 slot;
  58 +       int irq;
  59         bool enabled;
  60  };
  61
  62 @@ -120,6 +122,7 @@ struct mt7621_pcie_port {
  63   * @dev: Pointer to PCIe device
  64   * @io_map_base: virtual memory base address for io
  65   * @ports: pointer to PCIe port information
  66 + * @irq_map: irq mapping info according pcie link status
  67   * @resets_inverted: depends on chip revision
  68   * reset lines are inverted.
  69   */
  70 @@ -135,6 +138,7 @@ struct mt7621_pcie {
  71         } offset;
  72         unsigned long io_map_base;
  73         struct list_head ports;
  74 +       int irq_map[PCIE_P2P_MAX];
  75         bool resets_inverted;
  76  };
  77
  78 @@ -279,6 +283,16 @@ static void setup_cm_memory_region(struc
  79         }
  80  }
  81
  82 +static int mt7621_map_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
  83 +{
  84 +       struct mt7621_pcie *pcie = pdev->bus->sysdata;
  85 +       struct device *dev = pcie->dev;
  86 +       int irq = pcie->irq_map[slot];
  87 +
  88 +       dev_info(dev, "bus=%d slot=%d irq=%d\n", pdev->bus->number, slot, irq);
  89 +       return irq;
  90 +}
  91 +
  92  static int mt7621_pci_parse_request_of_pci_ranges(struct mt7621_pcie *pcie)
  93  {
  94         struct device *dev = pcie->dev;
  95 @@ -330,6 +344,7 @@ static int mt7621_pcie_parse_port(struct
  96  {
  97         struct mt7621_pcie_port *port;
  98         struct device *dev = pcie->dev;
  99 +       struct platform_device *pdev = to_platform_device(dev);
 100         struct device_node *pnode = dev->of_node;
 101         struct resource regs;
 102         char name[10];
 103 @@ -371,6 +386,12 @@ static int mt7621_pcie_parse_port(struct
 104         port->slot = slot;
 105         port->pcie = pcie;
 106
 107 +       port->irq = platform_get_irq(pdev, slot);
 108 +       if (port->irq < 0) {
 109 +               dev_err(dev, "Failed to get IRQ for PCIe%d\n", slot);
 110 +               return -ENXIO;
 111 +       }
 112 +
 113         INIT_LIST_HEAD(&port->list);
 114         list_add_tail(&port->list, &pcie->ports);
 115
 116 @@ -585,13 +606,15 @@ static int mt7621_pcie_init_virtual_brid
 117  {
 118         u32 pcie_link_status = 0;
 119         u32 n;
 120 -       int i;
 121 +       int i = 0;
 122         u32 p2p_br_devnum[PCIE_P2P_MAX];
 123 +       int irqs[PCIE_P2P_MAX];
 124         struct mt7621_pcie_port *port;
 125
 126         list_for_each_entry(port, &pcie->ports, list) {
 127                 u32 slot = port->slot;
 128
 129 +               irqs[i++] = port->irq;
 130                 if (port->enabled)
 131                         pcie_link_status |= BIT(slot);
 132         }
 133 @@ -614,6 +637,15 @@ static int mt7621_pcie_init_virtual_brid
 134                  (p2p_br_devnum[1] << PCIE_P2P_BR_DEVNUM1_SHIFT) |
 135                  (p2p_br_devnum[2] << PCIE_P2P_BR_DEVNUM2_SHIFT));
 136
 137 +       /* Assign IRQs */
 138 +       n = 0;
 139 +       for (i = 0; i < PCIE_P2P_MAX; i++)
 140 +               if (pcie_link_status & BIT(i))
 141 +                       pcie->irq_map[n++] = irqs[i];
 142 +
 143 +       for (i = n; i < PCIE_P2P_MAX; i++)
 144 +               pcie->irq_map[i] = -1;
 145 +
 146         return 0;
 147  }
 148
 149 @@ -638,7 +670,7 @@ static int mt7621_pcie_register_host(str
 150         host->busnr = pcie->busn.start;
 151         host->dev.parent = pcie->dev;
 152         host->ops = &mt7621_pci_ops;
 153 -       host->map_irq = of_irq_parse_and_map_pci;
 154 +       host->map_irq = mt7621_map_irq;
 155         host->swizzle_irq = pci_common_swizzle;
 156         host->sysdata = pcie;
 157