target/linux/mediatek/patches-4.14/0208-clk-mediatek-update-missing-clock-data-for-MT7622-au.patch

   1 From 0725349768e96542ef06efbd87925a8603cba16a Mon Sep 17 00:00:00 2001
   2 From: Ryder Lee <ryder.lee@mediatek.com>
   3 Date: Tue, 6 Mar 2018 17:09:26 +0800
   4 Subject: [PATCH 208/224] clk: mediatek: update missing clock data for MT7622
   5  audsys
   6
   7 Add missing clock data 'CLK_AUDIO_AFE_CONN' for MT7622 audsys.
   8
   9 Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
  10 Reviewed-by: Rob Herring <robh@kernel.org>
  11 Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
  12 ---
  13  drivers/clk/mediatek/clk-mt7622-aud.c  | 1 +
  14  include/dt-bindings/clock/mt7622-clk.h | 3 ++-
  15  2 files changed, 3 insertions(+), 1 deletion(-)
  16
  17 --- a/drivers/clk/mediatek/clk-mt7622-aud.c
  18 +++ b/drivers/clk/mediatek/clk-mt7622-aud.c
  19 @@ -106,6 +106,7 @@ static const struct mtk_gate audio_clks[
  20         GATE_AUDIO1(CLK_AUDIO_INTDIR, "audio_intdir", "intdir_sel", 20),
  21         GATE_AUDIO1(CLK_AUDIO_A1SYS, "audio_a1sys", "a1sys_hp_sel", 21),
  22         GATE_AUDIO1(CLK_AUDIO_A2SYS, "audio_a2sys", "a2sys_hp_sel", 22),
  23 +       GATE_AUDIO1(CLK_AUDIO_AFE_CONN, "audio_afe_conn", "a1sys_hp_sel", 23),
  24         /* AUDIO2 */
  25         GATE_AUDIO2(CLK_AUDIO_UL1, "audio_ul1", "a1sys_hp_sel", 0),
  26         GATE_AUDIO2(CLK_AUDIO_UL2, "audio_ul2", "a1sys_hp_sel", 1),
  27 --- a/include/dt-bindings/clock/mt7622-clk.h
  28 +++ b/include/dt-bindings/clock/mt7622-clk.h
  29 @@ -235,7 +235,8 @@
  30  #define CLK_AUDIO_MEM_ASRC3            43
  31  #define CLK_AUDIO_MEM_ASRC4            44
  32  #define CLK_AUDIO_MEM_ASRC5            45
  33 -#define CLK_AUDIO_NR_CLK               46
  34 +#define CLK_AUDIO_AFE_CONN             46
  35 +#define CLK_AUDIO_NR_CLK               47
  36
  37  /* SSUSBSYS */
  38