target/linux/mediatek/patches-4.14/0142-mmc-dt-bindings-Add-reg-source_cg-latch-ck-for-Media.patch

   1 From 9ff279fef1a47a152993bf23f8d75fd233c27015 Mon Sep 17 00:00:00 2001
   2 From: Chaotian Jing <chaotian.jing@mediatek.com>
   3 Date: Mon, 16 Oct 2017 09:46:28 +0800
   4 Subject: [PATCH 142/224] mmc: dt-bindings: Add reg/source_cg/latch-ck for
   5  Mediatek MMC bindings
   6
   7 Change the comptiable for support of multi-platform
   8 Make compatible explicit, as MMC host of mt8173 has difference with
   9 mt8135(mt8173 supports hs400 and hs400_tune),so that need separate
  10 mt8173/mt8135 compatible name.
  11 Add description for reg
  12 Add description for source_cg
  13 Add description for mediatek,latch-ck
  14 Note that source_cg and mediatek,latch-ck are optional for some projects,
  15 eg, MT2701 do not have source_cg, and MT2712 do not need
  16 mediatek,latch-ck
  17
  18 Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>
  19 Acked-by: Rob Herring <robh@kernel.org>
  20 Tested-by: Sean Wang <sean.wang@mediatek.com>
  21 Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
  22 ---
  23  Documentation/devicetree/bindings/mmc/mtk-sd.txt | 18 +++++++++++++++---
  24  1 file changed, 15 insertions(+), 3 deletions(-)
  25
  26 --- a/Documentation/devicetree/bindings/mmc/mtk-sd.txt
  27 +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.txt
  28 @@ -7,10 +7,18 @@ This file documents differences between
  29  and the properties used by the msdc driver.
  30
  31  Required properties:
  32 -- compatible: Should be "mediatek,mt8173-mmc","mediatek,mt8135-mmc"
  33 +- compatible: value should be either of the following.
  34 +       "mediatek,mt8135-mmc": for mmc host ip compatible with mt8135
  35 +       "mediatek,mt8173-mmc": for mmc host ip compatible with mt8173
  36 +       "mediatek,mt2701-mmc": for mmc host ip compatible with mt2701
  37 +       "mediatek,mt2712-mmc": for mmc host ip compatible with mt2712
  38 +- reg: physical base address of the controller and length
  39  - interrupts: Should contain MSDC interrupt number
  40 -- clocks: MSDC source clock, HCLK
  41 -- clock-names: "source", "hclk"
  42 +- clocks: Should contain phandle for the clock feeding the MMC controller
  43 +- clock-names: Should contain the following:
  44 +       "source" - source clock (required)
  45 +       "hclk" - HCLK which used for host (required)
  46 +       "source_cg" - independent source clock gate (required for MT2712)
  47  - pinctrl-names: should be "default", "state_uhs"
  48  - pinctrl-0: should contain default/high speed pin ctrl
  49  - pinctrl-1: should contain uhs mode pin ctrl
  50 @@ -30,6 +38,10 @@ Optional properties:
  51  - mediatek,hs400-cmd-resp-sel-rising:  HS400 command response sample selection
  52                                        If present,HS400 command responses are sampled on rising edges.
  53                                        If not present,HS400 command responses are sampled on falling edges.
  54 +- mediatek,latch-ck: Some SoCs do not support enhance_rx, need set correct latch-ck to avoid data crc
  55 +                    error caused by stop clock(fifo full)
  56 +                    Valid range = [0:0x7]. if not present, default value is 0.
  57 +                    applied to compatible "mediatek,mt2701-mmc".
  58
  59  Examples:
  60  mmc0: mmc@11230000 {