mediatek: add support for rtl8367c
[openwrt/staging/rmilecki.git] / target / linux / mediatek / files-5.4 / drivers / net / phy / rtk / rtl8367c / rtl8367c_asicdrv_inbwctrl.c
1 /*
2 * Copyright (C) 2013 Realtek Semiconductor Corp.
3 * All Rights Reserved.
4 *
5 * Unless you and Realtek execute a separate written software license
6 * agreement governing use of this software, this software is licensed
7 * to you under the terms of the GNU General Public License version 2,
8 * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
9 *
10 * $Revision: 76306 $
11 * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
12 *
13 * Purpose : RTL8367C switch high-level API for RTL8367C
14 * Feature : Ingress bandwidth control related functions
15 *
16 */
17 #include <rtl8367c_asicdrv_inbwctrl.h>
18 /* Function Name:
19 * rtl8367c_setAsicPortIngressBandwidth
20 * Description:
21 * Set per-port total ingress bandwidth
22 * Input:
23 * port - Physical port number (0~7)
24 * bandwidth - The total ingress bandwidth (unit: 8Kbps), 0x1FFFF:disable
25 * preifg - Include preamble and IFG, 0:Exclude, 1:Include
26 * enableFC - Action when input rate exceeds. 0: Drop 1: Flow Control
27 * Output:
28 * None
29 * Return:
30 * RT_ERR_OK - Success
31 * RT_ERR_SMI - SMI access error
32 * RT_ERR_PORT_ID - Invalid port number
33 * RT_ERR_OUT_OF_RANGE - input parameter out of range
34 * Note:
35 * None
36 */
37 ret_t rtl8367c_setAsicPortIngressBandwidth(rtk_uint32 port, rtk_uint32 bandwidth, rtk_uint32 preifg, rtk_uint32 enableFC)
38 {
39 ret_t retVal;
40 rtk_uint32 regData;
41 rtk_uint32 regAddr;
42
43 /* Invalid input parameter */
44 if(port >= RTL8367C_PORTNO)
45 return RT_ERR_PORT_ID;
46
47 if(bandwidth > RTL8367C_QOS_GRANULARTY_MAX)
48 return RT_ERR_OUT_OF_RANGE;
49
50 regAddr = RTL8367C_INGRESSBW_PORT_RATE_LSB_REG(port);
51 regData = bandwidth & RTL8367C_QOS_GRANULARTY_LSB_MASK;
52 retVal = rtl8367c_setAsicReg(regAddr, regData);
53 if(retVal != RT_ERR_OK)
54 return retVal;
55
56 regAddr += 1;
57 regData = (bandwidth & RTL8367C_QOS_GRANULARTY_MSB_MASK) >> RTL8367C_QOS_GRANULARTY_MSB_OFFSET;
58 retVal = rtl8367c_setAsicRegBits(regAddr, RTL8367C_INGRESSBW_PORT0_RATE_CTRL1_INGRESSBW_RATE16_MASK, regData);
59 if(retVal != RT_ERR_OK)
60 return retVal;
61
62 regAddr = RTL8367C_PORT_MISC_CFG_REG(port);
63 retVal = rtl8367c_setAsicRegBit(regAddr, RTL8367C_PORT0_MISC_CFG_INGRESSBW_IFG_OFFSET, preifg);
64 if(retVal != RT_ERR_OK)
65 return retVal;
66
67 regAddr = RTL8367C_PORT_MISC_CFG_REG(port);
68 retVal = rtl8367c_setAsicRegBit(regAddr, RTL8367C_PORT0_MISC_CFG_INGRESSBW_FLOWCTRL_OFFSET, enableFC);
69 if(retVal != RT_ERR_OK)
70 return retVal;
71
72 return RT_ERR_OK;
73 }
74 /* Function Name:
75 * rtl8367c_getAsicPortIngressBandwidth
76 * Description:
77 * Get per-port total ingress bandwidth
78 * Input:
79 * port - Physical port number (0~7)
80 * pBandwidth - The total ingress bandwidth (unit: 8Kbps), 0x1FFFF:disable
81 * pPreifg - Include preamble and IFG, 0:Exclude, 1:Include
82 * pEnableFC - Action when input rate exceeds. 0: Drop 1: Flow Control
83 * Output:
84 * None
85 * Return:
86 * RT_ERR_OK - Success
87 * RT_ERR_SMI - SMI access error
88 * RT_ERR_PORT_ID - Invalid port number
89 * Note:
90 * None
91 */
92 ret_t rtl8367c_getAsicPortIngressBandwidth(rtk_uint32 port, rtk_uint32* pBandwidth, rtk_uint32* pPreifg, rtk_uint32* pEnableFC)
93 {
94 ret_t retVal;
95 rtk_uint32 regData;
96 rtk_uint32 regAddr;
97
98 /* Invalid input parameter */
99 if(port >= RTL8367C_PORTNO)
100 return RT_ERR_PORT_ID;
101
102 regAddr = RTL8367C_INGRESSBW_PORT_RATE_LSB_REG(port);
103 retVal = rtl8367c_getAsicReg(regAddr, &regData);
104 if(retVal != RT_ERR_OK)
105 return retVal;
106
107 *pBandwidth = regData;
108
109 regAddr += 1;
110 retVal = rtl8367c_getAsicRegBits(regAddr, RTL8367C_INGRESSBW_PORT0_RATE_CTRL1_INGRESSBW_RATE16_MASK, &regData);
111 if(retVal != RT_ERR_OK)
112 return retVal;
113
114 *pBandwidth |= (regData << RTL8367C_QOS_GRANULARTY_MSB_OFFSET);
115
116 regAddr = RTL8367C_PORT_MISC_CFG_REG(port);
117 retVal = rtl8367c_getAsicRegBit(regAddr, RTL8367C_PORT0_MISC_CFG_INGRESSBW_IFG_OFFSET, pPreifg);
118 if(retVal != RT_ERR_OK)
119 return retVal;
120
121 regAddr = RTL8367C_PORT_MISC_CFG_REG(port);
122 retVal = rtl8367c_getAsicRegBit(regAddr, RTL8367C_PORT0_MISC_CFG_INGRESSBW_FLOWCTRL_OFFSET, pEnableFC);
123 if(retVal != RT_ERR_OK)
124 return retVal;
125
126 return RT_ERR_OK;
127 }
128 /* Function Name:
129 * rtl8367c_setAsicPortIngressBandwidthBypass
130 * Description:
131 * Set ingress bandwidth control bypasss 8899, RMA 01-80-C2-00-00-xx and IGMP
132 * Input:
133 * enabled - 1: enabled, 0: disabled
134 * Output:
135 * None
136 * Return:
137 * RT_ERR_OK - Success
138 * RT_ERR_SMI - SMI access error
139 * Note:
140 * None
141 */
142 ret_t rtl8367c_setAsicPortIngressBandwidthBypass(rtk_uint32 enabled)
143 {
144 return rtl8367c_setAsicRegBit(RTL8367C_REG_SW_DUMMY0, RTL8367C_INGRESSBW_BYPASS_EN_OFFSET, enabled);
145 }
146 /* Function Name:
147 * rtl8367c_getAsicPortIngressBandwidthBypass
148 * Description:
149 * Set ingress bandwidth control bypasss 8899, RMA 01-80-C2-00-00-xx and IGMP
150 * Input:
151 * pEnabled - 1: enabled, 0: disabled
152 * Output:
153 * None
154 * Return:
155 * RT_ERR_OK - Success
156 * RT_ERR_SMI - SMI access error
157 * Note:
158 * None
159 */
160 ret_t rtl8367c_getAsicPortIngressBandwidthBypass(rtk_uint32* pEnabled)
161 {
162 return rtl8367c_getAsicRegBit(RTL8367C_REG_SW_DUMMY0, RTL8367C_INGRESSBW_BYPASS_EN_OFFSET, pEnabled);
163 }
164