mediatke: add support for elecom-wrc-2533gent
[openwrt/staging/rmilecki.git] / target / linux / mediatek / files-5.4 / arch / arm64 / boot / dts / mediatek / mt7622-elecom-wrc-2533gent.dts
1 /*
2 * Copyright (c) 2017 MediaTek Inc.
3 * Author: Ming Huang <ming.huang@mediatek.com>
4 * Sean Wang <sean.wang@mediatek.com>
5 *
6 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 */
8
9 /dts-v1/;
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/gpio.h>
12
13 #include "mt7622.dtsi"
14 #include "mt6380.dtsi"
15
16 / {
17 model = "Elecom WRC-2533";
18 compatible = "elecom,wrc-2533gent", "mediatek,mt7622";
19
20 aliases {
21 led-boot = &led_power;
22 led-failsafe = &led_power;
23 led-running = &led_power;
24 led-upgrade = &led_power;
25 serial0 = &uart0;
26 };
27
28 chosen {
29 stdout-path = "serial0:115200n8";
30 bootargs = "earlycon=uart8250,mmio32,0x11002000 swiotlb=512 console=ttyS0,115200n8";
31 };
32
33 cpus {
34 cpu@0 {
35 proc-supply = <&mt6380_vcpu_reg>;
36 sram-supply = <&mt6380_vm_reg>;
37 };
38
39 cpu@1 {
40 proc-supply = <&mt6380_vcpu_reg>;
41 sram-supply = <&mt6380_vm_reg>;
42 };
43 };
44
45 gpio-keys {
46 compatible = "gpio-keys";
47 poll-interval = <100>;
48
49 wps {
50 label = "wps";
51 linux,code = <KEY_WPS_BUTTON>;
52 gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
53 };
54
55 factory {
56 label = "factory";
57 linux,code = <KEY_WPS_BUTTON>;
58 gpios = <&pio 102 GPIO_ACTIVE_LOW>;
59 };
60
61 switch0 {
62 label = "switch0";
63 gpios = <&pio 1 GPIO_ACTIVE_LOW>;
64 linux,code = <BTN_0>;
65 linux,input-type = <EV_SW>;
66 };
67
68 switch1 {
69 label = "switch1";
70 gpios = <&pio 16 GPIO_ACTIVE_LOW>;
71 linux,code = <BTN_1>;
72 linux,input-type = <EV_SW>;
73 };
74
75 switch2 {
76 label = "switch2";
77 gpios = <&pio 17 GPIO_ACTIVE_LOW>;
78 linux,code = <BTN_2>;
79 linux,input-type = <EV_SW>;
80 };
81
82 switch3 {
83 label = "switch3";
84 gpios = <&pio 18 GPIO_ACTIVE_LOW>;
85 linux,code = <BTN_3>;
86 linux,input-type = <EV_SW>;
87 };
88 };
89
90 leds {
91 compatible = "gpio-leds";
92
93 led_power: power_g {
94 label = "wrc-2533:green:power";
95 gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
96 };
97
98 power_b {
99 label = "wrc-2533:blue:power";
100 gpios = <&pio 19 GPIO_ACTIVE_HIGH>;
101 };
102
103 power_r {
104 label = "wrc-2533:red:power";
105 gpios = <&pio 73 GPIO_ACTIVE_HIGH>;
106 };
107
108 usb {
109 label = "wrc-2533:blue:usb";
110 gpios = <&pio 74 GPIO_ACTIVE_HIGH>;
111 };
112
113 wps {
114 label = "wrc-2533:red:wps";
115 gpios = <&pio 76 GPIO_ACTIVE_LOW>;
116 };
117
118 wifi2 {
119 label = "wrc-2533:blue:wifi2g";
120 gpios = <&pio 85 GPIO_ACTIVE_LOW>;
121 };
122
123 wifi5 {
124 label = "wrc-2533:blue:wifi5g";
125 gpios = <&pio 91 GPIO_ACTIVE_LOW>;
126 };
127 };
128
129 reg_usb_vbus: regulator {
130 compatible = "regulator-fixed";
131 regulator-name = "usb_vbus";
132 regulator-min-microvolt = <5000000>;
133 regulator-max-microvolt = <5000000>;
134 gpio = <&pio 22 GPIO_ACTIVE_LOW>;
135 enable-active-high;
136 };
137
138 memory {
139 reg = <0 0x40000000 0 0x3F000000>;
140 };
141
142 reg_1p8v: regulator-1p8v {
143 compatible = "regulator-fixed";
144 regulator-name = "fixed-1.8V";
145 regulator-min-microvolt = <1800000>;
146 regulator-max-microvolt = <1800000>;
147 regulator-always-on;
148 };
149
150 reg_3p3v: regulator-3p3v {
151 compatible = "regulator-fixed";
152 regulator-name = "fixed-3.3V";
153 regulator-min-microvolt = <3300000>;
154 regulator-max-microvolt = <3300000>;
155 regulator-boot-on;
156 regulator-always-on;
157 };
158
159 rtkgsw: rtkgsw@0 {
160 compatible = "mediatek,rtk-gsw";
161 mediatek,ethsys = <&ethsys>;
162 mediatek,mdio = <&mdio>;
163 mediatek,reset-pin = <&pio 54 0>;
164 status = "okay";
165 };
166 };
167
168 &pcie {
169 pinctrl-names = "default", "pcie1_pins";
170 pinctrl-0 = <&pcie0_pins>;
171 pinctrl-1 = <&pcie1_pins>;
172 status = "okay";
173
174 pcie@0,0 {
175 status = "okay";
176 mt7615@0,0 {
177 reg = <0x0000 0 0 0 0>;
178 mediatek,mtd-eeprom = <&factory 0x05000>;
179 };
180 };
181
182 pcie@1,0 {
183 status = "okay";
184 };
185 };
186
187 &pio {
188 /* eMMC is shared pin with parallel NAND */
189 emmc_pins_default: emmc-pins-default {
190 mux {
191 function = "emmc", "emmc_rst";
192 groups = "emmc";
193 };
194
195 /* "NDL0","NDL1","NDL2","NDL3","NDL4","NDL5","NDL6","NDL7",
196 * "NRB","NCLE" pins are used as DAT0,DAT1,DAT2,DAT3,DAT4,
197 * DAT5,DAT6,DAT7,CMD,CLK for eMMC respectively
198 */
199 conf-cmd-dat {
200 pins = "NDL0", "NDL1", "NDL2",
201 "NDL3", "NDL4", "NDL5",
202 "NDL6", "NDL7", "NRB";
203 input-enable;
204 bias-pull-up;
205 };
206
207 conf-clk {
208 pins = "NCLE";
209 bias-pull-down;
210 };
211 };
212
213 emmc_pins_uhs: emmc-pins-uhs {
214 mux {
215 function = "emmc";
216 groups = "emmc";
217 };
218
219 conf-cmd-dat {
220 pins = "NDL0", "NDL1", "NDL2",
221 "NDL3", "NDL4", "NDL5",
222 "NDL6", "NDL7", "NRB";
223 input-enable;
224 drive-strength = <4>;
225 bias-pull-up;
226 };
227
228 conf-clk {
229 pins = "NCLE";
230 drive-strength = <4>;
231 bias-pull-down;
232 };
233 };
234
235 eth_pins: eth-pins {
236 mux {
237 function = "eth";
238 groups = "mdc_mdio", "rgmii_via_gmac2";
239 };
240 };
241
242 i2c1_pins: i2c1-pins {
243 mux {
244 function = "i2c";
245 groups = "i2c1_0";
246 };
247 };
248
249 i2c2_pins: i2c2-pins {
250 mux {
251 function = "i2c";
252 groups = "i2c2_0";
253 };
254 };
255
256 i2s1_pins: i2s1-pins {
257 mux {
258 function = "i2s";
259 groups = "i2s_out_mclk_bclk_ws",
260 "i2s1_in_data",
261 "i2s1_out_data";
262 };
263
264 conf {
265 pins = "I2S1_IN", "I2S1_OUT", "I2S_BCLK",
266 "I2S_WS", "I2S_MCLK";
267 drive-strength = <12>;
268 bias-pull-down;
269 };
270 };
271
272 irrx_pins: irrx-pins {
273 mux {
274 function = "ir";
275 groups = "ir_1_rx";
276 };
277 };
278
279 irtx_pins: irtx-pins {
280 mux {
281 function = "ir";
282 groups = "ir_1_tx";
283 };
284 };
285
286 /* Parallel nand is shared pin with eMMC */
287 parallel_nand_pins: parallel-nand-pins {
288 mux {
289 function = "flash";
290 groups = "par_nand";
291 };
292 };
293
294 pcie0_pins: pcie0-pins {
295 mux {
296 function = "pcie";
297 groups = "pcie0_pad_perst",
298 "pcie0_1_waken",
299 "pcie0_1_clkreq";
300 };
301 };
302
303 pcie1_pins: pcie1-pins {
304 mux {
305 function = "pcie";
306 groups = "pcie1_pad_perst",
307 "pcie1_0_waken",
308 "pcie1_0_clkreq";
309 };
310 };
311
312 pmic_bus_pins: pmic-bus-pins {
313 mux {
314 function = "pmic";
315 groups = "pmic_bus";
316 };
317 };
318
319 pwm7_pins: pwm1-2-pins {
320 mux {
321 function = "pwm";
322 groups = "pwm_ch7_2";
323 };
324 };
325
326 wled_pins: wled-pins {
327 mux {
328 function = "led";
329 groups = "wled";
330 };
331 };
332
333 sd0_pins_default: sd0-pins-default {
334 mux {
335 function = "sd";
336 groups = "sd_0";
337 };
338
339 /* "I2S2_OUT, "I2S4_IN"", "I2S3_IN", "I2S2_IN",
340 * "I2S4_OUT", "I2S3_OUT" are used as DAT0, DAT1,
341 * DAT2, DAT3, CMD, CLK for SD respectively.
342 */
343 conf-cmd-data {
344 pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN",
345 "I2S2_IN","I2S4_OUT";
346 input-enable;
347 drive-strength = <8>;
348 bias-pull-up;
349 };
350 conf-clk {
351 pins = "I2S3_OUT";
352 drive-strength = <12>;
353 bias-pull-down;
354 };
355 conf-cd {
356 pins = "TXD3";
357 bias-pull-up;
358 };
359 };
360
361 sd0_pins_uhs: sd0-pins-uhs {
362 mux {
363 function = "sd";
364 groups = "sd_0";
365 };
366
367 conf-cmd-data {
368 pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN",
369 "I2S2_IN","I2S4_OUT";
370 input-enable;
371 bias-pull-up;
372 };
373
374 conf-clk {
375 pins = "I2S3_OUT";
376 bias-pull-down;
377 };
378 };
379
380 /* Serial NAND is shared pin with SPI-NOR */
381 serial_nand_pins: serial-nand-pins {
382 mux {
383 function = "flash";
384 groups = "snfi";
385 };
386 };
387
388 spic0_pins: spic0-pins {
389 mux {
390 function = "spi";
391 groups = "spic0_0";
392 };
393 };
394
395 spic1_pins: spic1-pins {
396 mux {
397 function = "spi";
398 groups = "spic1_0";
399 };
400 };
401
402 /* SPI-NOR is shared pin with serial NAND */
403 spi_nor_pins: spi-nor-pins {
404 mux {
405 function = "flash";
406 groups = "spi_nor";
407 };
408 };
409
410 /* serial NAND is shared pin with SPI-NOR */
411 serial_nand_pins: serial-nand-pins {
412 mux {
413 function = "flash";
414 groups = "snfi";
415 };
416 };
417
418 uart0_pins: uart0-pins {
419 mux {
420 function = "uart";
421 groups = "uart0_0_tx_rx" ;
422 };
423 };
424
425 uart2_pins: uart2-pins {
426 mux {
427 function = "uart";
428 groups = "uart2_1_tx_rx" ;
429 };
430 };
431
432 watchdog_pins: watchdog-pins {
433 mux {
434 function = "watchdog";
435 groups = "watchdog";
436 };
437 };
438 };
439
440 &bch {
441 status = "okay";
442 };
443
444 &btif {
445 status = "okay";
446 };
447
448 &cir {
449 pinctrl-names = "default";
450 pinctrl-0 = <&irrx_pins>;
451 status = "okay";
452 };
453
454 &eth {
455 status = "okay";
456 pinctrl-names = "default";
457 pinctrl-0 = <&eth_pins>;
458 gmac0: mac@0 {
459 compatible = "mediatek,eth-mac";
460 reg = <0>;
461 phy-mode = "sgmii";
462 fixed-link {
463 speed = <1000>;
464 full-duplex;
465 pause;
466 };
467 };
468 gmac1: mac@1 {
469 compatible = "mediatek,eth-mac";
470 reg = <1>;
471 phy-mode = "rgmii";
472 fixed-link {
473 speed = <1000>;
474 full-duplex;
475 pause;
476 };
477 };
478 mdio: mdio-bus {
479 #address-cells = <1>;
480 #size-cells = <0>;
481 };
482 };
483
484 &i2c1 {
485 pinctrl-names = "default";
486 pinctrl-0 = <&i2c1_pins>;
487 status = "okay";
488 };
489
490 &i2c2 {
491 pinctrl-names = "default";
492 pinctrl-0 = <&i2c2_pins>;
493 status = "okay";
494 };
495
496 &pwm {
497 pinctrl-names = "default";
498 pinctrl-0 = <&pwm7_pins>;
499 status = "okay";
500 };
501
502 &pwrap {
503 pinctrl-names = "default";
504 pinctrl-0 = <&pmic_bus_pins>;
505
506 status = "okay";
507 };
508
509 &snfi {
510 pinctrl-names = "default";
511 pinctrl-0 = <&serial_nand_pins>;
512 status = "okay";
513
514 spi_nand@0 {
515 #address-cells = <1>;
516 #size-cells = <1>;
517 compatible = "spi-nand";
518 spi-max-frequency = <104000000>;
519 reg = <0>;
520
521 partitions {
522 compatible = "fixed-partitions";
523 #address-cells = <1>;
524 #size-cells = <1>;
525
526 partition@0 {
527 label = "Preloader";
528 reg = <0x00000 0x0080000>;
529 read-only;
530 };
531
532 partition@80000 {
533 label = "ATF";
534 reg = <0x80000 0x0040000>;
535 read-only;
536 };
537
538 partition@c0000 {
539 label = "uboot";
540 reg = <0xc0000 0x0080000>;
541 read-only;
542 };
543
544 partition@140000 {
545 label = "uboot-env";
546 reg = <0x140000 0x0080000>;
547 read-only;
548 };
549
550 factory: partition@1c0000 {
551 label = "factory";
552 reg = <0x1c0000 0x0040000>;
553 read-only;
554 };
555
556 partition@200000 {
557 label = "Kernel";
558 reg = <0x200000 0x2000000>;
559 };
560
561 partition@2200000 {
562 label = "reserved";
563 reg = <0x2200000 0x4000000>;
564 };
565 };
566 };
567 };
568
569 &spi0 {
570 pinctrl-names = "default";
571 pinctrl-0 = <&spic0_pins>;
572 status = "okay";
573 };
574
575 &spi1 {
576 pinctrl-names = "default";
577 pinctrl-0 = <&spic1_pins>;
578 status = "okay";
579 };
580
581 &ssusb {
582 vusb33-supply = <&reg_3p3v>;
583 vbus-supply = <&reg_usb_vbus>;
584 status = "okay";
585 };
586
587 &u3phy {
588 status = "okay";
589 };
590
591 &uart0 {
592 pinctrl-names = "default";
593 pinctrl-0 = <&uart0_pins>;
594 status = "okay";
595 };
596
597 &uart2 {
598 pinctrl-names = "default";
599 pinctrl-0 = <&uart2_pins>;
600 status = "okay";
601 };
602
603 &watchdog {
604 pinctrl-names = "default";
605 pinctrl-0 = <&watchdog_pins>;
606 status = "okay";
607 };
608
609 &wmac {
610 mediatek,mtd-eeprom = <&factory 0x0000>;
611 status = "okay";
612 };