mediatek: add latest fixes provided by MTK
[openwrt/staging/rmilecki.git] / target / linux / mediatek / files-4.19 / arch / arm / boot / dts / mt7629-rfb.dts
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (c) 2019 MediaTek Inc.
4 * Author: Ryder Lee <ryder.lee@mediatek.com>
5 */
6
7 /dts-v1/;
8 #include <dt-bindings/input/input.h>
9 #include "mt7629.dtsi"
10
11 / {
12 model = "MediaTek MT7629 reference board";
13 compatible = "mediatek,mt7629-lynx-rfb", "mediatek,mt7629";
14
15 aliases {
16 serial0 = &uart0;
17 };
18
19 chosen {
20 stdout-path = "serial0:115200n8";
21 bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8";
22 };
23
24 gpio-keys {
25 compatible = "gpio-keys";
26
27 reset {
28 label = "factory";
29 linux,code = <KEY_RESTART>;
30 gpios = <&pio 60 GPIO_ACTIVE_LOW>;
31 };
32
33 wps {
34 label = "wps";
35 linux,code = <KEY_WPS_BUTTON>;
36 gpios = <&pio 58 GPIO_ACTIVE_LOW>;
37 };
38 };
39
40 gsw: gsw@0 {
41 compatible = "mediatek,mt753x";
42 mediatek,ethsys = <&ethsys>;
43 #address-cells = <1>;
44 #size-cells = <0>;
45 };
46
47 memory@40000000 {
48 device_type = "memory";
49 reg = <0 0x40000000 0 0x10000000>;
50 };
51
52 reg_3p3v: regulator-3p3v {
53 compatible = "regulator-fixed";
54 regulator-name = "fixed-3.3V";
55 regulator-min-microvolt = <3300000>;
56 regulator-max-microvolt = <3300000>;
57 regulator-boot-on;
58 regulator-always-on;
59 };
60
61 reg_5v: regulator-5v {
62 compatible = "regulator-fixed";
63 regulator-name = "fixed-5V";
64 regulator-min-microvolt = <5000000>;
65 regulator-max-microvolt = <5000000>;
66 regulator-boot-on;
67 regulator-always-on;
68 };
69 };
70
71 &eth {
72 pinctrl-names = "default";
73 pinctrl-0 = <&ephy_leds_pins>;
74 status = "okay";
75
76 gmac0: mac@0 {
77 compatible = "mediatek,eth-mac";
78 reg = <0>;
79 mtd-mac-address = <&factory 0x2a>;
80 phy-mode = "sgmii";
81 fixed-link {
82 speed = <1000>;
83 full-duplex;
84 pause;
85 };
86 };
87
88 gmac1: mac@1 {
89 compatible = "mediatek,eth-mac";
90 reg = <1>;
91 mtd-mac-address = <&factory 0x24>;
92 phy-handle = <&phy0>;
93 };
94
95 mdio: mdio-bus {
96 #address-cells = <1>;
97 #size-cells = <0>;
98
99 phy0: ethernet-phy@0 {
100 reg = <0>;
101 phy-mode = "gmii";
102 };
103 };
104 };
105
106 &gsw {
107 mediatek,mdio = <&mdio>;
108 mediatek,portmap = "llllw";
109 mediatek,mdio_master_pinmux = <0>;
110 reset-gpios = <&pio 28 0>;
111 interrupt-parent = <&pio>;
112 interrupts = <6 IRQ_TYPE_LEVEL_HIGH>;
113 status = "okay";
114
115 port6: port@6 {
116 compatible = "mediatek,mt753x-port";
117 reg = <6>;
118 phy-mode = "sgmii";
119 fixed-link {
120 speed = <2500>;
121 full-duplex;
122 };
123 };
124 };
125
126 &i2c {
127 pinctrl-names = "default";
128 pinctrl-0 = <&i2c_pins>;
129 status = "okay";
130 };
131
132 &qspi {
133 pinctrl-names = "default";
134 pinctrl-0 = <&qspi_pins>;
135 status = "okay";
136
137 flash@0 {
138 compatible = "jedec,spi-nor";
139 reg = <0>;
140
141 partitions {
142 compatible = "fixed-partitions";
143 #address-cells = <1>;
144 #size-cells = <1>;
145
146 partition@0 {
147 label = "u-boot";
148 reg = <0x00000 0x60000>;
149 read-only;
150 };
151
152 partition@60000 {
153 label = "u-boot-env";
154 reg = <0x60000 0x10000>;
155 read-only;
156 };
157
158 factory: partition@70000 {
159 label = "factory";
160 reg = <0x70000 0x40000>;
161 read-only;
162 };
163
164 partition@b0000 {
165 label = "firmware";
166 reg = <0xb0000 0xb50000>;
167 };
168 };
169 };
170 };
171
172 &pio {
173 eth_pins: eth-pins {
174 mux {
175 function = "eth";
176 groups = "mdc_mdio";
177 };
178 };
179
180 ephy_leds_pins: ephy-leds-pins {
181 mux {
182 function = "led";
183 groups = "gphy_leds_0", "ephy_leds";
184 };
185 };
186
187 i2c_pins: i2c-pins {
188 mux {
189 function = "i2c";
190 groups = "i2c_0";
191 };
192
193 conf {
194 pins = "I2C_SDA", "I2C_SCL";
195 drive-strength = <4>;
196 bias-disable;
197 };
198 };
199
200 pcie_pins: pcie-pins {
201 mux {
202 function = "pcie";
203 groups = "pcie_clkreq",
204 "pcie_pereset",
205 "pcie_wake";
206 };
207 };
208
209 pwm_pins: pwm-pins {
210 mux {
211 function = "pwm";
212 groups = "pwm_0";
213 };
214 };
215
216 /* Serial NAND is shared pin with SPI-NOR */
217 serial_nand_pins: serial-nand-pins {
218 mux {
219 function = "flash";
220 groups = "snfi";
221 };
222 };
223
224 spi_pins: spi-pins {
225 mux {
226 function = "spi";
227 groups = "spi_0";
228 };
229 };
230
231 /* SPI-NOR is shared pin with serial NAND */
232 qspi_pins: qspi-pins {
233 mux {
234 function = "flash";
235 groups = "spi_nor";
236 };
237 };
238
239 uart0_pins: uart0-pins {
240 mux {
241 function = "uart";
242 groups = "uart0_txd_rxd" ;
243 };
244 };
245
246 uart1_pins: uart1-pins {
247 mux {
248 function = "uart";
249 groups = "uart1_0_tx_rx" ;
250 };
251 };
252
253 uart2_pins: uart2-pins {
254 mux {
255 function = "uart";
256 groups = "uart2_0_txd_rxd" ;
257 };
258 };
259
260 watchdog_pins: watchdog-pins {
261 mux {
262 function = "watchdog";
263 groups = "watchdog";
264 };
265 };
266
267 wmac0_pins: wmac0-pins {
268 mux {
269 function = "wifi";
270 groups = "wf0_5g";
271 drive-strength = <4>;
272 };
273 };
274
275 wmac1_pins: wmac0-pins {
276 mux {
277 function = "wifi";
278 groups = "wf0_2g";
279 drive-strength = <4>;
280 };
281 };
282 };
283
284 &spi {
285 pinctrl-names = "default";
286 pinctrl-0 = <&spi_pins>;
287 status = "okay";
288 };
289
290 &uart0 {
291 pinctrl-names = "default";
292 pinctrl-0 = <&uart0_pins>;
293 status = "okay";
294 };
295
296 &ssusb {
297 vusb33-supply = <&reg_3p3v>;
298 vbus-supply = <&reg_5v>;
299 status = "okay";
300 };
301
302 &u3phy1 {
303 status = "okay";
304 };
305
306 &watchdog {
307 pinctrl-names = "default";
308 pinctrl-0 = <&watchdog_pins>;
309 status = "okay";
310 };
311
312 &wmac {
313 pinctrl-names = "default";
314 pinctrl-0 = <&wmac0_pins>;
315 pinctrl-1 = <&wmac1_pins>;
316 status = "okay";
317 };