target/linux/lantiq/files/arch/mips/boot/dts/VR200.dtsi

   1 #include "vr9.dtsi"
   2
   3 #include <dt-bindings/input/input.h>
   4 #include <dt-bindings/mips/lantiq_rcu_gphy.h>
   5
   6 / {
   7         memory@0 {
   8                 device_type = "memory";
   9                 reg = <0x0 0x7f00000>;
  10         };
  11
  12         usb_vbus: regulator-usb-vbus {
  13                 compatible = "regulator-fixed";
  14
  15                 regulator-name = "USB_VBUS";
  16
  17                 regulator-min-microvolt = <5000000>;
  18                 regulator-max-microvolt = <5000000>;
  19
  20                 gpio = <&gpio 33 GPIO_ACTIVE_HIGH>;
  21                 enable-active-high;
  22         };
  23 };
  24
  25 &eth0 {
  26         lan: interface@0 {
  27                 compatible = "lantiq,xrx200-pdi";
  28                 #address-cells = <1>;
  29                 #size-cells = <0>;
  30                 reg = <0>;
  31                 mtd-mac-address = <&romfile 0xf100>;
  32                 lantiq,switch;
  33
  34                 ethernet@0 {
  35                         compatible = "lantiq,xrx200-pdi-port";
  36                         reg = <0>;
  37                         phy-mode = "rgmii";
  38                         phy-handle = <&phy0>;
  39                         // gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
  40                 };
  41                 ethernet@5 {
  42                         compatible = "lantiq,xrx200-pdi-port";
  43                         reg = <5>;
  44                         phy-mode = "rgmii";
  45                         phy-handle = <&phy5>;
  46                 };
  47                 ethernet@2 {
  48                         compatible = "lantiq,xrx200-pdi-port";
  49                         reg = <2>;
  50                         phy-mode = "gmii";
  51                         phy-handle = <&phy11>;
  52                 };
  53                 ethernet@3 {
  54                         compatible = "lantiq,xrx200-pdi-port";
  55                         reg = <4>;
  56                         phy-mode = "gmii";
  57                         phy-handle = <&phy13>;
  58                 };
  59         };
  60
  61         mdio {
  62                 #address-cells = <1>;
  63                 #size-cells = <0>;
  64                 compatible = "lantiq,xrx200-mdio";
  65
  66                 phy0: ethernet-phy@0 {
  67                         reg = <0x0>;
  68                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  69                 };
  70                 phy5: ethernet-phy@5 {
  71                         reg = <0x5>;
  72                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  73                 };
  74                 phy11: ethernet-phy@11 {
  75                         reg = <0x11>;
  76                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  77                 };
  78                 phy13: ethernet-phy@13 {
  79                         reg = <0x13>;
  80                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  81                 };
  82         };
  83 };
  84
  85 &gphy0 {
  86         lantiq,gphy-mode = <GPHY_MODE_GE>;
  87 };
  88
  89 &gphy1 {
  90         lantiq,gphy-mode = <GPHY_MODE_GE>;
  91 };
  92
  93 &gpio {
  94         pinctrl-names = "default";
  95         pinctrl-0 = <&state_default>;
  96
  97         state_default: pinmux {
  98                 gphy-leds {
  99                         lantiq,groups = "gphy0 led1", "gphy1 led1";
 100                         lantiq,function = "gphy";
 101                         lantiq,pull = <2>;
 102                         lantiq,open-drain = <0>;
 103                         lantiq,output = <1>;
 104                 };
 105                 phy-rst {
 106                         lantiq,pins = "io42";
 107                         lantiq,pull = <0>;
 108                         lantiq,open-drain = <0>;
 109                         lantiq,output = <1>;
 110                 };
 111                 pcie-rst {
 112                         lantiq,pins = "io38";
 113                         lantiq,pull = <0>;
 114                         lantiq,output = <1>;
 115                 };
 116         };
 117 };
 118
 119 &pci0 {
 120         status = "okay";
 121         gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
 122 };
 123
 124 &spi {
 125         status = "okay";
 126
 127         flash@4 {
 128                 compatible = "jedec,spi-nor";
 129                 reg = <4>;
 130                 spi-max-frequency = <33250000>;
 131                 m25p,fast-read;
 132
 133                 partitions {
 134                         compatible = "fixed-partitions";
 135                         #address-cells = <1>;
 136                         #size-cells = <1>;
 137
 138                         partition@0 {
 139                                 reg = <0x0 0x20000>;
 140                                 label = "u-boot";
 141                                 read-only;
 142                         };
 143
 144                         partition@20000 {
 145                                 reg = <0x20000 0xf90000>;
 146                                 label = "firmware";
 147                         };
 148
 149                         partition@fb0000 {
 150                                 reg = <0xfb0000 0x10000>;
 151                                 label = "radioDECT";
 152                                 read-only;
 153                         };
 154
 155                         partition@fc0000 {
 156                                 reg = <0xfc0000 0x10000>;
 157                                 label = "config";
 158                                 read-only;
 159                         };
 160
 161                         romfile: partition@fd0000 {
 162                                 reg = <0xfd0000 0x10000>;
 163                                 label = "romfile";
 164                                 read-only;
 165                         };
 166
 167                         partition@fe0000 {
 168                                 reg = <0xfe0000 0x10000>;
 169                                 label = "rom";
 170                                 read-only;
 171                         };
 172
 173                         partition@ff0000 {
 174                                 reg = <0xff0000 0x10000>;
 175                                 label = "radio";
 176                                 read-only;
 177                         };
 178                 };
 179         };
 180 };
 181
 182 &usb_phy0 {
 183         status = "okay";
 184 };
 185
 186 &usb_phy1 {
 187         status = "okay";
 188 };
 189
 190 &usb0 {
 191         status = "okay";
 192         vbus-supply = <&usb_vbus>;
 193 };
 194
 195 &usb1 {
 196         status = "okay";
 197         vbus-supply = <&usb_vbus>;
 198 };