lantiq: dts: assign the MDIO pins to the gsw node
[openwrt/staging/rmilecki.git] / target / linux / lantiq / files / arch / mips / boot / dts / FRITZ3370-REV2.dtsi
1 #include "vr9.dtsi"
2
3 #include <dt-bindings/input/input.h>
4 #include <dt-bindings/mips/lantiq_rcu_gphy.h>
5
6 / {
7 compatible = "avm,fritz3370-rev2", "lantiq,xway", "lantiq,vr9";
8 model = "AVM FRITZ!Box 3370 Rev. 2";
9
10 chosen {
11 bootargs = "console=ttyLTQ0,115200";
12 };
13
14 aliases {
15 led-boot = &power_green;
16 led-failsafe = &power_red;
17 led-running = &power_green;
18 led-upgrade = &power_red;
19
20 led-dsl = &dsl;
21 led-internet = &info_green;
22 led-wifi = &wifi;
23 };
24
25 memory@0 {
26 device_type = "memory";
27 reg = <0x0 0x8000000>;
28 };
29
30 gpio-poweroff {
31 compatible = "gpio-poweroff";
32 gpios = <&gpio 45 GPIO_ACTIVE_HIGH>;
33 };
34
35 keys {
36 compatible = "gpio-keys-polled";
37 poll-interval = <100>;
38
39 power {
40 label = "power";
41 gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
42 linux,code = <KEY_POWER>;
43 };
44
45 wifi {
46 label = "wlan";
47 gpios = <&gpio 29 GPIO_ACTIVE_HIGH>;
48 linux,code = <KEY_WLAN>;
49 };
50 };
51
52 leds {
53 compatible = "gpio-leds";
54
55 power_green: power {
56 label = "fritz3370:green:power";
57 gpios = <&gpio 32 GPIO_ACTIVE_LOW>;
58 default-state = "keep";
59 };
60
61 power_red: power2 {
62 label = "fritz3370:red:power";
63 gpios = <&gpio 33 GPIO_ACTIVE_LOW>;
64 };
65
66 info_red {
67 label = "fritz3370:red:info";
68 gpios = <&gpio 34 GPIO_ACTIVE_LOW>;
69 };
70
71 wifi: wifi {
72 label = "fritz3370:green:wlan";
73 gpios = <&gpio 35 GPIO_ACTIVE_LOW>;
74 };
75
76 dsl: dsl {
77 label = "fritz3370:green:dsl";
78 gpios = <&gpio 36 GPIO_ACTIVE_LOW>;
79 };
80
81 lan {
82 label = "fritz3370:green:lan";
83 gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
84 };
85
86 info_green: info_green {
87 label = "fritz3370:green:info";
88 gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
89 };
90 };
91
92 usb0_vbus: regulator-usb0-vbus {
93 compatible = "regulator-fixed";
94
95 regulator-name = "USB0_VBUS";
96
97 regulator-min-microvolt = <5000000>;
98 regulator-max-microvolt = <5000000>;
99
100 gpio = <&gpio 14 GPIO_ACTIVE_HIGH>;
101 enable-active-high;
102 };
103
104 usb1_vbus: regulator-usb1-vbus {
105 compatible = "regulator-fixed";
106
107 regulator-name = "USB1_VBUS";
108
109 regulator-min-microvolt = <5000000>;
110 regulator-max-microvolt = <5000000>;
111
112 gpio = <&gpio 5 GPIO_ACTIVE_HIGH>;
113 enable-active-high;
114 };
115 };
116
117 &eth0 {
118 lan: interface@0 {
119 compatible = "lantiq,xrx200-pdi";
120 #address-cells = <1>;
121 #size-cells = <0>;
122 reg = <0>;
123 lantiq,switch;
124
125 ethernet@0 {
126 compatible = "lantiq,xrx200-pdi-port";
127 reg = <0>;
128 phy-mode = "rgmii";
129 phy-handle = <&phy0>;
130 gpios = <&gpio 37 GPIO_ACTIVE_HIGH>;
131 };
132
133 ethernet@1 {
134 compatible = "lantiq,xrx200-pdi-port";
135 reg = <1>;
136 phy-mode = "rgmii";
137 phy-handle = <&phy1>;
138 gpios = <&gpio 44 GPIO_ACTIVE_HIGH>;
139 };
140
141 ethernet@2 {
142 compatible = "lantiq,xrx200-pdi-port";
143 reg = <2>;
144 phy-mode = "gmii";
145 phy-handle = <&phy11>;
146 };
147
148 ethernet@4 {
149 compatible = "lantiq,xrx200-pdi-port";
150 reg = <4>;
151 phy-mode = "gmii";
152 phy-handle = <&phy13>;
153 };
154 };
155
156 mdio {
157 #address-cells = <1>;
158 #size-cells = <0>;
159 compatible = "lantiq,xrx200-mdio";
160
161 phy0: ethernet-phy@0 {
162 reg = <0x0>;
163 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
164 };
165
166 phy1: ethernet-phy@1 {
167 reg = <0x1>;
168 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
169 };
170
171 phy11: ethernet-phy@11 {
172 reg = <0x11>;
173 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
174 };
175
176 phy13: ethernet-phy@13 {
177 reg = <0x13>;
178 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
179 };
180 };
181 };
182
183 &gphy0 {
184 lantiq,gphy-mode = <GPHY_MODE_GE>;
185 };
186
187 &gphy1 {
188 lantiq,gphy-mode = <GPHY_MODE_GE>;
189 };
190
191 &gpio {
192 pinctrl-names = "default";
193 pinctrl-0 = <&state_default>;
194
195 state_default: pinmux {
196 nand {
197 lantiq,groups = "nand cle", "nand ale",
198 "nand rd", "nand cs1", "nand rdy";
199 lantiq,function = "ebu";
200 lantiq,pull = <1>;
201 };
202
203 phy-rst {
204 lantiq,pins = "io37", "io44";
205 lantiq,pull = <0>;
206 lantiq,open-drain = <0>;
207 lantiq,output = <1>;
208 };
209
210 pcie-rst {
211 lantiq,pins = "io21";
212 lantiq,pull = <0>;
213 lantiq,output = <1>;
214 };
215 };
216
217 pins_spi_default: pins_spi_default {
218 spi_in {
219 lantiq,groups = "spi_di";
220 lantiq,function = "spi";
221 };
222
223 spi_out {
224 lantiq,groups = "spi_do", "spi_clk",
225 "spi_cs4";
226 lantiq,function = "spi";
227 lantiq,output = <1>;
228 };
229 };
230 };
231
232 &pcie0 {
233 gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
234
235 pcie@0 {
236 reg = <0 0 0 0 0>;
237 #interrupt-cells = <1>;
238 #size-cells = <2>;
239 #address-cells = <3>;
240 device_type = "pci";
241
242 wifi@0,0 {
243 compatible = "pci0,0";
244 reg = <0 0 0 0 0>;
245 qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:01:00.0.bin */
246 };
247 };
248 };
249
250 &spi {
251 status = "okay";
252
253 pinctrl-names = "default";
254 pinctrl-0 = <&pins_spi_default>;
255
256 flash@4 {
257 compatible = "jedec,spi-nor";
258 reg = <4>;
259 spi-max-frequency = <1000000>;
260
261 partitions {
262 compatible = "fixed-partitions";
263 #address-cells = <1>;
264 #size-cells = <1>;
265
266 urlader: partition@0 {
267 reg = <0x0 0x20000>;
268 label = "urlader";
269 read-only;
270 };
271
272 partition@20000 {
273 reg = <0x20000 0x10000>;
274 label = "tffs (1)";
275 read-only;
276 };
277
278 partition@30000 {
279 reg = <0x30000 0x10000>;
280 label = "tffs (2)";
281 read-only;
282 };
283 };
284 };
285 };
286
287 &usb_phy0 {
288 status = "okay";
289 };
290
291 &usb_phy1 {
292 status = "okay";
293 };
294
295 &usb0 {
296 status = "okay";
297 vbus-supply = <&usb0_vbus>;
298 };
299
300 &usb1 {
301 status = "okay";
302 vbus-supply = <&usb1_vbus>;
303 };