2 * Marvell 88E61xx switch driver
4 * Copyright (c) 2014 Claudio Leite <leitec@staticky.com>
5 * Copyright (c) 2014 Nikita Nazarenko <nnazarenko@radiofid.com>
7 * Based on code (c) 2008 Felix Fietkau <nbd@nbd.name>
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License v2 as published by the
11 * Free Software Foundation
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/init.h>
17 #include <linux/list.h>
18 #include <linux/mii.h>
19 #include <linux/phy.h>
21 #include <linux/of_mdio.h>
22 #include <linux/delay.h>
23 #include <linux/switch.h>
24 #include <linux/device.h>
25 #include <linux/platform_device.h>
29 MODULE_DESCRIPTION("Marvell 88E61xx Switch driver");
30 MODULE_AUTHOR("Claudio Leite <leitec@staticky.com>");
31 MODULE_AUTHOR("Nikita Nazarenko <nnazarenko@radiofid.com>");
32 MODULE_LICENSE("GPL v2");
33 MODULE_ALIAS("platform:mvsw61xx");
36 * Register access is done through direct or indirect addressing,
37 * depending on how the switch is physically connected.
39 * Direct addressing: all port and global registers directly
40 * accessible via an address/register pair
42 * Indirect addressing: switch is mapped at a single address,
43 * port and global registers accessible via a single command/data
48 mvsw61xx_wait_mask_raw(struct mii_bus
*bus
, int addr
,
49 int reg
, u16 mask
, u16 val
)
55 r
= bus
->read(bus
, addr
, reg
);
56 if ((r
& mask
) == val
)
64 r16(struct mii_bus
*bus
, bool indirect
, int base_addr
, int addr
, int reg
)
69 return bus
->read(bus
, addr
, reg
);
71 /* Indirect read: First, make sure switch is free */
72 mvsw61xx_wait_mask_raw(bus
, base_addr
, MV_INDIRECT_REG_CMD
,
73 MV_INDIRECT_INPROGRESS
, 0);
75 /* Load address and request read */
76 ind_addr
= MV_INDIRECT_READ
| (addr
<< MV_INDIRECT_ADDR_S
) | reg
;
77 bus
->write(bus
, base_addr
, MV_INDIRECT_REG_CMD
,
80 /* Wait until it's ready */
81 mvsw61xx_wait_mask_raw(bus
, base_addr
, MV_INDIRECT_REG_CMD
,
82 MV_INDIRECT_INPROGRESS
, 0);
84 /* Read the requested data */
85 return bus
->read(bus
, base_addr
, MV_INDIRECT_REG_DATA
);
89 w16(struct mii_bus
*bus
, bool indirect
, int base_addr
, int addr
,
95 bus
->write(bus
, addr
, reg
, val
);
99 /* Indirect write: First, make sure switch is free */
100 mvsw61xx_wait_mask_raw(bus
, base_addr
, MV_INDIRECT_REG_CMD
,
101 MV_INDIRECT_INPROGRESS
, 0);
103 /* Load the data to be written */
104 bus
->write(bus
, base_addr
, MV_INDIRECT_REG_DATA
, val
);
106 /* Wait again for switch to be free */
107 mvsw61xx_wait_mask_raw(bus
, base_addr
, MV_INDIRECT_REG_CMD
,
108 MV_INDIRECT_INPROGRESS
, 0);
110 /* Load address, and issue write command */
111 ind_addr
= MV_INDIRECT_WRITE
| (addr
<< MV_INDIRECT_ADDR_S
) | reg
;
112 bus
->write(bus
, base_addr
, MV_INDIRECT_REG_CMD
,
116 /* swconfig support */
119 sr16(struct switch_dev
*dev
, int addr
, int reg
)
121 struct mvsw61xx_state
*state
= get_state(dev
);
123 return r16(state
->bus
, state
->is_indirect
, state
->base_addr
, addr
, reg
);
127 sw16(struct switch_dev
*dev
, int addr
, int reg
, u16 val
)
129 struct mvsw61xx_state
*state
= get_state(dev
);
131 w16(state
->bus
, state
->is_indirect
, state
->base_addr
, addr
, reg
, val
);
135 mvsw61xx_wait_mask_s(struct switch_dev
*dev
, int addr
,
136 int reg
, u16 mask
, u16 val
)
142 r
= sr16(dev
, addr
, reg
) & mask
;
151 mvsw61xx_mdio_read(struct switch_dev
*dev
, int addr
, int reg
)
153 sw16(dev
, MV_GLOBAL2REG(SMI_OP
),
154 MV_INDIRECT_READ
| (addr
<< MV_INDIRECT_ADDR_S
) | reg
);
156 if (mvsw61xx_wait_mask_s(dev
, MV_GLOBAL2REG(SMI_OP
),
157 MV_INDIRECT_INPROGRESS
, 0) < 0)
160 return sr16(dev
, MV_GLOBAL2REG(SMI_DATA
));
164 mvsw61xx_mdio_write(struct switch_dev
*dev
, int addr
, int reg
, u16 val
)
166 sw16(dev
, MV_GLOBAL2REG(SMI_DATA
), val
);
168 sw16(dev
, MV_GLOBAL2REG(SMI_OP
),
169 MV_INDIRECT_WRITE
| (addr
<< MV_INDIRECT_ADDR_S
) | reg
);
171 return mvsw61xx_wait_mask_s(dev
, MV_GLOBAL2REG(SMI_OP
),
172 MV_INDIRECT_INPROGRESS
, 0) < 0;
176 mvsw61xx_get_port_mask(struct switch_dev
*dev
,
177 const struct switch_attr
*attr
, struct switch_val
*val
)
179 struct mvsw61xx_state
*state
= get_state(dev
);
180 char *buf
= state
->buf
;
184 port
= val
->port_vlan
;
185 reg
= sr16(dev
, MV_PORTREG(VLANMAP
, port
)) & MV_PORTS_MASK
;
187 len
= sprintf(buf
, "0x%04x: ", reg
);
189 for (i
= 0; i
< MV_PORTS
; i
++) {
191 len
+= sprintf(buf
+ len
, "%d ", i
);
193 len
+= sprintf(buf
+ len
, "(%d) ", i
);
202 mvsw61xx_get_port_qmode(struct switch_dev
*dev
,
203 const struct switch_attr
*attr
, struct switch_val
*val
)
205 struct mvsw61xx_state
*state
= get_state(dev
);
207 val
->value
.i
= state
->ports
[val
->port_vlan
].qmode
;
213 mvsw61xx_set_port_qmode(struct switch_dev
*dev
,
214 const struct switch_attr
*attr
, struct switch_val
*val
)
216 struct mvsw61xx_state
*state
= get_state(dev
);
218 state
->ports
[val
->port_vlan
].qmode
= val
->value
.i
;
224 mvsw61xx_get_port_pvid(struct switch_dev
*dev
, int port
, int *val
)
226 struct mvsw61xx_state
*state
= get_state(dev
);
228 *val
= state
->ports
[port
].pvid
;
234 mvsw61xx_set_port_pvid(struct switch_dev
*dev
, int port
, int val
)
236 struct mvsw61xx_state
*state
= get_state(dev
);
238 if (val
< 0 || val
>= MV_VLANS
)
241 state
->ports
[port
].pvid
= (u16
)val
;
247 mvsw61xx_get_port_link(struct switch_dev
*dev
, int port
,
248 struct switch_port_link
*link
)
252 status
= sr16(dev
, MV_PORTREG(STATUS
, port
));
254 link
->link
= status
& MV_PORT_STATUS_LINK
;
258 link
->duplex
= status
& MV_PORT_STATUS_FDX
;
260 speed
= (status
& MV_PORT_STATUS_SPEED_MASK
) >>
261 MV_PORT_STATUS_SPEED_SHIFT
;
264 case MV_PORT_STATUS_SPEED_10
:
265 link
->speed
= SWITCH_PORT_SPEED_10
;
267 case MV_PORT_STATUS_SPEED_100
:
268 link
->speed
= SWITCH_PORT_SPEED_100
;
270 case MV_PORT_STATUS_SPEED_1000
:
271 link
->speed
= SWITCH_PORT_SPEED_1000
;
278 static int mvsw61xx_get_vlan_ports(struct switch_dev
*dev
,
279 struct switch_val
*val
)
281 struct mvsw61xx_state
*state
= get_state(dev
);
284 vno
= val
->port_vlan
;
286 if (vno
<= 0 || vno
>= dev
->vlans
)
289 for (i
= 0, j
= 0; i
< dev
->ports
; i
++) {
290 if (state
->vlans
[vno
].mask
& (1 << i
)) {
291 val
->value
.ports
[j
].id
= i
;
293 mode
= (state
->vlans
[vno
].port_mode
>> (i
* 4)) & 0xf;
294 if (mode
== MV_VTUCTL_EGRESS_TAGGED
)
295 val
->value
.ports
[j
].flags
=
296 (1 << SWITCH_PORT_FLAG_TAGGED
);
298 val
->value
.ports
[j
].flags
= 0;
309 static int mvsw61xx_set_vlan_ports(struct switch_dev
*dev
,
310 struct switch_val
*val
)
312 struct mvsw61xx_state
*state
= get_state(dev
);
313 int i
, mode
, pno
, vno
;
315 vno
= val
->port_vlan
;
317 if (vno
<= 0 || vno
>= dev
->vlans
)
320 state
->vlans
[vno
].mask
= 0;
321 state
->vlans
[vno
].port_mode
= 0;
322 state
->vlans
[vno
].port_sstate
= 0;
324 if(state
->vlans
[vno
].vid
== 0)
325 state
->vlans
[vno
].vid
= vno
;
327 for (i
= 0; i
< val
->len
; i
++) {
328 pno
= val
->value
.ports
[i
].id
;
330 state
->vlans
[vno
].mask
|= (1 << pno
);
331 if (val
->value
.ports
[i
].flags
&
332 (1 << SWITCH_PORT_FLAG_TAGGED
))
333 mode
= MV_VTUCTL_EGRESS_TAGGED
;
335 mode
= MV_VTUCTL_EGRESS_UNTAGGED
;
337 state
->vlans
[vno
].port_mode
|= mode
<< (pno
* 4);
338 state
->vlans
[vno
].port_sstate
|=
339 MV_STUCTL_STATE_FORWARDING
<< (pno
* 4 + 2);
343 * DISCARD is nonzero, so it must be explicitly
344 * set on ports not in the VLAN.
346 for (i
= 0; i
< dev
->ports
; i
++)
347 if (!(state
->vlans
[vno
].mask
& (1 << i
)))
348 state
->vlans
[vno
].port_mode
|=
349 MV_VTUCTL_DISCARD
<< (i
* 4);
354 static int mvsw61xx_get_vlan_port_based(struct switch_dev
*dev
,
355 const struct switch_attr
*attr
, struct switch_val
*val
)
357 struct mvsw61xx_state
*state
= get_state(dev
);
358 int vno
= val
->port_vlan
;
360 if (vno
<= 0 || vno
>= dev
->vlans
)
363 if (state
->vlans
[vno
].port_based
)
371 static int mvsw61xx_set_vlan_port_based(struct switch_dev
*dev
,
372 const struct switch_attr
*attr
, struct switch_val
*val
)
374 struct mvsw61xx_state
*state
= get_state(dev
);
375 int vno
= val
->port_vlan
;
377 if (vno
<= 0 || vno
>= dev
->vlans
)
380 if (val
->value
.i
== 1)
381 state
->vlans
[vno
].port_based
= true;
383 state
->vlans
[vno
].port_based
= false;
388 static int mvsw61xx_get_vid(struct switch_dev
*dev
,
389 const struct switch_attr
*attr
, struct switch_val
*val
)
391 struct mvsw61xx_state
*state
= get_state(dev
);
392 int vno
= val
->port_vlan
;
394 if (vno
<= 0 || vno
>= dev
->vlans
)
397 val
->value
.i
= state
->vlans
[vno
].vid
;
402 static int mvsw61xx_set_vid(struct switch_dev
*dev
,
403 const struct switch_attr
*attr
, struct switch_val
*val
)
405 struct mvsw61xx_state
*state
= get_state(dev
);
406 int vno
= val
->port_vlan
;
408 if (vno
<= 0 || vno
>= dev
->vlans
)
411 state
->vlans
[vno
].vid
= val
->value
.i
;
416 static int mvsw61xx_get_enable_vlan(struct switch_dev
*dev
,
417 const struct switch_attr
*attr
, struct switch_val
*val
)
419 struct mvsw61xx_state
*state
= get_state(dev
);
421 val
->value
.i
= state
->vlan_enabled
;
426 static int mvsw61xx_set_enable_vlan(struct switch_dev
*dev
,
427 const struct switch_attr
*attr
, struct switch_val
*val
)
429 struct mvsw61xx_state
*state
= get_state(dev
);
431 state
->vlan_enabled
= val
->value
.i
;
436 static int mvsw61xx_vtu_program(struct switch_dev
*dev
)
438 struct mvsw61xx_state
*state
= get_state(dev
);
443 mvsw61xx_wait_mask_s(dev
, MV_GLOBALREG(VTU_OP
),
444 MV_VTUOP_INPROGRESS
, 0);
445 sw16(dev
, MV_GLOBALREG(VTU_OP
),
446 MV_VTUOP_INPROGRESS
| MV_VTUOP_PURGE
);
448 /* Write VLAN table */
449 for (i
= 1; i
< dev
->vlans
; i
++) {
450 if (state
->vlans
[i
].mask
== 0 ||
451 state
->vlans
[i
].vid
== 0 ||
452 state
->vlans
[i
].port_based
== true)
455 mvsw61xx_wait_mask_s(dev
, MV_GLOBALREG(VTU_OP
),
456 MV_VTUOP_INPROGRESS
, 0);
458 /* Write per-VLAN port state into STU */
459 s1
= (u16
) (state
->vlans
[i
].port_sstate
& 0xffff);
460 s2
= (u16
) ((state
->vlans
[i
].port_sstate
>> 16) & 0xffff);
462 sw16(dev
, MV_GLOBALREG(VTU_VID
), MV_VTU_VID_VALID
);
463 sw16(dev
, MV_GLOBALREG(VTU_SID
), i
);
464 sw16(dev
, MV_GLOBALREG(VTU_DATA1
), s1
);
465 sw16(dev
, MV_GLOBALREG(VTU_DATA2
), s2
);
466 sw16(dev
, MV_GLOBALREG(VTU_DATA3
), 0);
468 sw16(dev
, MV_GLOBALREG(VTU_OP
),
469 MV_VTUOP_INPROGRESS
| MV_VTUOP_STULOAD
);
470 mvsw61xx_wait_mask_s(dev
, MV_GLOBALREG(VTU_OP
),
471 MV_VTUOP_INPROGRESS
, 0);
473 /* Write VLAN information into VTU */
474 v1
= (u16
) (state
->vlans
[i
].port_mode
& 0xffff);
475 v2
= (u16
) ((state
->vlans
[i
].port_mode
>> 16) & 0xffff);
477 sw16(dev
, MV_GLOBALREG(VTU_VID
),
478 MV_VTU_VID_VALID
| state
->vlans
[i
].vid
);
479 sw16(dev
, MV_GLOBALREG(VTU_SID
), i
);
480 sw16(dev
, MV_GLOBALREG(VTU_FID
), i
);
481 sw16(dev
, MV_GLOBALREG(VTU_DATA1
), v1
);
482 sw16(dev
, MV_GLOBALREG(VTU_DATA2
), v2
);
483 sw16(dev
, MV_GLOBALREG(VTU_DATA3
), 0);
485 sw16(dev
, MV_GLOBALREG(VTU_OP
),
486 MV_VTUOP_INPROGRESS
| MV_VTUOP_LOAD
);
487 mvsw61xx_wait_mask_s(dev
, MV_GLOBALREG(VTU_OP
),
488 MV_VTUOP_INPROGRESS
, 0);
494 static void mvsw61xx_vlan_port_config(struct switch_dev
*dev
, int vno
)
496 struct mvsw61xx_state
*state
= get_state(dev
);
499 for (i
= 0; i
< dev
->ports
; i
++) {
500 if (!(state
->vlans
[vno
].mask
& (1 << i
)))
503 mode
= (state
->vlans
[vno
].port_mode
>> (i
* 4)) & 0xf;
505 if(mode
!= MV_VTUCTL_EGRESS_TAGGED
)
506 state
->ports
[i
].pvid
= state
->vlans
[vno
].vid
;
508 if (state
->vlans
[vno
].port_based
) {
509 state
->ports
[i
].mask
|= state
->vlans
[vno
].mask
;
510 state
->ports
[i
].fdb
= vno
;
513 state
->ports
[i
].qmode
= MV_8021Q_MODE_SECURE
;
517 static int mvsw61xx_update_state(struct switch_dev
*dev
)
519 struct mvsw61xx_state
*state
= get_state(dev
);
523 if (!state
->registered
)
527 * Set 802.1q-only mode if vlan_enabled is true.
529 * Without this, even if 802.1q is enabled for
530 * a port/VLAN, it still depends on the port-based
531 * VLAN mask being set.
533 * With this setting, port-based VLANs are still
534 * functional, provided the VID is not in the VTU.
536 reg
= sr16(dev
, MV_GLOBAL2REG(SDET_POLARITY
));
538 if (state
->vlan_enabled
)
539 reg
|= MV_8021Q_VLAN_ONLY
;
541 reg
&= ~MV_8021Q_VLAN_ONLY
;
543 sw16(dev
, MV_GLOBAL2REG(SDET_POLARITY
), reg
);
546 * Set port-based VLAN masks on each port
547 * based only on VLAN definitions known to
548 * the driver (i.e. in state).
550 * This means any pre-existing port mapping is
551 * wiped out once our driver is initialized.
553 for (i
= 0; i
< dev
->ports
; i
++) {
554 state
->ports
[i
].mask
= 0;
555 state
->ports
[i
].qmode
= MV_8021Q_MODE_DISABLE
;
558 for (i
= 0; i
< dev
->vlans
; i
++)
559 mvsw61xx_vlan_port_config(dev
, i
);
561 for (i
= 0; i
< dev
->ports
; i
++) {
562 reg
= sr16(dev
, MV_PORTREG(VLANID
, i
)) & ~MV_PVID_MASK
;
563 reg
|= state
->ports
[i
].pvid
;
564 sw16(dev
, MV_PORTREG(VLANID
, i
), reg
);
566 state
->ports
[i
].mask
&= ~(1 << i
);
568 /* set default forwarding DB number and port mask */
569 reg
= sr16(dev
, MV_PORTREG(CONTROL1
, i
)) & ~MV_FDB_HI_MASK
;
570 reg
|= (state
->ports
[i
].fdb
>> MV_FDB_HI_SHIFT
) &
572 sw16(dev
, MV_PORTREG(CONTROL1
, i
), reg
);
574 reg
= ((state
->ports
[i
].fdb
& 0xf) << MV_FDB_LO_SHIFT
) |
575 state
->ports
[i
].mask
;
576 sw16(dev
, MV_PORTREG(VLANMAP
, i
), reg
);
578 reg
= sr16(dev
, MV_PORTREG(CONTROL2
, i
)) &
580 reg
|= state
->ports
[i
].qmode
<< MV_8021Q_MODE_SHIFT
;
581 sw16(dev
, MV_PORTREG(CONTROL2
, i
), reg
);
584 mvsw61xx_vtu_program(dev
);
589 static int mvsw61xx_apply(struct switch_dev
*dev
)
591 return mvsw61xx_update_state(dev
);
594 static int _mvsw61xx_reset(struct switch_dev
*dev
, bool full
)
596 struct mvsw61xx_state
*state
= get_state(dev
);
600 /* Disable all ports before reset */
601 for (i
= 0; i
< dev
->ports
; i
++) {
602 reg
= sr16(dev
, MV_PORTREG(CONTROL
, i
)) &
603 ~MV_PORTCTRL_FORWARDING
;
604 sw16(dev
, MV_PORTREG(CONTROL
, i
), reg
);
607 reg
= sr16(dev
, MV_GLOBALREG(CONTROL
)) | MV_CONTROL_RESET
;
609 sw16(dev
, MV_GLOBALREG(CONTROL
), reg
);
610 if (mvsw61xx_wait_mask_s(dev
, MV_GLOBALREG(CONTROL
),
611 MV_CONTROL_RESET
, 0) < 0)
614 for (i
= 0; i
< dev
->ports
; i
++) {
615 state
->ports
[i
].fdb
= 0;
616 state
->ports
[i
].qmode
= 0;
617 state
->ports
[i
].mask
= 0;
618 state
->ports
[i
].pvid
= 0;
620 /* Force flow control off */
621 reg
= sr16(dev
, MV_PORTREG(PHYCTL
, i
)) & ~MV_PHYCTL_FC_MASK
;
622 reg
|= MV_PHYCTL_FC_DISABLE
;
623 sw16(dev
, MV_PORTREG(PHYCTL
, i
), reg
);
625 /* Set port association vector */
626 sw16(dev
, MV_PORTREG(ASSOC
, i
), (1 << i
));
630 mvsw61xx_mdio_write(dev
, i
, MII_MV_SPEC_CTRL
,
631 MV_SPEC_MDI_CROSS_AUTO
|
632 MV_SPEC_ENERGY_DETECT
|
633 MV_SPEC_DOWNSHIFT_COUNTER
);
634 mvsw61xx_mdio_write(dev
, i
, MII_BMCR
, BMCR_RESET
|
635 BMCR_ANENABLE
| BMCR_FULLDPLX
|
640 for (i
= 0; i
< dev
->vlans
; i
++) {
641 state
->vlans
[i
].port_based
= false;
642 state
->vlans
[i
].mask
= 0;
643 state
->vlans
[i
].vid
= 0;
644 state
->vlans
[i
].port_mode
= 0;
645 state
->vlans
[i
].port_sstate
= 0;
648 state
->vlan_enabled
= 0;
650 mvsw61xx_update_state(dev
);
652 /* Re-enable ports */
653 for (i
= 0; i
< dev
->ports
; i
++) {
654 reg
= sr16(dev
, MV_PORTREG(CONTROL
, i
)) |
655 MV_PORTCTRL_FORWARDING
;
656 sw16(dev
, MV_PORTREG(CONTROL
, i
), reg
);
662 static int mvsw61xx_reset(struct switch_dev
*dev
)
664 return _mvsw61xx_reset(dev
, false);
668 MVSW61XX_ENABLE_VLAN
,
672 MVSW61XX_VLAN_PORT_BASED
,
681 static const struct switch_attr mvsw61xx_global
[] = {
682 [MVSW61XX_ENABLE_VLAN
] = {
683 .id
= MVSW61XX_ENABLE_VLAN
,
684 .type
= SWITCH_TYPE_INT
,
685 .name
= "enable_vlan",
686 .description
= "Enable 802.1q VLAN support",
687 .get
= mvsw61xx_get_enable_vlan
,
688 .set
= mvsw61xx_set_enable_vlan
,
692 static const struct switch_attr mvsw61xx_vlan
[] = {
693 [MVSW61XX_VLAN_PORT_BASED
] = {
694 .id
= MVSW61XX_VLAN_PORT_BASED
,
695 .type
= SWITCH_TYPE_INT
,
696 .name
= "port_based",
697 .description
= "Use port-based (non-802.1q) VLAN only",
698 .get
= mvsw61xx_get_vlan_port_based
,
699 .set
= mvsw61xx_set_vlan_port_based
,
701 [MVSW61XX_VLAN_ID
] = {
702 .id
= MVSW61XX_VLAN_ID
,
703 .type
= SWITCH_TYPE_INT
,
705 .description
= "Get/set VLAN ID",
706 .get
= mvsw61xx_get_vid
,
707 .set
= mvsw61xx_set_vid
,
711 static const struct switch_attr mvsw61xx_port
[] = {
712 [MVSW61XX_PORT_MASK
] = {
713 .id
= MVSW61XX_PORT_MASK
,
714 .type
= SWITCH_TYPE_STRING
,
715 .description
= "Port-based VLAN mask",
717 .get
= mvsw61xx_get_port_mask
,
720 [MVSW61XX_PORT_QMODE
] = {
721 .id
= MVSW61XX_PORT_QMODE
,
722 .type
= SWITCH_TYPE_INT
,
723 .description
= "802.1q mode: 0=off/1=fallback/2=check/3=secure",
725 .get
= mvsw61xx_get_port_qmode
,
726 .set
= mvsw61xx_set_port_qmode
,
730 static const struct switch_dev_ops mvsw61xx_ops
= {
732 .attr
= mvsw61xx_global
,
733 .n_attr
= ARRAY_SIZE(mvsw61xx_global
),
736 .attr
= mvsw61xx_vlan
,
737 .n_attr
= ARRAY_SIZE(mvsw61xx_vlan
),
740 .attr
= mvsw61xx_port
,
741 .n_attr
= ARRAY_SIZE(mvsw61xx_port
),
743 .get_port_link
= mvsw61xx_get_port_link
,
744 .get_port_pvid
= mvsw61xx_get_port_pvid
,
745 .set_port_pvid
= mvsw61xx_set_port_pvid
,
746 .get_vlan_ports
= mvsw61xx_get_vlan_ports
,
747 .set_vlan_ports
= mvsw61xx_set_vlan_ports
,
748 .apply_config
= mvsw61xx_apply
,
749 .reset_switch
= mvsw61xx_reset
,
752 /* end swconfig stuff */
754 static int mvsw61xx_probe(struct platform_device
*pdev
)
756 struct mvsw61xx_state
*state
;
757 struct device_node
*np
= pdev
->dev
.of_node
;
758 struct device_node
*mdio
;
763 state
= kzalloc(sizeof(*state
), GFP_KERNEL
);
767 mdio
= of_parse_phandle(np
, "mii-bus", 0);
769 dev_err(&pdev
->dev
, "Couldn't get MII bus handle\n");
774 state
->bus
= of_mdio_find_bus(mdio
);
776 dev_err(&pdev
->dev
, "Couldn't find MII bus from handle\n");
781 state
->is_indirect
= of_property_read_bool(np
, "is-indirect");
783 if (state
->is_indirect
) {
784 if (of_property_read_u32(np
, "reg", &val
)) {
785 dev_err(&pdev
->dev
, "Switch address not specified\n");
790 state
->base_addr
= val
;
792 state
->base_addr
= MV_BASE
;
795 state
->model
= r16(state
->bus
, state
->is_indirect
, state
->base_addr
,
796 MV_PORTREG(IDENT
, 0)) & MV_IDENT_MASK
;
798 switch(state
->model
) {
799 case MV_IDENT_VALUE_6171
:
800 model_str
= MV_IDENT_STR_6171
;
802 case MV_IDENT_VALUE_6172
:
803 model_str
= MV_IDENT_STR_6172
;
805 case MV_IDENT_VALUE_6176
:
806 model_str
= MV_IDENT_STR_6176
;
809 dev_err(&pdev
->dev
, "No compatible switch found at 0x%02x\n",
815 platform_set_drvdata(pdev
, state
);
816 dev_info(&pdev
->dev
, "Found %s at %s:%02x\n", model_str
,
817 state
->bus
->id
, state
->base_addr
);
819 dev_info(&pdev
->dev
, "Using %sdirect addressing\n",
820 (state
->is_indirect
? "in" : ""));
822 if (of_property_read_u32(np
, "cpu-port-0", &val
)) {
823 dev_err(&pdev
->dev
, "CPU port not set\n");
828 state
->cpu_port0
= val
;
830 if (!of_property_read_u32(np
, "cpu-port-1", &val
))
831 state
->cpu_port1
= val
;
833 state
->cpu_port1
= -1;
835 state
->dev
.vlans
= MV_VLANS
;
836 state
->dev
.cpu_port
= state
->cpu_port0
;
837 state
->dev
.ports
= MV_PORTS
;
838 state
->dev
.name
= model_str
;
839 state
->dev
.ops
= &mvsw61xx_ops
;
840 state
->dev
.alias
= dev_name(&pdev
->dev
);
842 _mvsw61xx_reset(&state
->dev
, true);
844 err
= register_switch(&state
->dev
, NULL
);
848 state
->registered
= true;
857 mvsw61xx_remove(struct platform_device
*pdev
)
859 struct mvsw61xx_state
*state
= platform_get_drvdata(pdev
);
861 if (state
->registered
)
862 unregister_switch(&state
->dev
);
869 static const struct of_device_id mvsw61xx_match
[] = {
870 { .compatible
= "marvell,88e6171" },
871 { .compatible
= "marvell,88e6172" },
872 { .compatible
= "marvell,88e6176" },
875 MODULE_DEVICE_TABLE(of
, mvsw61xx_match
);
877 static struct platform_driver mvsw61xx_driver
= {
878 .probe
= mvsw61xx_probe
,
879 .remove
= mvsw61xx_remove
,
882 .of_match_table
= of_match_ptr(mvsw61xx_match
),
883 .owner
= THIS_MODULE
,
887 static int __init
mvsw61xx_module_init(void)
889 return platform_driver_register(&mvsw61xx_driver
);
891 late_initcall(mvsw61xx_module_init
);
893 static void __exit
mvsw61xx_module_exit(void)
895 platform_driver_unregister(&mvsw61xx_driver
);
897 module_exit(mvsw61xx_module_exit
);