2c980f91f4f85afdf9e1f4564cf0b6e7e1ab39c4
[openwrt/staging/rmilecki.git] / target / linux / bmips / dts / bcm6368.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later
2
3 /dts-v1/;
4
5 #include <dt-bindings/clock/bcm6368-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/bcm6368-interrupt-controller.h>
9 #include <dt-bindings/reset/bcm6368-reset.h>
10
11 / {
12 #address-cells = <1>;
13 #size-cells = <1>;
14 compatible = "brcm,bcm6368";
15
16 aliases {
17 nflash = &nflash;
18 pflash = &pflash;
19 pinctrl = &pinctrl;
20 serial0 = &uart0;
21 serial1 = &uart1;
22 spi0 = &lsspi;
23 };
24
25 chosen {
26 bootargs = "console=ttyS0,115200n8 earlycon";
27 stdout-path = "serial0:115200n8";
28 };
29
30 clocks {
31 periph_osc: periph-osc {
32 compatible = "fixed-clock";
33
34 #clock-cells = <0>;
35
36 clock-frequency = <50000000>;
37 clock-output-names = "periph";
38 };
39 };
40
41 cpus {
42 #address-cells = <1>;
43 #size-cells = <0>;
44 mips-hpt-frequency = <200000000>;
45
46 cpu@0 {
47 compatible = "brcm,bmips4350", "mips,mips4Kc";
48 device_type = "cpu";
49 reg = <0>;
50 };
51
52 cpu@1 {
53 compatible = "brcm,bmips4350", "mips,mips4Kc";
54 device_type = "cpu";
55 reg = <1>;
56 };
57 };
58
59 cpu_intc: interrupt-controller {
60 #address-cells = <0>;
61 compatible = "mti,cpu-interrupt-controller";
62
63 interrupt-controller;
64 #interrupt-cells = <1>;
65 };
66
67 memory@0 {
68 device_type = "memory";
69 reg = <0 0>;
70 };
71
72 ubus {
73 #address-cells = <1>;
74 #size-cells = <1>;
75
76 compatible = "simple-bus";
77 ranges;
78
79 periph_clk: clock-controller@10000004 {
80 compatible = "brcm,bcm6368-clocks";
81 reg = <0x10000004 0x4>;
82 #clock-cells = <1>;
83 };
84
85 pll_cntl: syscon@10000008 {
86 compatible = "syscon", "simple-mfd";
87 reg = <0x10000008 0x4>;
88 native-endian;
89
90 syscon-reboot {
91 compatible = "syscon-reboot";
92 offset = <0x0>;
93 mask = <0x1>;
94 };
95 };
96
97 periph_rst: reset-controller@10000010 {
98 compatible = "brcm,bcm6345-reset";
99 reg = <0x10000010 0x4>;
100 #reset-cells = <1>;
101 };
102
103 ext_intc0: interrupt-controller@10000018 {
104 #address-cells = <1>;
105 compatible = "brcm,bcm6345-ext-intc";
106 reg = <0x10000018 0x4>;
107
108 interrupt-controller;
109 #interrupt-cells = <2>;
110
111 interrupts = <BCM6368_IRQ_EXT0>,
112 <BCM6368_IRQ_EXT1>,
113 <BCM6368_IRQ_EXT2>,
114 <BCM6368_IRQ_EXT3>;
115 };
116
117 ext_intc1: interrupt-controller@1000001c {
118 #address-cells = <1>;
119 compatible = "brcm,bcm6345-ext-intc";
120 reg = <0x1000001c 0x4>;
121
122 interrupt-controller;
123 #interrupt-cells = <2>;
124
125 interrupts = <BCM6368_IRQ_EXT4>,
126 <BCM6368_IRQ_EXT5>;
127 };
128
129 periph_intc: interrupt-controller@10000020 {
130 #address-cells = <1>;
131 compatible = "brcm,bcm6345-l1-intc";
132 reg = <0x10000020 0x10>,
133 <0x10000030 0x10>;
134
135 interrupt-controller;
136 #interrupt-cells = <1>;
137
138 interrupt-parent = <&cpu_intc>;
139 interrupts = <2>, <3>;
140 };
141
142 wdt: watchdog@1000005c {
143 compatible = "brcm,bcm7038-wdt";
144 reg = <0x1000005c 0xc>;
145
146 clocks = <&periph_osc>;
147
148 timeout-sec = <30>;
149 };
150
151 gpio: syscon@10000080 {
152 compatible = "syscon", "simple-mfd";
153 reg = <0x10000080 0x80>;
154 native-endian;
155
156 pinctrl: pin-controller {
157 compatible = "brcm,bcm6368-pinctrl";
158
159 gpio-controller;
160 #gpio-cells = <2>;
161
162 interrupts-extended = <&ext_intc1 0 0>,
163 <&ext_intc1 1 0>,
164 <&ext_intc0 0 0>,
165 <&ext_intc0 1 0>,
166 <&ext_intc0 2 0>,
167 <&ext_intc0 3 0>;
168 interrupt-names = "gpio32",
169 "gpio33",
170 "gpio34",
171 "gpio35",
172 "gpio36",
173 "gpio37";
174
175 pinctrl_analog_afe_0: analog_afe_0 {
176 function = "analog_afe_0";
177 pins = "gpio0";
178 };
179
180 pinctrl_analog_afe_1: analog_afe_1 {
181 function = "analog_afe_1";
182 pins = "gpio1";
183 };
184
185 pinctrl_sys_irq: sys_irq {
186 function = "sys_irq";
187 pins = "gpio2";
188 };
189
190 pinctrl_serial_led: serial_led {
191 pinctrl_serial_led_data: serial_led_data {
192 function = "serial_led_data";
193 pins = "gpio3";
194 };
195
196 pinctrl_serial_led_clk: serial_led_clk {
197 function = "serial_led_clk";
198 pins = "gpio4";
199 };
200 };
201
202 pinctrl_inet_led: inet_led {
203 function = "inet_led";
204 pins = "gpio5";
205 };
206
207 pinctrl_ephy0_led: ephy0_led {
208 function = "ephy0_led";
209 pins = "gpio6";
210 };
211
212 pinctrl_ephy1_led: ephy1_led {
213 function = "ephy1_led";
214 pins = "gpio7";
215 };
216
217 pinctrl_ephy2_led: ephy2_led {
218 function = "ephy2_led";
219 pins = "gpio8";
220 };
221
222 pinctrl_ephy3_led: ephy3_led {
223 function = "ephy3_led";
224 pins = "gpio9";
225 };
226
227 pinctrl_robosw_led_data: robosw_led_data {
228 function = "robosw_led_data";
229 pins = "gpio10";
230 };
231
232 pinctrl_robosw_led_clk: robosw_led_clk {
233 function = "robosw_led_clk";
234 pins = "gpio11";
235 };
236
237 pinctrl_robosw_led0: robosw_led0 {
238 function = "robosw_led0";
239 pins = "gpio12";
240 };
241
242 pinctrl_robosw_led1: robosw_led1 {
243 function = "robosw_led1";
244 pins = "gpio13";
245 };
246
247 pinctrl_usb_device_led: usb_device_led {
248 function = "usb_device_led";
249 pins = "gpio14";
250 };
251
252 pinctrl_pci: pci {
253 pinctrl_pci_req1: pci_req1 {
254 function = "pci_req1";
255 pins = "gpio16";
256 };
257
258 pinctrl_pci_gnt1: pci_gnt1 {
259 function = "pci_gnt1";
260 pins = "gpio17";
261 };
262
263 pinctrl_pci_intb: pci_intb {
264 function = "pci_intb";
265 pins = "gpio18";
266 };
267
268 pinctrl_pci_req0: pci_req0 {
269 function = "pci_req0";
270 pins = "gpio19";
271 };
272
273 pinctrl_pci_gnt0: pci_gnt0 {
274 function = "pci_gnt0";
275 pins = "gpio20";
276 };
277 };
278
279 pinctrl_pcmcia: pcmcia {
280 pinctrl_pcmcia_cd1: pcmcia_cd1 {
281 function = "pcmcia_cd1";
282 pins = "gpio22";
283 };
284
285 pinctrl_pcmcia_cd2: pcmcia_cd2 {
286 function = "pcmcia_cd2";
287 pins = "gpio23";
288 };
289
290 pinctrl_pcmcia_vs1: pcmcia_vs1 {
291 function = "pcmcia_vs1";
292 pins = "gpio24";
293 };
294
295 pinctrl_pcmcia_vs2: pcmcia_vs2 {
296 function = "pcmcia_vs2";
297 pins = "gpio25";
298 };
299 };
300
301 pinctrl_ebi_cs2: ebi_cs2 {
302 function = "ebi_cs2";
303 pins = "gpio26";
304 };
305
306 pinctrl_ebi_cs3: ebi_cs3 {
307 function = "ebi_cs3";
308 pins = "gpio27";
309 };
310
311 pinctrl_spi_cs2: spi_cs2 {
312 function = "spi_cs2";
313 pins = "gpio28";
314 };
315
316 pinctrl_spi_cs3: spi_cs3 {
317 function = "spi_cs3";
318 pins = "gpio29";
319 };
320
321 pinctrl_spi_cs4: spi_cs4 {
322 function = "spi_cs4";
323 pins = "gpio30";
324 };
325
326 pinctrl_spi_cs5: spi_cs5 {
327 function = "spi_cs5";
328 pins = "gpio31";
329 };
330
331 pinctrl_uart1: uart1 {
332 function = "uart1";
333 group = "uart1_grp";
334 };
335 };
336 };
337
338 gpiobasemode: gpiobasemode@100000b8 {
339 compatible = "brcm,bcm6368-gpiobasemode", "syscon";
340 reg = <0x100000b8 0x4>;
341 };
342
343 leds: led-controller@100000d0 {
344 #address-cells = <1>;
345 #size-cells = <0>;
346 compatible = "brcm,bcm6358-leds";
347 reg = <0x100000d0 0x8>;
348
349 status = "disabled";
350 };
351
352 uart0: serial@10000100 {
353 compatible = "brcm,bcm6345-uart";
354 reg = <0x10000100 0x18>;
355
356 interrupt-parent = <&periph_intc>;
357 interrupts = <BCM6368_IRQ_UART0>;
358
359 clocks = <&periph_osc>;
360 clock-names = "periph";
361
362 status = "disabled";
363 };
364
365 uart1: serial@10000120 {
366 compatible = "brcm,bcm6345-uart";
367 reg = <0x10000120 0x18>;
368
369 interrupt-parent = <&periph_intc>;
370 interrupts = <BCM6368_IRQ_UART1>;
371
372 clocks = <&periph_osc>;
373 clock-names = "periph";
374
375 status = "disabled";
376 };
377
378 nflash: nand@10000200 {
379 #address-cells = <1>;
380 #size-cells = <0>;
381 compatible = "brcm,nand-bcm6368",
382 "brcm,brcmnand-v2.1",
383 "brcm,brcmnand";
384 reg = <0x10000200 0x180>,
385 <0x10000600 0x200>,
386 <0x10000070 0x10>;
387 reg-names = "nand",
388 "nand-cache",
389 "nand-int-base";
390
391 interrupt-parent = <&periph_intc>;
392 interrupts = <BCM6368_IRQ_NAND>;
393
394 clocks = <&periph_clk BCM6368_CLK_NAND>;
395 clock-names = "nand";
396
397 status = "disabled";
398 };
399
400 lsspi: spi@10000800 {
401 compatible = "brcm,bcm6358-spi";
402 reg = <0x10000800 0x70c>;
403 #address-cells = <1>;
404 #size-cells = <0>;
405
406 interrupt-parent = <&periph_intc>;
407 interrupts = <BCM6368_IRQ_SPI>;
408
409 clocks = <&periph_clk BCM6368_CLK_SPI>;
410 clock-names = "spi";
411
412 resets = <&periph_rst BCM6368_RST_SPI>;
413
414 status = "disabled";
415 };
416
417 ehci: usb@10001500 {
418 compatible = "brcm,bcm6368-ehci", "generic-ehci";
419 reg = <0x10001500 0x100>;
420 big-endian;
421 ignore-oc;
422
423 interrupt-parent = <&periph_intc>;
424 interrupts = <BCM6368_IRQ_EHCI>;
425
426 phys = <&usbh 0>;
427 phy-names = "usb";
428
429 status = "disabled";
430 };
431
432 ohci: usb@10001600 {
433 compatible = "brcm,bcm6368-ohci", "generic-ohci";
434 reg = <0x10001600 0x100>;
435 big-endian;
436 no-big-frame-no;
437
438 interrupt-parent = <&periph_intc>;
439 interrupts = <BCM6368_IRQ_OHCI>;
440
441 phys = <&usbh 0>;
442 phy-names = "usb";
443
444 status = "disabled";
445 };
446
447 usbh: usb-phy@10001700 {
448 compatible = "brcm,bcm6368-usbh-phy";
449 reg = <0x10001700 0x38>;
450
451 #phy-cells = <1>;
452
453 clocks = <&periph_clk BCM6368_CLK_USBH>;
454 clock-names = "usbh";
455
456 resets = <&periph_rst BCM6368_RST_USBH>;
457
458 status = "disabled";
459 };
460
461 random: rng@10004180 {
462 compatible = "brcm,bcm6368-rng";
463 reg = <0x10004180 0x14>;
464
465 clocks = <&periph_clk BCM6368_CLK_IPSEC>;
466 clock-names = "ipsec";
467
468 resets = <&periph_rst BCM6368_RST_IPSEC>;
469 };
470 };
471
472 pflash: nor@18000000 {
473 #address-cells = <1>;
474 #size-cells = <1>;
475 compatible = "cfi-flash";
476 reg = <0x18000000 0x2000000>;
477 bank-width = <2>;
478
479 status = "disabled";
480 };
481 };